KM68257E, KM68257EI |
PRELIMINARY |
CMOS SRAM |
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Document Title
32Kx8 Bit High-Speed CMOS Static RAM(5V Operating) Operated at Commercial and Industrial Temperature Ranges.
Revision History
Rev.No. |
History |
Draft Data |
Remark |
Rev. 0.0 |
Initial Draft |
Aug. 1. 1998 |
Preliminary |
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
- 1 -
Revision 0.0
August 1998
KM68257E, KM68257EI |
PRELIMINARY |
CMOS SRAM |
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32K x 8 Bit High-Speed CMOS Static RAM |
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FEATURES
•Fast Access Time 10, 12, 15ns(Max.)
•Low Power Dissipation
Standby (TTL) : 20mA(Max.) (CMOS) : 2mA(Max.)
Operating KM68257E - 10 : 80mA(Max.) KM68257E - 12 : 80mA(Max.) KM68257E - 15 : 80mA(Max.)
•Single 5.0V±10% Power Supply
•TTL Compatible Inputs and Outputs
•I/O Compatible with 3.3V Device
•Fully Static Operation
-No Clock or Refresh required
•Three State Outputs
•Standard Pin Configuration
KM68257EJ : 28-SOJ-300
KM68257ETG : 28-TSOP1-0813. 4F
ORDERING INFORMATION
KM68257E -10/12/15 |
Commercial Temp. |
KM68257EI -10/12/15 |
Industrial Temp. |
FUNCTIONAL BLOCK DIAGRAM
A0 |
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Clk Gen. |
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Pre-Charge-Circuit |
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A1 |
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A2 |
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Select |
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Memory Array |
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A3 |
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A4 |
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Row |
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512 Rows |
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A5 |
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64x8 Columns |
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A6 |
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A7 |
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A8 |
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I/O1~I/O8 |
Data |
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I/O Circuit |
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Cont. |
Column Select |
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CLK |
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Gen. |
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A9 |
A10 |
A11 |
A12 |
A13 |
A14 |
CS |
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WE |
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OE |
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GENERAL DESCRIPTION
The KM68257E is a 262,144-bit high-speed Static Random Access Memory organized as 32,768 words by 8 bits. The KM68257E uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. The device is fabricated using SAMSUNG′s advanced CMOS process and designed for high-speed circuit technology. It is particularly well suited for use in high-density high-speed system applications. The KM68257E is packaged in a 300mil 28-pin plastic SOJ or TSOP1 forward.
PIN CONFIGURATION(Top View)
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OE |
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1 |
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28 |
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A10 |
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A11 |
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2 |
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27 |
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CS |
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A9 |
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3 |
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26 |
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I/O8 |
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A8 |
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4 |
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25 |
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I/O7 |
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A13 |
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5 |
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24 |
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I/O6 |
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WE |
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6 |
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23 |
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I/O5 |
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Vcc |
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7 |
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TSOP1 |
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I/O4 |
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A14 |
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8 |
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21 |
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Vss |
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A12 |
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9 |
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20 |
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I/O3 |
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A7 |
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10 |
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19 |
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I/O2 |
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A6 |
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18 |
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I/O1 |
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A5 |
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12 |
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17 |
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A0 |
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A4 |
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16 |
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A1 |
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A3 |
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15 |
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A2 |
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A14 |
1 |
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28 |
Vcc |
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A12 |
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27 |
WE |
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A7 |
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26 |
A13 |
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A6 |
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A8 |
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A5 |
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A9 |
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A4 |
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A11 |
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A3 |
7 |
SOJ |
22 |
OE |
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A2 |
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A10 |
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A1 |
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20 |
CS |
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A0 |
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19 |
I/O8 |
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I/O1 |
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18 |
I/O7 |
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I/O2 |
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I/O6 |
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I/O3 |
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16 |
I/O5 |
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13 |
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Vss |
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15 |
I/O4 |
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14 |
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PIN FUNCTION
Pin Name |
Pin Function |
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A0 - A14 |
Address Inputs |
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WE |
Write Enable |
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CS |
Chip Select |
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OE |
Output Enable |
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I/O1 ~ I/O8 |
Data Inputs/Outputs |
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VCC |
Power(+5.0V) |
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VSS |
Ground |
- 2 -
Revision 0.0
August 1998
KM68257E, KM68257EI |
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PRELIMINARY |
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CMOS SRAM |
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ABSOLUTE MAXIMUM RATINGS* |
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Parameter |
Symbol |
Rating |
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Unit |
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Voltage on Any Pin Relative to VSS |
VIN, VOUT |
-0.5 to 7.0 |
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V |
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Voltage on VCC Supply Relative to VSS |
VCC |
-0.5 to 7.0 |
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V |
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Power Dissipation |
PD |
1.0 |
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W |
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Storage Temperature |
TSTG |
-65 to 150 |
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°C |
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Operating Temperature |
Commercial |
TA |
0 to 70 |
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°C |
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Industrial |
TA |
-40 to 85 |
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°C |
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*Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS(TA=0 to 70°C)
Parameter |
Symbol |
Min |
Typ |
Max |
Unit |
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Supply Voltage |
VCC |
4.5 |
5.0 |
5.5 |
V |
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Ground |
VSS |
0 |
0 |
0 |
V |
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Input High Voltage |
VIH |
2.2 |
- |
VCC+0.5** |
V |
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Input Low Voltage |
VIL |
-0.5* |
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0.8 |
V |
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NOTE: The above parameters are also guaranteed at industrial temperature range.
*VIL(Min) = -2.0(Pulse Width≤7ns) for I≤20mA
**VIH(Max) = VCC+2.0V(Pulse Width≤7ns) for I≤20mA
DC AND OPERATING CHARACTERISTICS(TA=0 to 70°C,VCC=5.0V±10% unless otherwise specified)
Parameter |
Symbol |
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Test Conditions |
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Min |
Max |
Unit |
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Input Leakage Current |
ILI |
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VIN = VSS to VCC |
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-1 |
1 |
mA |
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mA |
Output Leakage Current |
ILO |
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CS=VIH or OE=VIH or WE=VIL |
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-1 |
1 |
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VOUT = VSS to VCC |
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Operating Current |
ICC |
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Min. Cycle, 100% Duty |
10ns |
- |
80 |
mA |
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CS=VIL, VIN = VIH or VIL, |
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12ns |
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80 |
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IOUT=0mA |
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15ns |
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80 |
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Standby Current |
ISB |
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Min. Cycle, CS=VIH |
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20 |
mA |
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f=0MHz, |
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³VCC-0.2V, |
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ISB1 |
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CS |
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2 |
mA |
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VIN³VCC-0.2V or VIN£0.2V |
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Output Low Voltage Level |
VOL |
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IOL=8mA |
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- |
0.4 |
V |
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Output High Voltage Level |
VOH |
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IOH=-4mA |
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2.4 |
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V |
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VOH1* |
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IOH1=0.1mA |
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3.95 |
V |
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NOTE: The above parameters are also guaranteed at industrial temperature range. * VCC=5.0V, Temp.=25°C
CAPACITANCE*(TA=25°C, f=1.0MHz)
Item |
Symbol |
Test Conditions |
MIN |
Max |
Unit |
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Input/Output Capacitance |
CI/O |
VI/O=0V |
- |
8 |
pF |
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Input Capacitance |
CIN |
VIN=0V |
- |
7 |
pF |
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* NOTE : Capacitance is sampled and not 100% tested.
- 3 -
Revision 0.0
August 1998