Samsung KM681002ATI-12, KM681002AT-20, KM681002AT-15, KM681002AT-12, KM681002AJI-12 Datasheet

KM681002A, KM681002AI	CMOS SRAM

Document Title

128Kx8 High Speed Static RAM(5V Operating), Revolutionary Pin out. Operated at Commercial and Industrial Temperature Range.

Revision History

Rev.No.	History
Rev. 0.0	Initial release with Preliminary.
Rev. 1.0	Release to final Data Sheet.
	1.1. Delete Preliminary
Rev. 2.0	Update D.C parameters.
	2.1. Update D.C parameters
	Items	Previous spec.	Updated spec.
		(12/15/17/20ns part)	(12/15/17/20ns part)
	Icc	200/190/180/170mA	170/165/165/160mA
	Isb	30mA	25mA
	Isb1	10mA	8mA

Rev. 3.0 Add Industrial Temperature Range parts and 300mil-SOJ PKG.

3.1.Add 32-Pin 300mil-SOJ Package.

3.2.Add Industrial Temperature Range parts with the same parameters as Commercial Temperature Range parts.

3.2.1.Add KM68002AI parts for Industrial Temperature Range.

3.2.2.Add ordering information.

3.2.3.Add the condition for operating at Industrial Temp. Range.

3.3.Add the test condition for Voh1 with Vcc=5V±5% at 25°C

3.4.Add timing diagram to define tWP as ²(Timing Wave Form of Write Cycle(CS=Controlled)²

DraftData

Apr. 22th, 1995

Feb. 29th, 1996

Jul. 16th, 1996

Jun. 2nd, 1997

Rev. 4.0

4.1. Delete 17ns Part

Feb. 25th, 1998

Remark

Preliminary

Final

Final

Final

Final

The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any questions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.

	- 1 -	Rev 4.0
		Ferruary 1998

KM681002A, KM681002AI		CMOS SRAM
128K x 8 Bit High-Speed CMOS Static RAM
FEATURES		GENERAL DESCRIPTION
• Fast Access Time 12, 15, 20ns(Max.)		The KM681002A is a 1,048,576-bit high-speed Static Random
• Low Power Dissipation		Access Memory organized as 131,072 words by 8 bits. The
Standby (TTL)	: 25mA(Max.)	KM681002A uses 8 common input and output lines and has an
(CMOS)	: 8mA(Max.)	output enable pin which operates faster than address access
Operating KM681002A - 12 : 170mA(Max.)		time at read cycle. The device is fabricated using Samsung′s
KM681002A - 15 : 165mA(Max.)		advanced CMOS process and designed for high-speed circuit
KM681002A - 20 : 160mA(Max.)		technology. It is particularly well suited for use in high-density
• Single 5.0V±10% Power Supply		high-speed system applications. The KM681002A is packaged
• TTL Compatible Inputs and Outputs		in a 400mil 32-pin plastic SOJ or TSOP2 forward.

•I/O Compatible with 3.3V Device

•Fully Static Operation

-No Clock or Refresh required

•	Three State Outputs	ORDERING INFORMATION
• Center Power/Ground Pin Configuration			KM681002A -12/15/20	Commercial Temp.
•	Standard Pin Configuration
			KM681002AI -12/15/20	Industrial Temp.
	KM681002AJ : 32-SOJ-400
	KM681002AT: 32-TSOP2-400F

FUNCTIONAL BLOCK DIAGRAM

A0				Clk Gen.					Pre-Charge Circuit
A1
A2							Select
A3										Memory Array
A4							Row			512 Rows
A5									256x8 Columns
A6

A7
A8
I/O1~I/O8	Data		I/O Circuit
	Cont.		Column Select
	CLK
	Gen.
	A9	A10	A11 A12 A13 A14	A15	A16
CS
WE
OE

PIN CONFIGURATION(Top View)

		A0			1		32	A16
		A1			2		31	A15
		A2			3		30	A14
		A3			4		29	A13
		CS			5		28		OE
I/O1					6		27	I/O8
I/O2								I/O7
					7		26
Vcc								Vss
					8	SOJ/	25
Vss								Vcc
					9	TSOP2	24
I/O3					10		23	I/O6
I/O4								I/O5
					11		22
								A12
	WE				12		21
		A4						A11
					13		20
		A5						A10
					14		19
		A6			15		18		A9
		A7			16		17		A8

PIN FUNCTION

Pin Name					Pin Function
A0 - A16					Address Inputs
					Write Enable
	WE
					Chip Select
		CS
					Output Enable
		OE
I/O1 ~ I/O8					Data Inputs/Outputs
VCC					Power(+5.0V)
VSS					Ground

	- 2 -	Rev 4.0
		Ferruary 1998

	KM681002A, KM681002AI				CMOS SRAM
	ABSOLUTE MAXIMUM RATINGS*
	Parameter		Symbol	Rating	Unit
	Voltage on Any Pin Relative to VSS		VIN, VOUT	-0.5 to 7.0	V
	Voltage on VCC Supply Relative to VSS		VCC	-0.5 to 7.0	V
	Power Dissipation		PD	1.0	W
	Storage Temperature		TSTG	-65 to 150	°C
	Operating Temperature	Commercial	TA	0 to 70	°C
		Industrial	TA	-40 to 85	°C

*Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

RECOMMENDED DC OPERATING CONDITIONS(TA=0 to 70°C)

Parameter	Symbol	Min	Typ	Max	Unit
Supply Voltage	VCC	4.5	5.0	5.5	V
Ground	VSS	0	0	0	V
Input High Voltage	VIH	2.2	-	VCC + 0.5**	V
Input Low Voltage	VIL	-0.5*	-	0.8	V

NOTE: The above parameters are also guaranteed at industrial temperature range.

*VIL(Min) = -2.0V a.c(Pulse Width≤10ns) for I≤20mA

**VIH(Max) = VCC + 2.0V a.c (Pulse Width≤10ns) for I≤20mA

DC AND OPERATING CHARACTERISTICS(TA=0 to 70°C, Vcc=5.0V±10%, unless otherwise specified)

Parameter

Symbol

Test Conditions

Min

Max

Unit

Input Leakage Current

ILI

VIN=VSS to VCC

-2

2

mA

Output Leakage Current

ILO

-2

2

mA

CS=VIH or OE=VIH or WE=VIL

VOUT=VSS to VCC

Operating Current

ICC

Min. Cycle, 100% Duty

12ns

-

170

mA

CS=VIL, VIN=VIH or VIL,

15ns

-

165

IOUT=0mA

20ns

-

160

Standby Current

ISB

Min. Cycle,

-

25

mA

CS=VIH

ISB1

f=0MHz,

³VCC-0.2V,

-

8

mA

CS

VIN³VCC-0.2V or VIN£0.2V

Output Low Voltage Level

VOL

IOL=8mA

-

0.4

V

Output High Voltage Level

VOH

IOH=-4mA

2.4

-

V

VOH1*

IOH1=-0.1mA

-

3.95

V

NOTE: The above parameters are also guaranteed at industrial temperature range. * VCC=5.0V, Temp.=25°C

CAPACITANCE*(TA=25°C, f=1.0MHz)

Item	Symbol	Test Conditions	MIN	Max	Unit
Input/Output Capacitance	CI/O	VI/O=0V	-	8	pF
Input Capacitance	CIN	VIN=0V	-	6	pF

* NOTE : Capacitance is sampled and not 100% tested.

	- 3 -	Rev 4.0
		Ferruary 1998