Texas Instruments MSP50P34DWI2D, MSP50P34N16I2D, MSP50P34DWE1A, MSP50P34N16E1A Datasheet

MSP50C32, MSP50C33, MSP50C34

MSP50P34, MSP50C37, MSP50P37

MIXED-SIGNAL PROCESSORS

SPSS019A ± MAY 1997 ± REVISED OCTOBER 1998

D Dual Programmable LPC-12 Speech		N PACKAGE
Synthesizers			(TOP VIEW)
D Simultaneous LPC and PCM Waveforms	PA6		1	16			PA7
D 8-Bit Microprocessor with 61 instructions
	PA5		2	15			PB0
D 32 Twelve-Bit Words and 224 Bytes of RAM	PA4		3	14			PA0
D 3.3V to 6.5V CMOS Technology for Low	PA3		4	13			DAC+
Power Dissipation	PA2		5	12			DAC±
	PA1		6	11			V	DD
D Direct Speaker Drive Capability
	PB1/OSC OUT		7	10
D Mask Selectable Internal or External Clock							VSS
	OSC IN		8	9			INIT
D Internal Clock Generator that Requires No
External Components
D Two Software-Selectable Clock Speeds
D 10-kHz or 8-kHz Speech Sample Rate

description

The MSP50x3x family uses a revolutionary architecture to combine an 8-bit microprocessor, two speech synthesizers, ROM, RAM, and I/O in a low-cost single-chip system. The architecture uses the same arithmetic logic unit (ALU) for the two synthesizers and the microprocessor, thus reducing chip area and cost and enabling the microprocessor to do a multiply operation in 0.8 s. The MSP50x3x family features two independent channels of linear predictive coding (LPC), which synthesize high-quality speech at a low data rate. Pulse-code modulation (PCM) can produce music or sound effects. LPC and PCM can be added together to produce a composite result. For more information, see the MSP50x3x User's Guide (literature number SPSU006).

Table 1. MSP50x3x Family

DEVICE	AMOUNT OF ROM/PROM	FEATURES
MSP50C32	16K bytes mask ROM	9/10 I/O lines
MSP50C33	32K bytes mask ROM	9/10 I/O lines
MSP50C34	64K bytes mask ROM	9/10 I/O lines, 24 I/O lines in die form
MSP50P34	64K bytes PROM	9/10 I/O lines
MSP50C37	16K bytes mask ROM	18 I/O lines, A/D converter/analog amplifier
MSP50P37	16K bytes PROM	18 I/O lines, A/D converter/analog amplifier

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1998, Texas Instruments Incorporated

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MSP50C32, MSP50C33, MSP50C34

MSP50P34, MSP50C37, MSP50P37

MIXED-SIGNAL PROCESSORS

SPSS019A ± MAY 1997 ± REVISED OCTOBER 1998

absolute maximum ratings over operating free-air temperature range²

Supply voltage range, VDD (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . ±0.3 V to 8	V
Supply current, IDD or ISS (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . . . . . . . . 100 mA
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	±0.3 V to VDD + 0.3	V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	±0.3 V to VDD + 0.3	V
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . . ±30°C to 125°C

²Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltages are with respect to ground.

2.The total supply current includes the current out of all the I/O terminals and DAC terminals as well as the operating current of the device.

recommended operating conditions (MSP50C32, MSP50C33, MSP50x34)

			MAX	MAX	UNIT
V	Supply voltage²		3.3	6.5	V
DD
		VDD = 3.3 V	2.5	3.3
VIH	High-level input voltage	VDD = 5 V	3.8	5	V
		VDD = 6 V	4.5	6
		VDD = 3.3 V	0	0.65
VIL	Low-level input voltage	VDD = 5 V	0	1	V
		VDD = 6 V	0	1.3
TA	Operating free-air temperature	Device functionality	0	70	°C
Rspeaker	Minimum speaker impedance	Direct speaker drive using 2 pin push-pull DAC option	32		Ω

² Unless otherwise noted, all voltages are with respect to VSS.

recommended operating conditions (MSP50x37)

			MIN	MAX	UNIT
V	Supply voltage²		4	6.5	V
DD
		VDD = 4 V	3	4
VIH	High-level input voltage	VDD = 5 V	3.8	5	V
		VDD = 6 V	4.5	6
		VDD = 4 V	0	1
VIL	Low-level input voltage	VDD = 5 V	0	1.2	V
		VDD = 6 V	0	1.5
	MUX input voltage	Reference voltage = 6.5 V	0	6.5	V
TA	Operating free-air temperature	Device functionality	±10	70	°C
Rspeaker	Minimum speaker impedance	Direct speaker drive using power amp	8		Ω

4	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

MSP50C32, MSP50C33, MSP50C34

MSP50P34, MSP50C37, MSP50P37

MIXED-SIGNAL PROCESSORS

SPSS019A ± MAY 1997 ± REVISED OCTOBER 1998

MSP50C32, MSP50C33, MSP50x34 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)

		PARAMETER			TEST CONDITIONS		MIN	TYP	MAX	UNIT
	VT+	Positive-going threshold voltage (INIT)			VDD = 3.5 V			2		V
					VDD = 6 V			3.4
	VT±	Negative-going threshold voltage (INIT)			VDD = 3.5 V			1.6		V
					VDD = 6 V			2.3
	Vhys	Hysteresis ( VT+ ± VT±) (INIT)			VDD = 3.5 V			0.4		V
					VDD = 6 V			1.1
	IIkg	Input leakage current (except for OSC IN)							2	µA
	Istandby								10	µA
		Standby current	(INIT	low, SETOFF)
					VDD = 3.3 V,	VOH = 2.75 V		2.1
	IDD²	Supply current			VDD = 5 V,	VOH = 4.5 V		3.1		mA
					VDD = 6 V,	VOH = 5.5 V		4.5
					VDD = 3.3 V,	VOH = 2.75 V	± 4	±12
					VDD = 5 V,	VOH = 4.5 V	±5	±14		mA
	IOH	High-level output current (PA, PB)			VDD = 6 V,	VOH = 5.5 V	±6	± 15
					VDD = 3.3 V,	VOH = 2.2 V	± 8	±20
					VDD = 5 V,	VOH = 3.33 V	±14	± 40		mA
					VDD = 6 V,	VOH = 4 V	± 20	± 51
					VDD = 3.3 V,	VOL = 0.5 V	5	9
					VDD = 5 V,	VOL = 0.5 V	5	9		mA
	IOL	Low-level output current (PA, PB)			VDD = 6 V,	VOL = 0.5 V	5	9
					VDD = 3.3 V,	VOL = 1.1 V	10	19
					VDD = 5 V,	VOL = 1.67 V	20	29		mA
					VDD = 6 V,	VOL = 2 V	25	35
					VDD = 3.3 V,	VOH = 2.75 V	± 30	±50
					VDD = 5 V,	VOH = 4.5 V	±35	±60		mA
	IOH	High-level output current (D/A)			VDD = 6 V,	VOH = 5.5 V	±40	± 65
					VDD = 3.3 V,	VOH = 2.3 V	± 50	±90
					VDD = 5 V,	VOH = 4 V	±90	± 140		mA
					VDD = 6 V,	VOH = 5 V	± 100	± 150
					VDD = 3.3 V,	VOL = 0.5 V	50	80
					VDD = 5 V,	VOL = 0.5 V	70	90		mA
	IOL	Low-level output current (D/A)			VDD = 6 V,	VOL = 0.5 V	80	110
					VDD = 3.3 V,	VOL = 1 V	100	140
					VDD = 5 V,	VOL = 1 V	140			mA
					VDD = 6 V,	VOL = 1 V	150
		Pullup resistance			Resistors selected by software and		10	20	50	kΩ
					connected between terminal and VDD
	fosc(low)	Oscillator frequency³			VDD = 5 V,	TA = 25°C,	14.89	15.36	15.86	MHz
					Target frequency = 15.36 MHz
	fosc(high)	Oscillator frequency³			VDD = 5 V,	TA = 25°C,	18.62	19.2	19.7	MHz
					Target frequency = 19.2 MHz

² Operating current assumes all inputs are tied to either VSS or VDD with no input currents due to programmed pullup resistors. The DAC output and other outputs are open circuited.

³ The frequency of the internal clock has a temperature coefficient of approximately ± 0.2 % /°C and a VDD coefficient of approximately ±1%/V.

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