NSC LM2623AMM, LM2623AMDC, LM2623ALDX, LM2623MMX, LM2623LDX Datasheet
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July 2003
LM2623
General Purpose, Gated Oscillator Based, DC/DC Boost
Converter
General Description
The LM2623 is a high efficiency, general purpose, step-up DC-DC switching regulator for battery-powered and low input voltage systems. It accepts an input voltage between .8 and 14 volts and converts it into a regulated output voltage between 1.24 and 14 volts. Efficiencies up to 90% are achievable with the LM2623.
In order to adapt to a number of applications, the LM2623 allows the designer to vary the output voltage, the operating frequency (300kHz to 2 MHz) and duty cycle (17% to 90%) to optimize the part’s performance. The selected values can be fixed or can vary with battery voltage or input to output voltage ratio. The LM2623 uses a very simple, on/off regulation mode to produce good efficiency and stable operation over a wide operating range. It normally regulates by skipping switching cycles when it reaches the regulation limit (Pulse Frequency Modulation).
Note: Please read the "Non-Linear Effect" and "Choosing The Correct C3 Capacitor" sub-sections of the Design Procedure section of this data sheet, so that any challenges with designing with this part can be taken into account before a board design/layout is finalized.
For Alternative Solutions, See Also: LM2700, LM2622, LM2731, LM2733, and LM2621.
Features
nGood Efficiency Over a Very Wide Load Range
nVery Low Output Voltage Ripple
nSmall, Mini-SO-8 Package (Half the Footprint of Standard 8 pin SO Package)
n1.09 mm Package Height
nUp to 2 MHz Switching Frequency
n.8V to 14V Operating Voltage
n1.1V Start-up Voltage
n1.24V - 14V Adjustable Output Voltage
nUp to 2A Load Current at low Output Voltages
n0.17Ω Internal MOSFET
nUp to 90% Regulator Efficiency
n80 µA Typical Operating Current (into VDD pin of supply)
n<2.5µA Guaranteed Supply Current In Shutdown
n4mm x 4mm Thermally Enhanced LLP Package Option
Applications
nCameras, Pagers and Cell Phones
nPDAs,Palmtop Computers, GPS devices
nWhite LED Drive, TFT or Scanned LCDs
nFlash Memory Programming
nHand-Held Instruments
n1, 2, 3 or 4 Cell Alkaline Systems
n1, 2 or 3 Cell Lithium-ion Systems
Typical Application Circuit
20038801
Converter Boost DC/DC Based, Oscillator Gated Purpose, General LM2623
© 2003 National Semiconductor Corporation |
DS200388 |
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LM2623
Connection Diagram
LLP Package
20038802
Top View
Mini SO-8 (MM) Package
20038818
Top View
Ordering Information
Order Number |
Package Type |
NSC Package |
Package |
Supplied As |
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Drawing |
Marking |
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LM2623MMX |
Mini SO-8 |
MUA08A |
S46B |
3000 Units on Tape and Reel |
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LM2623AMMX |
Mini SO-8 |
MUA08A |
S46A |
3000 Units on Tape and Reel |
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LM2623AMM |
Mini SO-8 |
MUA08A |
S46A |
1000 Units on Tape and Reel |
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LM2623MM |
Mini SO-8 |
MUA08A |
S46B |
1000 Units on Tape and Reel |
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LM2623LDX |
LLP-14 |
LDA14A |
2623AB |
4500 Units on Tape and Reel |
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LM2623ALDX |
LLP-14 |
LDA14A |
2623A |
4500 Units on Tape and Reel |
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LM2623LD |
LLP-14 |
LDA14A |
2623AB |
1000 Units on Tape and Reel |
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LM2623ALD |
LLP-14 |
LDA14A |
2623A |
1000 Units on Tape and Reel |
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Pin Description
LLP-14 Pin |
MSOP-8 Pin |
Name |
Function |
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1 |
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NC |
No Connect |
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2, 3 |
1 |
PGND |
Power Ground (LLP Pins 2 & 3 must be shorted |
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together). |
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4 |
2 |
EN |
Active-Low Shutdown Input |
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5 |
3 |
FREQ |
Frequency Adjust. An external resistor connected |
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between this pin and a voltage source sets the |
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switching frequency of the LM2623. |
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6 |
4 |
FB |
Output Voltage Feedback |
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7 |
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NC |
No Connect |
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8 |
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NC |
No connect |
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9 |
5 |
SGND |
Signal Ground |
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10 |
6 |
VDD |
Power Supply for Internal Circuitry |
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11 |
7 |
BOOT |
Bootstrap Supply for the Gate Drive of Internal |
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MOSFET Power Switch |
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12, 13 |
8 |
SW |
Drain of the Internal MOSFET Power Switch. (LLP Pins |
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12 & 13 must be shorted together). |
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14 |
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NC |
No Connect |
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DAP |
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DAP |
To be soldered to board for enhanced thermal |
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dissipation. To be electrically isolated/floating. |
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LM2623
3 |
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LM2623
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
SW Pin Voltage |
−0.5 V to 14.5V |
BOOT, VDD, EN and FB Pins |
−0.5V to 10V |
FREQ Pin |
100µA |
TJmax (Note 2) |
150˚C |
Storage Temperature Range |
−65˚C to +150˚C |
Lead Temp. (Soldering, 5 sec) |
260˚C |
Power Dissipation (TA=25˚C) |
500mW |
(Note 2) |
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ESD Rating (Note 3) 2kV
Operating Conditions (Note 1)
VDD Pin |
3V to 5V |
FB, EN Pins |
0 to VDD |
BOOT Pin |
0 to 10V |
Ambient Temperature (TA) |
−40˚C to +85˚C |
Electrical Characteristics
Limits in standard typeface are for TJ = 25˚C, and limits in boldface type apply over the full operating temperature range of −40˚C to +85˚C. Unless otherwise specified: VDD= VOUT= 3.3V.
Symbol |
Parameter |
Condition |
Typ |
Min |
Max |
Units |
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VDD_ST |
Start-Up Supply Voltage 25˚C |
ILOAD = 0mA (Note 4) |
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1.1 |
V |
VIN_OP |
Minimum Operating Supply |
ILOAD = 0mA |
0.65 |
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.8 |
V |
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Voltage (once started) |
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VFB |
FB Pin Voltage |
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1.24 |
1.2028 |
1.2772 |
V |
VOUT_MAX |
Maximum Output Voltage |
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14 |
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V |
η |
Efficiency |
VIN = 3.6V; VOUT = 5V; ILOAD = |
87 |
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500mA |
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% |
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VIN = 2.5V; VOUT = 3.3V; ILOAD |
87 |
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= 200mA |
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D |
Switch Duty Cycle |
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17 |
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% |
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IDD |
Operating Quiescent Current |
FB Pin > 1.3V; EN Pin at VDD |
80 |
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110 |
µA |
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(Note 5) |
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ISD |
Shutdown Quiescent Current |
VDD, BOOT and SW Pins at |
0.01 |
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2.5 |
µA |
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(Note 6) |
5.0V; EN Pin <200mV |
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ICL |
Switch Peak Current Limit |
LM2623A |
2. 85 |
2.2 |
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A |
IC |
Switch Peak Current Limit |
LM2623 |
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1.2 |
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A |
RDS_ON |
MOSFET Switch On |
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0.17 |
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0.26 |
Ω |
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Resistance |
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θJA |
Thermal Resistance |
MM Package, Junction to |
240 |
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˚C/W |
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Ambient(Note 2) |
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θJA |
Thermal Resistance |
LLP Package, Junction to |
40 |
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˚C/W |
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Ambient(Notes 2, 8) |
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θJA |
Thermal Resistance |
LLP Package, Junction to |
56 |
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˚C/W |
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Ambient(Notes 2, 9) |
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Enable Section |
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VEN_LO |
EN Pin Voltage Low (Note 7) |
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0.15VDD |
V |
VEN_HI |
EN Pin Voltage High (Note 7) |
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0.7VDD |
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V |
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device outside of its rated operating conditions.
Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by Tjmax (maximum junction temperature), θJA (junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is Pdmax = (Tjmax - TA)/ θJA or the number given in the Absolute Maximum Ratings, whichever is lower.
Note 3: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. For Pin 8 (SW) the ESD rating is 1.0 kV.
Note 4: VDD tied to Boot and EN pins. Frequency pin tied to VDD through 121K resistor. VDD_ST = VDD when startu-up occurs. VIN is VDD + D1 voltage (usually 10-50 mv at start-up)
Note 5: This is the current into the VDD pin.
Note 6: This is the total current into pins VDD, BOOT, SW and FREQ.
Note 7: When the EN pin is below VEN_LO, the regulator is shut down; when it is above VEN_HI, the regulator is operating.
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