Texas Instruments JM38510-65802BFA, JM38510-65802BEA, JM38510-65802B2A, SN54HC138J, SN74HC138D Datasheet

					SN54HC138, SN74HC138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
	SCLS107C ± DECEMBER 1982 ± REVISED MAY 1997
D Designed Specifically for High-Speed	SN54HC138 . . . J OR W PACKAGE
Memory Decoders and Data Transmission	SN74HC138 . . . D, N, OR PW PACKAGE
Systems					(TOP VIEW)
D Incorporate Three Enable Inputs to Simplify			A		1	16	VCC
Cascading and/or Data Reception
			B		2	15	Y0
D Package Options Include Plastic			C		3	14	Y1
Small-Outline (D), Thin Shrink		G2A			4	13	Y2
Small-Outline (PW), and Ceramic Flat (W)							Y3
		G2B			5	12
Packages, Ceramic Chip Carriers (FK), and		G1			6	11	Y4
Standard Plastic (N) and Ceramic (J)			Y7		7	10	Y5
300-mil DIPs	GND				8	9	Y6

description

The 'HC138 are designed to be used in high-performance memory-decoding or datarouting applications requiring very short propagation delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.

SN54HC138 . . . FK PACKAGE

(TOP VIEW)

	B	A	NC	CC	Y0
				V
C	3	2	1	20 19		Y1
	4				18
G2A	5				17	Y2
NC	6				16	NC
G2B	7				15	Y3
G1	8				14	Y4
	9 10 11 12 13
	Y7	GND	NC	Y6	Y5

The conditions at the binary-select inputs at the three enable inputs select one of eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications.

NC ± No internal connection

The SN54HC138 is characterized for operation over the full military temperature range of ±55°C to 125°C. The SN74HC138 is characterized for operation from ±40°C to 85°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1997, Texas Instruments Incorporated

POST OFFICE BOX 655303 •DALLAS, TEXAS 75265

1

SN54HC138, SN74HC138

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

SCLS107C ± DECEMBER 1982 ± REVISED MAY 1997

FUNCTION TABLE

INPUTS

OUTPUTS

ENABLE

SELECT

G1

C

B

A

Y0

Y1

Y2

Y3

Y4

Y5

Y6

Y7

G2A

G2B

X

H

X

X

X

X

H

H

H

H

H

H

H

H

X

X

H

X

X

X

H

H

H

H

H

H

H

H

L

X

X

X

X

X

H

H

H

H

H

H

H

H

H

L

L

L

L

L

L

H

H

H

H

H

H

H

H

L

L

L

L

H

H

L

H

H

H

H

H

H

H

L

L

L

H

L

H

H

L

H

H

H

H

H

H

L

L

L

H

H

H

H

H

L

H

H

H

H

H

L

L

H

L

L

H

H

H

H

L

H

H

H

H

L

L

H

L

H

H

H

H

H

H

L

H

H

H

L

L

H

H

L

H

H

H

H

H

H

L

H

H

L

L

H

H

H

H

H

H

H

H

H

H

L

logic symbols (alternatives)²

						BIN/OCT		15
	1					0			Y0	1
		A			1			14			A
	2				2	1			Y1	2
								13
		B				2			Y2		B
	3							12		3
		C			4	3			Y3		C
							4	11	Y4
	6				&					6
								10
		G1					5		Y5		G1
			4				EN	9				4
	G2A						6		Y6	G2A
			5					7				5
	G2B						7		Y7	G2B

² These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, N, PW, and W packages.

0		DMUX		0	15	Y0
					14
		G 0		1		Y1
					13
2		7		2		Y2
					12
				3		Y3
					11
&				4		Y4
					10
				5		Y5
					9
				6		Y6
					7
				7		Y7

2	POST OFFICE BOX 655303 •DALLAS, TEXAS 75265