Texas Instruments JM38510-34105BSA, JM38510-34105BRA, JM38510-34105B2A, SN54F374J, SN74F374N3 Datasheet

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SN54F374, SN74F374

 

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS

 

 

 

 

 

 

 

 

 

WITH 3-STATE OUTPUTS

 

SDFS077A ± D2932, MARCH 1987 ± REVISED OCTOBER 1993

 

 

 

 

 

 

 

 

 

 

 

 

Eight D-Type Flip-Flops in a Single Package

SN54F374 . . . J PACKAGE

3-State Bus-Driving True Outputs

SN74F374 . . . DB, DW, OR N PACKAGE

 

 

 

 

 

 

 

(TOP VIEW)

 

Full Parallel Access for Loading

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Buffered Control Inputs

 

 

 

 

 

 

 

 

VCC

 

OE

 

 

 

 

1

20

 

 

Package Options Include Plastic

 

1Q

 

2

19

 

 

8Q

Small-Outline (SOIC) and Shrink

 

1D

3

18

 

 

8D

Small-Outline (SSOP) Packages, Ceramic

 

2D

 

4

17

 

 

7D

Chip Carriers, and Plastic and Ceramic

 

2Q

 

5

16

 

 

7Q

DIPs

 

3Q

 

6

15

 

 

6Q

 

 

3D

 

7

14

 

 

6D

description

 

4D

 

 

 

8

13

 

 

5D

 

 

4Q

 

9

12

 

 

5Q

These 8-bit flip-flops feature 3-state outputs

 

GND

10

 

11

CLK

designed specifically for driving highly capacitive

 

 

 

 

 

 

 

 

or relatively low-impedance loads. They are

 

SN54F374 . . . FK PACKAGE

particularly

suitable

for

implementing

buffer

 

registers, I/O ports, bidirectional bus drivers, and

 

 

(TOP VIEW)

 

 

 

 

 

 

CC

 

 

 

working registers.

 

 

 

 

1D

1Q

 

8Q

 

The eight flip-flops of the ′F374 are edge-triggered

 

OE V

 

 

3

2

1

20 19

 

D-type flip-flops. On the positive transition of the

2D

8D

clock (CLK) input, the Q outputs are set to the logic

4

 

 

 

 

18

2Q

5

 

 

 

 

17

7D

levels that were set up at the data (D) inputs.

 

 

 

 

3Q

6

 

 

 

 

16

7Q

 

 

 

 

 

 

 

 

 

A buffered output enable (OE) input can be used

3D

7

 

 

 

 

15

6Q

to place the eight outputs in either a normal logic

4D

8

 

 

 

 

14

6D

state (high or low) or a high-impedance state. In

 

9

10 11 12 13

 

 

 

 

 

 

 

 

 

the high-impedance state, the outputs neither

 

4Q

GND

CLK

5Q

5D

 

load nor drive the bus lines significantly. The

 

 

high-impedance state and the increased drive

 

 

 

 

 

 

 

 

provide the capability to drive bus lines without

 

 

 

 

 

 

 

 

need for interface or pullup components.

 

 

 

 

 

 

 

 

 

The output enable (OE) input does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN74F374 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN54F374 is characterized for operation over the full military temperature range of ±55°C to 125°C. The SN74F374 is characterized for operation from 0°C to 70°C.

FUNCTION TABLE (each flip-flop)

 

 

INPUTS

 

OUTPUT

 

 

CLK

D

Q

 

OE

 

L

H

H

 

L

L

L

 

L

H or L

X

Q0

 

H

X

X

Z

 

 

 

 

 

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Copyright 1993, Texas Instruments Incorporated

POST OFFICE BOX 655303 DALLAS, TEXAS 75265

2±1

Texas Instruments JM38510-34105BSA, JM38510-34105BRA, JM38510-34105B2A, SN54F374J, SN74F374N3 Datasheet

SN54F374, SN74F374

OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SDFS077A ± D2932, MARCH 1987 ± REVISED OCTOBER 1993

logic symbol²

logic diagram (positive logic)

 

 

1

 

 

 

 

 

 

 

 

 

 

 

OE

 

EN

 

 

 

 

 

11

 

C1

 

 

CLK

 

 

 

3

 

 

 

2

 

 

 

 

 

 

1D

1D

 

1Q

 

 

4

 

 

 

5

 

 

 

 

 

 

2D

 

 

 

 

 

2Q

 

 

 

 

 

 

7

 

 

 

6

 

 

 

 

 

 

3D

 

 

 

 

 

3Q

 

 

 

 

 

9

8

 

 

 

4Q

 

 

 

 

4D

 

 

 

 

 

 

 

 

 

 

12

13

 

 

 

5Q

 

 

 

 

5D

 

 

 

 

 

 

 

 

 

15

 

 

 

 

 

14

 

 

 

6Q

 

 

 

 

6D

 

 

 

 

 

 

 

 

 

16

 

 

 

 

 

17

 

 

 

7Q

 

 

 

 

7D

 

 

 

 

 

 

 

 

 

19

18

 

 

 

8Q

 

 

 

 

8D

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OE

1

 

 

 

 

 

 

 

CLK

11

 

 

 

 

 

 

 

 

3

C1

2

1Q

1D

1D

 

 

 

 

 

 

To Seven Other Channels

 

 

²This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)³

Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . ±0.5 V to 7

V

Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. ±1.2 V to 7

V

Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±30 mA to 5 mA

Voltage range applied to any output in the disabled or power-off state . . . . . . . . . . . . . . . . . . .

±0.5 V to 5.5

V

Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±0.5 V to VCC

Current into any output in the low state: SN54F374 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . 40 mA

SN74F374 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . 48 mA

Operating free-air temperature range: SN54F374 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±55°C to 125°C

SN74F374 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . 0°C to 70°C

Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

±65°C to 150°C

³Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.

recommended operating conditions

 

 

SN54F374

 

SN74F374

 

UNIT

 

 

 

 

 

 

 

 

 

 

MIN

NOM

MAX

MIN

NOM

MAX

 

 

 

 

 

 

 

 

 

 

 

 

VCC

Supply voltage

4.5

5

5.5

4.5

5

5.5

V

VIH

High-level input voltage

2

 

 

2

 

 

V

VIL

Low-level input voltage

 

 

0.8

 

 

0.8

V

IIK

Input clamp current

 

 

± 18

 

 

± 18

mA

IOH

High-level output current

 

 

± 3

 

 

± 3

mA

IOL

Low-level output current

 

 

20

 

 

24

mA

TA

Operating free-air temperature

± 55

 

125

0

 

70

°C

2±2

POST OFFICE BOX 655303 DALLAS, TEXAS 75265

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