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SN54F374, SN74F374 |
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OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS |
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WITH 3-STATE OUTPUTS |
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SDFS077A ± D2932, MARCH 1987 ± REVISED OCTOBER 1993 |
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• Eight D-Type Flip-Flops in a Single Package |
SN54F374 . . . J PACKAGE |
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• 3-State Bus-Driving True Outputs |
SN74F374 . . . DB, DW, OR N PACKAGE |
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(TOP VIEW) |
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• Full Parallel Access for Loading |
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• Buffered Control Inputs |
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VCC |
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OE |
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1 |
20 |
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• Package Options Include Plastic |
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1Q |
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2 |
19 |
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8Q |
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Small-Outline (SOIC) and Shrink |
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1D |
3 |
18 |
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8D |
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Small-Outline (SSOP) Packages, Ceramic |
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2D |
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4 |
17 |
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7D |
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Chip Carriers, and Plastic and Ceramic |
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2Q |
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5 |
16 |
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7Q |
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DIPs |
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3Q |
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6 |
15 |
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6Q |
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3D |
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7 |
14 |
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6D |
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description |
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4D |
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8 |
13 |
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5D |
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4Q |
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9 |
12 |
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5Q |
These 8-bit flip-flops feature 3-state outputs |
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GND |
10 |
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11 |
CLK |
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designed specifically for driving highly capacitive |
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or relatively low-impedance loads. They are |
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SN54F374 . . . FK PACKAGE |
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particularly |
suitable |
for |
implementing |
buffer |
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registers, I/O ports, bidirectional bus drivers, and |
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(TOP VIEW) |
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CC |
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working registers. |
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1D |
1Q |
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8Q |
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The eight flip-flops of the ′F374 are edge-triggered |
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OE V |
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3 |
2 |
1 |
20 19 |
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D-type flip-flops. On the positive transition of the |
2D |
8D |
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clock (CLK) input, the Q outputs are set to the logic |
4 |
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18 |
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2Q |
5 |
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17 |
7D |
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levels that were set up at the data (D) inputs. |
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3Q |
6 |
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16 |
7Q |
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A buffered output enable (OE) input can be used |
3D |
7 |
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15 |
6Q |
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to place the eight outputs in either a normal logic |
4D |
8 |
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14 |
6D |
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state (high or low) or a high-impedance state. In |
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9 |
10 11 12 13 |
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the high-impedance state, the outputs neither |
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4Q |
GND |
CLK |
5Q |
5D |
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load nor drive the bus lines significantly. The |
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high-impedance state and the increased drive |
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provide the capability to drive bus lines without |
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need for interface or pullup components. |
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The output enable (OE) input does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The SN74F374 is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54F374 is characterized for operation over the full military temperature range of ±55°C to 125°C. The SN74F374 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE (each flip-flop)
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INPUTS |
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OUTPUT |
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CLK |
D |
Q |
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OE |
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L |
↑ |
H |
H |
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L |
↑ |
L |
L |
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L |
H or L |
X |
Q0 |
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H |
X |
X |
Z |
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PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1993, Texas Instruments Incorporated
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
2±1 |
SN54F374, SN74F374
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDFS077A ± D2932, MARCH 1987 ± REVISED OCTOBER 1993
logic symbol² |
logic diagram (positive logic) |
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1 |
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OE |
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EN |
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11 |
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C1 |
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CLK |
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3 |
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2 |
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1D |
1D |
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1Q |
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4 |
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5 |
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2D |
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2Q |
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7 |
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6 |
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3D |
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3Q |
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9 |
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8 |
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4Q |
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4D |
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12 |
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5Q |
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5D |
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15 |
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14 |
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6Q |
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6D |
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16 |
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17 |
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7Q |
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7D |
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19 |
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18 |
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8Q |
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8D |
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OE |
1 |
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CLK |
11 |
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3 |
C1 |
2 |
1Q |
1D |
1D |
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To Seven Other Channels |
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²This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)³
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . ±0.5 V to 7 |
V |
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. ±1.2 V to 7 |
V |
Input current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
±30 mA to 5 mA |
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Voltage range applied to any output in the disabled or power-off state . . . . . . . . . . . . . . . . . . . |
±0.5 V to 5.5 |
V |
Voltage range applied to any output in the high state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
±0.5 V to VCC |
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Current into any output in the low state: SN54F374 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . 40 mA |
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SN74F374 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . 48 mA |
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Operating free-air temperature range: SN54F374 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
±55°C to 125°C |
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SN74F374 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . 0°C to 70°C |
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Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
±65°C to 150°C |
³Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.
recommended operating conditions
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SN54F374 |
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SN74F374 |
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UNIT |
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MIN |
NOM |
MAX |
MIN |
NOM |
MAX |
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VCC |
Supply voltage |
4.5 |
5 |
5.5 |
4.5 |
5 |
5.5 |
V |
VIH |
High-level input voltage |
2 |
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2 |
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V |
VIL |
Low-level input voltage |
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0.8 |
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0.8 |
V |
IIK |
Input clamp current |
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± 18 |
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± 18 |
mA |
IOH |
High-level output current |
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± 3 |
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± 3 |
mA |
IOL |
Low-level output current |
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20 |
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24 |
mA |
TA |
Operating free-air temperature |
± 55 |
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125 |
0 |
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70 |
°C |
2±2 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |