MOTOROLA SN74LS42DR2, SN74LS42M, SN74LS42MEL, SN74LS42ML1, SN74LS42ML2 Datasheet
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SN74LS42
One-of-Ten Decoder
The LSTTL / MSI SN74LS42 is a Multipurpose Decoder designed to accept four BCD inputs and provide ten mutually exclusive outputs. The LS42 is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all ON Semiconductor
TTL families. |
http://onsemi.com |
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• Multifunction Capability |
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• Mutually Exclusive Outputs |
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• Demultiplexing Capability |
LOW |
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• Input Clamp Diodes Limit High Speed Termination Effects |
POWER |
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SCHOTTKY |
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GUARANTEED OPERATING RANGES
Symbol |
Parameter |
Min |
Typ |
Max |
Unit |
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VCC |
Supply Voltage |
4.75 |
5.0 |
5.25 |
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TA |
Operating Ambient |
0 |
25 |
70 |
°C |
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Temperature Range |
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IOH |
Output Current ± High |
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± 0.4 |
mA |
IOL |
Output Current ± Low |
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8.0 |
mA |
16
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PLASTIC
N SUFFIX
CASE 648
16
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SOIC
D SUFFIX
CASE 751B
ORDERING INFORMATION
Device |
Package |
Shipping |
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SN74LS42N |
16 Pin DIP |
2000 Units/Box |
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SN74LS42D |
16 Pin |
2500/Tape & Reel |
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Semiconductor Components Industries, LLC, 1999 |
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Publication Order Number: |
December, 1999 ± Rev. 6 |
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SN74LS42/D |
SN74LS42
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC |
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A0 |
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A1 |
A2 |
A3 |
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9 |
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8 |
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7 |
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15 |
14 |
13 |
12 |
11 |
10 |
9 |
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NOTE: |
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The Flatpak version |
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has the same pinouts |
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(Connection Diagram) |
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as the Dual In-Line |
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Package. |
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GND |
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4 |
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LOADING (Note a) |
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PIN NAMES |
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HIGH |
LOW |
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A0 ± A3 |
Address Inputs |
0.5 U.L. |
0.25 U.L. |
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to |
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Outputs, Active LOW |
10 U.L. |
5 U.L. |
0 |
9 |
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NOTES:
a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.
LOGIC SYMBOL
15 14 13 12
A0 A1 A2 A3
0 1 2 3 4 5 6 7 8 9
1 2 3 4 5 6 7 9 10 11
VCC = PIN 16
GND = PIN 8
LOGIC DIAGRAM
A0 |
A1 |
A2 |
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A3 |
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12 |
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1 |
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9 |
10 |
11 |
0 |
1 |
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VCC = PIN 16
GND = PIN 8
= PIN NUMBERS
http://onsemi.com
2
SN74LS42
FUNCTIONAL DESCRIPTION
The LS42 decoder accepts four active HIGH BCD inputs and provides ten mutually exclusive active LOW outputs, as shown by logic symbol or diagram. The active LOW outputs facilitate addressing other MSI units with LOW input enables.
The logic design of the LS42 ensures that all outputs are HIGH when binary codes greater than nine are applied to the inputs.
The most significant input A3 produces a useful inhibit function when the LS42 is used as a one-of-eight decoder. The A3 input can also be used as the Data input in an 8-output demultiplexer application.
TRUTH TABLE
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A0 |
A1 A2 A3 |
0 1 2 3 4 5 6 7 8 9 |
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L |
L L L |
L H |
H H H H H H H H |
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H L L L |
H L H |
H H H H H H H |
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L |
H L L |
H H L H |
H H H H H H |
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H H L L |
H H H L H |
H H H H H |
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L |
L H L |
H H H H L H |
H H H H |
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H L H L |
H H H H H L H |
H H H |
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L |
H H L |
H H H H H H L H |
H H |
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H H H L |
H H H H H H H L H |
H |
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L |
L L H |
H H H H H H H H L H |
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H L L H |
H H H H H H H H H L |
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L |
H L H |
H H H H H H H H H H |
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H H L H |
H H H H H H H H H H |
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L |
L H H |
H H H H H H H H H H |
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H L H H |
H H H H H H H H H H |
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L |
H H H |
H H H H H H H H H H |
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H H H H |
H H H H H H H H H H |
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H = HIGH Voltage Level |
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L = LOW Voltage Level |
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http://onsemi.com
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