MOTOROLA SN74LS85D, SN74LS85DR2, SN74LS85M, SN74LS85MEL, SN74LS85ML1 Datasheet
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SN74LS85
4-Bit Magnitude
Comparator
The SN74LS85 is a 4-Bit Magnitude Camparator which compares two 4-bit words (A, B), each word having four Parallel Inputs (A0 ± A3, B0 ± B3); A3, B3 being the most significant inputs. Operation is not restricted to binary codes, the device will work with any monotonic code. Three Outputs are provided: ªA greater than Bº (OA > B), ªA less than Bº (OA < B), ªA equal to Bº (OA = B). Three Expander Inputs, IA > B, IA < B, IA = B, allow cascading without external gates. For proper compare operation, the Expander Inputs to the least significant position must be connected as follows: IA < B= IA > B = L, IA = B = H. For serial (ripple) expansion, the OA > B, OA < B and OA = B Outputs are connected respectively to the IA > B, IA < B, and IA = B Inputs of the next most significant comparator, as shown in Figure 1. Refer to Applications section of data sheet for high speed method of comparing large words.
The Truth Table on the following page describes the operation of the SN74LS85 under all possible logic conditions. The upper 11 lines describe the normal operation under all conditions that will occur in a single device or in a series expansion scheme. The lower five lines describe the operation under abnormal conditions on the cascading inputs. These conditions occur when the parallel expansion technique is used.
•Easily Expandable
•Binary or BCD Comparison
•OA > B, OA < B, and OA = B Outputs Available
GUARANTEED OPERATING RANGES
Symbol |
Parameter |
Min |
Typ |
Max |
Unit |
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|
|
|
|
|
VCC |
Supply Voltage |
4.75 |
5.0 |
5.25 |
V |
TA |
Operating Ambient |
0 |
25 |
70 |
°C |
|
Temperature Range |
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IOH |
Output Current ± High |
|
|
± 0.4 |
mA |
IOL |
Output Current ± Low |
|
|
8.0 |
mA |
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LOW
POWER
SCHOTTKY
16
1
PLASTIC
N SUFFIX
CASE 648
16
1
SOIC
D SUFFIX
CASE 751B
ORDERING INFORMATION
Device |
Package |
Shipping |
|
|
|
SN74LS85N |
16 Pin DIP |
2000 Units/Box |
|
|
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SN74LS85D |
16 Pin |
2500/Tape & Reel |
|
|
|
Semiconductor Components Industries, LLC, 1999 |
1 |
Publication Order Number: |
December, 1999 ± Rev. 6 |
|
SN74LS85/D |
SN74LS85
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC |
|
A3 |
B2 |
|
A2 |
|
A1 |
|
B1 |
|
A0 |
|
B0 |
|
16 |
|
15 |
|
14 |
|
13 |
|
12 |
|
11 |
|
10 |
|
9 |
NOTE:
The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package.
1 |
|
|
2 |
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3 |
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4 |
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5 |
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6 |
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7 |
|
8 |
B |
|
I |
A<B |
|
I |
|
I |
O |
A>B |
O |
A=B |
OA<B |
GND |
||||
3 |
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A=B |
|
A>B |
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|||||
PIN NAMES
A0 ± A3, B0 ± B3
IA = B
IA < B, IA > B
OA > B
OA < B
OA = B
|
LOADING (Note a) |
|
|
HIGH |
LOW |
|
|
|
Parallel Inputs |
1.5 U.L. |
0.75 U.L. |
A = B Expander Inputs |
1.5 U.L. |
0.75 U.L. |
A < B, A > B, Expander Inputs |
0.5 U.L. |
0.25 U.L. |
A Greater than B Output |
10 U.L. |
5 U.L. |
B Greater than A Output |
10 U.L. |
5 U.L. |
A Equal to B Output |
10 U.L. |
5 U.L. |
|
|
|
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.
LOGIC SYMBOL
|
10 12 13 15 |
9 |
11 14 |
1 |
|
4 |
A0 A1 A2 A3 B0 B1 B2 B3 |
5 |
|||
IA>B |
|
OA>B |
|||
2 |
IA<B |
|
OA<B |
7 |
|
3 |
IA=B |
|
OA=B |
6 |
|
VCC = PIN 16
GND = PIN 8
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2
SN74LS85
LOGIC DIAGRAM
A3 |
(15) |
|
|
|
|
B3 |
(1) |
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|
(5) |
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OA>B |
A2 (13) |
|
|
B2 |
(14) |
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|
|
|
A<B |
(2) |
(6) |
(3) |
||
A=B |
(4) |
OA=B |
A>B |
|
|
|
|
|
A1 |
(12) |
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B1 |
(11) |
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|
(7) |
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OA<B |
A0 |
(10) |
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|
|
|
B0 |
(9) |
|
TRUTH TABLE
|
COMPARING INPUTS |
|
CASCADING |
|
OUTPUTS |
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|||
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INPUTS |
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A3,B3 |
A2,B2 |
A1,B1 |
A0,B0 |
IA>B |
IA<B |
IA=B |
OA>B |
OA<B |
OA=B |
A3>B3 |
X |
X |
X |
X |
X |
X |
H |
L |
L |
A3<B3 |
X |
X |
X |
X |
X |
X |
L |
H |
L |
A3=B3 |
A2>B2 |
X |
X |
X |
X |
X |
H |
L |
L |
A3=B3 |
A2<B2 |
X |
X |
X |
X |
X |
L |
H |
L |
A3=B3 |
A2=B2 |
A1>B1 |
X |
X |
X |
X |
H |
L |
L |
A3=B3 |
A2=B2 |
A1<B1 |
X |
X |
X |
X |
L |
H |
L |
A3=B3 |
A2=B2 |
A1=B1 |
A0>B0 |
X |
X |
X |
H |
L |
L |
A3=B3 |
A2=B2 |
A1=B1 |
A0<B0 |
X |
X |
X |
L |
H |
L |
A3=B3 |
A2=B2 |
A1=B1 |
A0=B0 |
H |
L |
L |
H |
L |
L |
A3=B3 |
A2=B2 |
A1=B1 |
A0=B0 |
L |
H |
L |
L |
H |
L |
A3=B3 |
A2=B2 |
A1=B1 |
A0=B0 |
X |
X |
H |
L |
L |
H |
A3=B3 |
A2=B2 |
A1=B1 |
A0=B0 |
H |
H |
L |
L |
L |
L |
A3=B3 |
A2=B2 |
A1=B1 |
A0=B0 |
L |
L |
L |
H |
H |
L |
H = HIGH Level
L = LOW Level
X = IMMATERIAL
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