ST STP4NK60Z, STP4NK60ZFP, STB4NK60Z, STB4NK60Z-1, STD4NK60Z User Manual

P4NK60ZFP

STP4NK60Z-STP4NK60ZFP-STB4NK60Z-1 STB4NK60Z-STD4NK60Z-STD4NK60Z-1

N-CHANNEL600V-1.76Ω-4ATO-220/FP/DPAK/IPAK/D2PAK/I2PAK

Zener-Protected SuperMESH™Power MOSFET

TYPE	VDSS	RDS(on)	ID	Pw
STP4NK60Z	600 V	< 2 Ω	4 A	70 W
STP4NK60ZFP	600 V	< 2 Ω	4 A	25 W
STB4NK60Z	600 V	< 2 Ω	4 A	70 W
STB4NK60Z-1	600 V	< 2 Ω	4 A	70 W
STD4NK60Z	600 V	< 2 Ω	4 A	70 W
STD4NK60Z-1	600 V	< 2 Ω	4 A	70 W

■TYPICAL RDS(on) = 1.76 Ω

■EXTREMELY HIGH dv/dt CAPABILITY

■100% AVALANCHE TESTED

■GATE CHARGE MINIMIZED

■VERY LOW INTRINSIC CAPACITANCES

■VERY GOOD MANUFACTURING REPEATIBILITY

DESCRIPTION

The SuperMESH™ series is obtained through an extreme optimization of ST’s well established stripbased PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh™ products.

APPLICATIONS

■HIGH CURRENT, HIGH SPEED SWITCHING

■IDEAL FOR OFF-LINE POWER SUPPLIES, ADAPTORS AND PFC

■LIGHTING

ORDERING INFORMATION

	3
	1	3
	D2PAK
		2
TO-220		1
		TO-220FP
	3	3
1	1 2 3	2
		1
DPAK	I2PAK	IPAK

INTERNAL SCHEMATIC DIAGRAM

SALES TYPE	MARKING	PACKAGE	PACKAGING
STP4NK60Z	P4NK60Z	TO-220	TUBE
STP4NK60ZFP	P4NK60ZFP	TO-220FP	TUBE
STB4NK60ZT4	B4NK60Z	D2PAK	TAPE & REEL
STB4NK60Z-1	B4NK60Z	I2PAK	TUBE
STD4NK60ZT4	D4NK60Z	DPAK	TAPE & REEL
STD4NK60Z-1	D4NK60Z	IPAK	TUBE

March 2003

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ABSOLUTE MAXIMUM RATINGS

Symbol	Parameter		Value		Unit
		STP4NK60Z		STD4NK60Z
		STB4NK60Z	STP4NK60ZFP
				STD4NK60Z-1
		STB4NK60Z-1
VDS	Drain-source Voltage (VGS = 0)		600		V
VDGR	Drain-gate Voltage (RGS = 20 kΩ)		600		V
VGS	Gatesource Voltage		± 30		V
ID	Drain Current (continuous) at TC = 25°C	4	4 (*)	4	A
ID	Drain Current (continuous) at TC = 100°C	2.5	2.5 (*)	2.5	A
IDM ( )	Drain Current (pulsed)	16	16 (*)	16	A
PTOT	Total Dissipation at TC = 25°C	70	25	70	W
	Derating Factor	0.56	0.2	0.56	W/°C
VESD(G-S)	Gate source ESD(HBM-C=100pF, R=1.5KΩ)		3000		V
dv/dt (1)	Peak Diode Recovery voltage slope		4.5		V/ns
VISO	Insulation Withstand Voltage (DC)	-	2500	-	V
Tj	Operating Junction Temperature		-55 to 150		°C
Tstg	Storage Temperature		-55 to 150		°C

( ) Pulse width limited by safe operating area

(1) ISD ≤4A, di/dt ≤200A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX.

(*) Limited only by maximum temperature allowed

THERMAL DATA

		TO-220			DPAK
		D2PAK		TO-220FP
					IPAK
		I2PAK
Rthj-case	Thermal Resistance Junction-case Max	1.78		5	1.78	°C/W
Rthj-amb	Thermal Resistance Junction-ambient Max		62.5		100	°C/W
Tl	Maximum Lead Temperature For Soldering Purpose		300			°C

AVALANCHE CHARACTERISTICS

Symbol	Parameter	Max Value	Unit
IAR	Avalanche Current, Repetitive or Not-Repetitive	4	A
	(pulse width limited by Tj max)
EAS	Single Pulse Avalanche Energy	120	mJ
	(starting Tj = 25 °C, I D = IAR, VDD = 50 V)

GATE-SOURCE ZENER DIODE

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
BVGSO	Gate-Source Breakdown	Igs=± 1mA (Open Drain)	30			V
	Voltage

PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES

The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components.

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ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON/OFF

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
V(BR)DSS	Drain-source	ID = 1 mA, VGS = 0	600			V
	Breakdown Voltage
IDSS	Zero Gate Voltage	VDS = Max Rating			1	µA
	Drain Current (VGS = 0)	VDS = Max Rating, TC = 125 °C			50	µA
IGSS	Gate-body Leakage	VGS = ± 20V			±10	µA
	Current (VDS = 0)
VGS(th)	Gate Threshold Voltage	VDS = VGS, ID = 50µA	3	3.75	4.5	V
RDS(on)	Static Drain-source On	VGS = 10V, ID = 2 A		1.76	2	Ω
	Resistance

DYNAMIC

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
gfs (1)	Forward Transconductance	VDS = 15 V, ID = 2 A		3		S
Ciss	Input Capacitance	VDS = 25V, f = 1 MHz, VGS = 0		510		pF
Coss	Output Capacitance			67		pF
Crss	Reverse Transfer			13		pF
	Capacitance
Coss eq. (3)	Equivalent Output	VGS = 0V, VDS = 0V to 480V		38.5		pF
	Capacitance
SWITCHING ON
Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
td(on)	Turn-on Delay Time	VDD = 300 V, ID = 2 A		12		ns
tr	Rise Time	RG = 4.7Ω VGS = 10 V		9.5		ns
		(Resistive Load see, Figure 3)
Qg	Total Gate Charge	VDD = 480V, ID = 4 A,		18.8	26	nC
Qgs	Gate-Source Charge	VGS = 10V		3.8		nC
Qgd	Gate-Drain Charge			9.8		nC
SWITCHING OFF
Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
td(off)	Turn-off Delay Time	VDD = 300 V, ID = 2 A		29		ns
tf	Fall Time	RG = 4.7Ω VGS = 10 V		16.5		ns
		(Resistive Load see, Figure 3)
tr(Voff)	Off-voltage Rise Time	VDD = 480V, ID = 4A,		12		ns
tf	Fall Time	RG = 4.7Ω, VGS = 10V		12		ns
tc	Cross-over Time	(Inductive Load see, Figure 5)		19.5		ns
SOURCE DRAIN DIODE
Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
ISD	Source-drain Current				4	A
ISDM (2)	Source-drain Current (pulsed)				16	A
VSD (1)	Forward On Voltage	ISD = 4 A, VGS = 0			1.6	V
trr	Reverse Recovery Time	ISD = 4 A, di/dt = 100A/µs		400		ns
Qrr	Reverse Recovery Charge	VDD = 24V, Tj = 150°C		1700		nC
IRRM	Reverse Recovery Current	(see test circuit, Figure 5)		8.5		A

Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.

2.Pulse width limited by safe operating area.

3.Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.

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SafeOperatingArea:TO-220/DPAK/IPAK/D2PAK/I2PAKSafe Operating Area For TO-220FP

ThermalImpedance:TO-220/DPAK/IPAK/D2PAK/I2PAKThermal Impedance For TO-220FP

Output Characteristics										Transfer Characteristics

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Transconductance

Gate Charge vs Gate-source Voltage

Normalized Gate Threshold Voltage vs Temp.

Static Drain-source On Resistance

Capacitance Variations

Normalized On Resistance vs Temperature

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