ST TSV632, TSV632A, TSV633, TSV633A, TSV634 User Manual

TSV632, TSV632A, TSV633, TSV633A TSV634, TSV634A, TSV635, TSV635A

Dual and quad rail-to-rail input/output 60 µA 880 kHz operational amplifiers

Features

■Rail-to-rail input and output

■Low power consumption: 60 µA typ at 5 V

■Low supply voltage: 1.5 V - 5.5 V

■Gain bandwidth product: 880 kHz typ

■Unity gain stability

■Low power shutdown mode: 5 nA typ

■Low offset voltage: 800 µV max (A version)

■Low input bias current: 1 pA typ

■EMI hardened op-amps

■High tolerance to ESD: 4 kV HBM

■Extended temperature range: -40° C to +125° C

Applications

■Battery-powered applications

■Portable devices

■Signal conditioning

■Active filtering

■Medical instrumentation

Description

The TSV63x series of dual and quad operational amplifiers offers low voltage operation and rail-to- rail input and output.

This family features an excellent speed/power consumption ratio, offering a 880 kHz gainbandwidth product while consuming only 60 µA at 5 V supply voltage. The devices also feature an ultra-low input bias current and have a shutdown mode (TSV633, TSV635).

These features make the TSV63x family ideal for sensor interfaces, battery-supplied and portable applications, as well as active filtering.

SOT23-8

SO-8

DFN8 2x2

MiniSO-8

TSSOP-14 TSSOP-16

Table 1.	Device summary
	Dual version			Quad version
Reference
	Without	With		Without	With
	standby	standby		standby	standby
TSV63x	TSV632	TSV633		TSV634	TSV635
TSV63xA	TSV632A	TSV633A		TSV634A	TSV635A

November 2011

Doc ID 15688 Rev 4

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www.st.com

Contents	TSV63x, TSV63xA

Contents

1	Package pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		. 3
2	Absolute maximum ratings and operating conditions . . . . . . . . . . . . .		4
3	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		5
4	Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		13
	4.1	Operating voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	13
	4.2	Rail-to-rail input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	13
	4.3	Rail-to-rail output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	13
	4.4	Shutdown function (TSV633 - TSV635) . . . . . . . . . . . . . . . . . . . . . . . . . .	13
	4.5	Optimization of DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . .	15
	4.6	Driving resistive and capacitive loads . . . . . . . . . . . . . . . . . . . . . . . . . . .	15
	4.7	PCB layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	15
	4.8	Macromodel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	16
5	Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		17
	5.1	DFN8 2x2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	18
	5.2	SOT23-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	20
	5.3	SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	21
	5.4	MiniSO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	22
	5.5	MiniSO-10 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	23
	5.6	TSSOP14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	24
	5.7	TSSOP16 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	25
6	Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		26
7	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		27

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TSV63x, TSV63xA	Package pin connections

1 Package pin connections

Figure 1. Pin connections for each package (top view)

						Out1
Out1	1			8	VCC+	In1-
In1-	2	_		7	Out2	In1+
In1+	3	+	_	6	In2-	VCC-
			+		In2+
VCC-	4			5		SHDN1
TSV632IDT/IST/ILT/IQ2T
SO8/Mini-SO8/SOT23-8/DFN8
	1			14	Out4	Out1
Out1						In1-
		_	_
In1-	2			13	In4-	In1+
		+	+
In1+	3			12	In4+	VCC+
VCC+	4			11	VCC-
						In2+
In2+	5	+	+	10	In3+	In2-
		_	_	9	In3-
In2-	6
						Out2
Out2	7			8	Out3	SHDN1/2

TSV634IPT

TSSOP14

1				10	VCC+
2	_			9	Out2
3	+		_	8	In2-
4			+	7	In2+
5				6	SHDN2
	TSV633IST
	MiniSO-10
1			16	Out4
2	_	_	15	In4-
3	+	+	14	In4+
4			13	VCC-
5	+	+	12	In3+
6	_	_	11	In3-
7			10	Out3
8			9	SHDN3/4

TSV635IPT

TSSOP16

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Absolute maximum ratings and operating conditions	TSV63x, TSV63xA

2 Absolute maximum ratings and operating conditions

Table 2.				Absolute maximum ratings (AMR)
Symbol				Parameter			Value		Unit
	VCC			Supply voltage(1)			6		V
	Vid			Differential input voltage (2)			±VCC		V
	V	in		Input voltage (3)	V	CC-	- 0.2 to V	+ 0.2	V
							CC+
	Iin			Input current (4)			10		mA
				Shutdown voltage(3)	V		- 0.2 to V	+ 0.2	V
	SHDN					CC-
							CC+
	Tstg			Storage temperature			-65 to +150		°C
				Thermal resistance junction to ambient(5)(6)
				DFN8 2x2			57
				SOT23-8			105
	Rthja			MiniSO-8			190		°C/W
				SO-8			125
				MiniSO-10			113
				TSSOP14			100
				TSSOP16			95
	Tj			Maximum junction temperature			150		°C
				HBM: human body model(7)			4		kV
	ESD			MM: machine model(8)			300		V
				CDM: charged device model(9)			1.5		kV
				Latch-up immunity			200		mA

1.All voltage values, except differential voltage are with respect to network ground terminal.

2.Differential voltages are the non-inverting input terminal with respect to the inverting input terminal.

3.VCC-Vin must not exceed 6 V, Vin must not exceed 6V.

4.Input current must be limited by a resistor in series with the inputs.

5.Short-circuits can cause excessive heating and destructive dissipation.

6.Rth are typical values.

7.Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for all couples of pin combinations with other pins floating.

8.Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin combinations with other pins floating.

9.Charged device model: all pins plus package are charged together to the specified voltage and then discharged directly to the ground.

Table 3.	Operating conditions
Symbol	Parameter	Value	Unit
VCC	Supply voltage	1.5 to 5.5	V
Vicm	Common mode input voltage range	VCC- - 0.1 to VCC+ + 0.1	V
Toper	Operating free air temperature range	-40 to +125	°C

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TSV63x, TSV63xA	Electrical characteristics

3 Electrical characteristics

Table 4. Electrical characteristics at VCC+ = +1.8 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25° C, and RL connected to VCC/2 (unless otherwise specified)

Symbol		Parameter			Conditions	Min.	Typ.	Max.	Unit
DC performance
			TSV63x					3
			TSV63xA					0.8	mV
	Vio	Offset voltage	TSV633AIST - MiniSO10					1
			Tmin < Top < Tmax - TSV63x					4.5
			Tmin < Top < Tmax - TSV63xA					2	mV
			Tmin < Top < Tmax - TSV633AIST					2.2
	DVio	Input offset voltage drift					2		μV/°C
			(V	= V	/2)		1	10(1)	pA
	Iio	Input offset current	out		CC
			Tmin < Top < Tmax				1	100	pA
			(V	= V	/2)		1	10(1)	pA
	Iib	Input bias current	out		CC
			Tmin < Top < Tmax				1	100	pA
	CMR	Common mode rejection	0 V to 1.8 V, Vout = 0.9 V			53	74		dB
		ratio 20 log ( Vic/ Vio)	Tmin < Top < Tmax			51			dB
	Avd	Large signal voltage gain	RL= 10 kΩ, Vout = 0.5 V to 1.3 V			85	95		dB
			Tmin < Top < Tmax			80			dB
	VOH	High level output voltage	RL = 10 kΩ			35	5		mV
			Tmin < Top < Tmax			50
	VOL	Low level output voltage	RL = 10 kΩ				4	35	mV
			Tmin < Top < Tmax					50
		Isink	Vo = 1.8 V			6	12		mA
			Tmin < Top < Tmax			4
	Iout
			Vo = 0 V			6	10
		Isource							mA
			Tmin < Top < Tmax			4
	ICC	Supply current (per	No load, Vout = VCC/2			40	50	60	µA
		operator)	Tmin < Top < Tmax					62	µA
AC performance
	GBP	Gain bandwidth product	RL = 2 kΩ, CL = 100 pF, f = 100 kHz			700	790		kHz
	φm	Phase margin	RL = 2 kΩ, CL = 100 pF				45		Degrees
	Gm	Gain margin	RL = 2 kΩ, CL = 100 pF				13		dB
	SR	Slew rate	RL = 2 kΩ, CL = 100 pF, Av = 1			0.2	0.27		V/μs
		Equivalent input noise	f = 1 kHz				60		nV
	en	voltage	f = 10 kHz				33		-----------
									Hz
1.	Guaranteed by design.

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Electrical characteristics

TSV63x, TSV63xA

Table 5.

Shutdown characteristics VCC = 1.8 V

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

DC performance

SHDN =

VCC-

2.5

50

nA

ICC

Supply current in shutdown

Tmin < Top < 85° C

200

nA

mode (all operators)

Tmin < Top < 125° C

1.5

µA

ton

Amplifier turn-on time

RL= 2 kΩ,

200

ns

Vout = VCC- to VCC-+0.2 V

toff

Amplifier turn-off time

RL = 2 kΩ,

20

ns

Vout = VCC+ - 0.5 V to VCC+ - 0.7 V

VIH

logic high

1.35

V

SHDN

VIL

logic low

0.6

V

SHDN

IIH

current high

= VCC+

10

pA

SHDN

SHDN

IIL

current low

= VCC-

10

pA

SHDN

SHDN

= VCC-

50

pA

IOLeak

Output leakage in shutdown

SHDN

mode

Tmin < Top < 125° C

1

nA

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TSV63x, TSV63xA				Electrical characteristics
Table 6.	VCC+ = +3.3 V, VCC- = 0 V, Vicm = VCC/2, Tamb = 25° C, RL connected to VCC/2
	(unless otherwise specified)
Symbol	Parameter	Conditions	Min.		Typ.	Max.	Unit
DC performance
		TSV63x				3
		TSV63xA				0.8	mV
Vio	Offset voltage	TSV633AIST - MiniSO10				1
		Tmin < Top < Tmax - TSV63x				4.5
		Tmin < Top < Tmax - TSV63xA				2	mV
		Tmin < Top < Tmax - TSV633AIST				2.2
DVio	Input offset voltage drift				2		μV/°C
Iio	Input offset current	Vout = VCC/2			1	10(1)	pA
		Tmin < Top < Tmax			1	100	pA
Iib	Input bias current	Vout = VCC/2			1	10(1)	pA
		Tmin < Top < Tmax			1	100	pA
CMR	Common mode rejection	0 V to 3.3 V, Vout = 1.65 V	57		79		dB
	ratio 20 log ( Vic/ Vio)	Tmin < Top < Tmax	53
Avd	Large signal voltage gain	RL = 10 kΩ, Vout = 0.5 V to 2.8 V	88		98		dB
		Tmin < Top < Tmax	83
VOH	High level output voltage	RL = 10 kΩ	35		5		mV
		Tmi. < Top < Tmax	50
VOL	Low level output voltage	RL = 10 kΩ			4	35	mV
		Tmin < Top < Tmax				50
	Isink	Vo = 3.3 V	23		45		mA
Iout		Tmin < Top < Tmax	20
	Isource	Vo = 0 V	23		38		mA
		Tmin < Top < Tmax	20
ICC	Supply current (per	No load, Vout = 1.75 V	43		55	64	µA
	operator)	Tmin < Top < Tmax				66	µA
AC performance
GBP	Gain bandwidth product	RL = 2 kΩ, CL = 100 pF,	710		860		kHz
		f = 100 kHz
φm	Phase margin	RL = 2 kΩ, CL = 100 pF			46		Degrees
Gm	Gain margin	RL = 2 kΩ, CL = 100 pF			13		dB
SR	Slew rate	RL = 2 kΩ, CL = 100 pF, AV = 1	0.22		0.29		V/μs

1. Guaranteed by design.

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Electrical characteristics

TSV63x, TSV63xA

Table 7.

Electrical characteristics at VCC+ = +5 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25° C,

and RL connected to VCC/2 (unless otherwise specified)

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

DC performance

TSV63x

3

TSV63xA

0.8

mV

Vio

Offset voltages

TSV633AIST - MiniSO10

1

Tmin < Top < Tmax - TSV63x

4.5

Tmin < Top < Tmax - TSV63xA

2

mV

Tmin < Top < Tmax - TSV633AIST

2.2

DVio

Input offset voltage drift

2

μV/°C

Iio

Input offset current

(Vout = VCC/2)

1

10(1)

pA

Tmin < Top < Tmax

1

100

pA

Iib

Input bias current

(Vout = VCC/2)

1

10(1)

pA

Tmin < Top < Tmax

1

100

pA

CMR

Common mode rejection

0 V to 5 V, Vout = 2.5 V

60

80

dB

ratio 20 log ( Vic/ Vio)

Tmin < Top < Tmax

55

dB

SVR

Supply voltage rejection

VCC = 1.8 to 5 V

75

102

dB

ratio 20 log ( VCC/ Vio)

Tmin < Top < Tmax

73

Avd

Large signal voltage gain

RL= 10 kΩ, Vout = 0.5 V to 4.5 V

89

98

dB

Tmin < Top < Tmax

84

dB

VRF = 100 mVrms, f = 400 MHz

61

EMIRR

EMI rejection ratio

VRF = 100 mVrms, f = 900 MHz

85

dB

EMIRR = -20 log (VRFpeak/ Vio)

V

RF

= 100 mV

, f =1800 MHz

92

rms

VRF = 100 mVrms, f =2400 MHz

83

VOH

High level output voltage

RL = 10 kΩ

35

7

mV

Tmin < Top < Tmax

50

VOL

Low level output voltage

RL = 10 kΩ

6

35

mV

Tmin < Top < Tmax

50

Isink

Vo = 5 V

40

69

mA

Iout

Tmin < Top < Tmax

35

Isource

Vo = 0 V

40

74

mA

Tmin < Top < Tmax

35

ICC

Supply current (per

No load, Vout=VCC/2

50

60

69

µA

operator)

Tmin < Top < Tmax

72

µA

AC performance

GBP

Gain bandwidth product

RL= 2 kΩ, CL = 100 pF, f = 100 kHz

730

880

kHz

Fu

Unity gain frequency

RL = 2 kΩ, CL = 100 pF,

830

kHz

8/28	Doc ID 15688 Rev 4

TSV63x, TSV63xA

Electrical characteristics

Table 7.

Electrical characteristics at VCC+ = +5 V with VCC- = 0 V, Vicm = VCC/2, Tamb = 25° C,

and RL connected to VCC/2 (unless otherwise specified) (continued)

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

φm

Phase margin

RL = 2 kΩ, CL = 100 pF

48

Degrees

Gm

Gain margin

RL = 2 kΩ, CL = 100 pF

13

dB

SR

Slew rate

RL = 2 kΩ, CL = 100 pF, Av=1

0.25

0.34

V/μs

Equivalent input noise

f = 1 kHz

60

nV

en

voltage

f = 10 kHz

33

-----------

Hz

THD+en

Total harmonic distortion +

VCC = 5V, f = 1kHz, AV = 1, RL

=

0.002

%

noise

100kΩ, Vicm = VCC/2, Vout = 2VPP

1. Guaranteed by design.

Table 8.

Shutdown characteristics at VCC = 5 V

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

DC performance

SHDN

= VCC-

5

50

nA

ICC

Supply current in shutdown

Tmin < Top < 85° C

200

nA

mode (all operators)

Tmin < Top < 125° C

1.5

µA

ton

Amplifier turn-on time

RL = 2 kΩ,

200

ns

Vout = VCC- V to VCC-+0.2 V

toff

Amplifier turn-off time

RL = 2 kΩ,

20

ns

Vout = VCC+ - 0.5 V to VCC+ - 0.7 V

VIH

logic high

2

V

SHDN

VIL

logic low

0.8

V

SHDN

IIH

current high

= VCC+

10

pA

SHDN

SHDN

IIL

current low

= VCC-

10

pA

SHDN

SHDN

= VCC-

50

pA

IOLeak

Output leakage in shutdown

SHDN

mode

Tmin < Top < 125° C

1

nA

Doc ID 15688 Rev 4

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