SANYO LC33832PL-80, LC33832P-80, LC33832P-70, LC33832P-10, LC33832ML-80 Datasheet
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Ordering number : EN4430C
CMOS LSI
LC33832P, S, M, PL, SL, ML-70/80/10
256 K (32768 words × 8 bits) Pseudo-SRAM
Overview
The LC33832 series is composed of pseudo static RAM that operates on a single 5 V power supply and is organized as 32768 words × 8 bits. By using memory cells each composed of a single transistor and capacitor, together with peripheral CMOS circuitry, this series achieves ease of use with high density, high speed, and low power dissipation. The LC33832 series can easily accomplish auto-refresh and self-refresh by means of OE/RFSH input. As with asynchronous static RAM, WE input uses a system for incorporating input data at the WE rise, thereby facilitating interfacing with a microcomputer.
The LC33832 series features pin compatibility with 256 K static RAM (the LC36256A series), and available packages are the standard 28-pin DIP with widths of 600 mil or 300 mil, and the SOP with a width of 450 mil.
CE-only refresh can be accomplished by selecting address 256 (A0 to A7) within 4 ms.
Features
•32768 words × 8 bits configuration
•Single 5 V ±10% power supply
•All input and output (I/O) TTL compatible
•Fast access times and low power dissipation
•4 ms refresh using 256 refresh cycle
•CE-only refresh, auto-refresh, and self-refresh
•Low-power version: 100 µA self-refresh current
•Package
DIP28-pin (600 mil) plastic package: LC33832P, PL DIP28-pin (300 mil) plastic package: LC33832S, SL SOP28-pin (450 mil) plastic package: LC33832M, ML
Package Dimensions
unit: mm
3012A-DIP28
[LC33832P, PL]
SANYO: DIP28
unit: mm
3133-DIP28
[LC33832S, SL]
SANYO: DIP28
• CE access time/OE access time/Cycle time/Current drain
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LC33832P, S, M, PL, SL, ML |
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-70 |
-80 |
-10 |
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70 ns |
80 ns |
100 ns |
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CE |
access time |
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OE access time |
30 ns |
35 ns |
40 ns |
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Cycle time |
115 ns |
130 ns |
160 ns |
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Current drain |
Operating |
65 mA |
60 mA |
50 mA |
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Standby |
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1 mA/100 µA (L version) |
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SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
22897HA (OT)/52595TH (OT)/N1993JN/40893JN A8-9957, 58, 59, No. 4430-1/9
LC33832P, S, M, PL, SL, ML-70/80/10
unit : mm
3158-SOP28
[LC33832M, ML]
SANYO: SOP28
Block Diagram
No. 4430-2/9
LC33832P, S, M, PL, SL, ML-70/80/10
Pin Assignment |
Pin Functions |
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A0 to A14 |
Address input |
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Read/Write input |
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WE |
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OE/RFSH |
Output-enable input/ refresh input |
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Chip-enable input |
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CE |
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I/O1 to I/O8 |
Data input/output |
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VCC |
Power supply |
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GND |
Ground |
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Functional Logic
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CE |
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OE |
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WE |
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A0 to A7 |
A8 to |
I/O1 |
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State |
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/RFSH |
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A14 |
to I/O8 |
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H |
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H |
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X |
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X |
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HZ |
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Standby |
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L |
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L |
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H |
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VX |
VX |
OUT |
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Read |
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L |
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H |
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L |
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VX |
VX |
IN |
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Write |
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L |
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H |
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H |
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VX |
X |
HZ |
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CE-only refresh |
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H |
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L |
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X |
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X |
X |
HZ |
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Self-refresh |
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H |
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NP |
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X |
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X |
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HZ |
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Auto-refresh |
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H ................... |
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High-level input of VIN = 6.5 V to VIH (min) |
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L .................... |
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Low-level input of VIN = VIL (max) to –1.0 V |
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X.................... |
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Highor low-level input |
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NP................. |
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Negative-polarity pulse input |
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VX |
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“IN” when |
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= L is confirmed, then “X” |
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CE |
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HZ................. |
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High impedance |
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IN .................. |
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Input state |
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OUT.............. |
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Output state |
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No. 4430-3/9
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