Sanyo LA4630N Specifications

Ordering number:ENN3227A

Monolithic Linear IC

LA4630N

9V/12V 3-Dimension Power IC for Radio Cassette Recorders

Features

•Stereo section 9V/3Ω 3W×2, 12V/3Ω 5W×2 : noise filter capacitorless power.

•Super bus section 9V/3Ω 6W, 12V/3Ω 10W : output capacitor, B-S capacitorless power.

This chip employs technology for eliminating pins and external connections to realize 3-dimensional power on a single chip. This IC is a single package power IC for making sound systems with punch.

•On-chip pop noise suppressor.

•On-chip power switch circuit.

•External and mute functions on chip.

•Protection functions on chip (thermal protection circuit and BTL section RL short protection circuit)

Specifications

Package Dimensions

unit:mm
3109-SIP18H
				[LA4630N]
				37.0	4.5
				30.0
					R1.7
15.0max	13.8	8.0			11.0
6.0	0.8min
		1			18
				0.5	0.4
		1.5	2.0		1.0
					2.25
					SANYO : SIP18H

Maximum Ratings at Ta = 25˚C

Parameter	Symbol	Conditions	Ratings	Unit
Maximum supply voltage	VCC max	*1 no signal	20	V
Thermal resistance	θj-c		2	˚C/W
Maximum output current	IO peak		3	A
Allowable power dissipation	Pd max	With infinite heat sink	37.5	W
Operating temperature	Topr		–20 to +75	˚C
Storage temperature	Tstg		–40 to +150	˚C

*1 : Operational notes on the maximum supply voltage.

Recommended Operating Conditions at Ta = 25˚C

Parameter	Symbol	Conditions	Ratings	Unit
Recommended supply voltage	VCC		9	V
			12	V
Recommended load resistance	RL		3 to 8	Ω
Operating voltage	VCC op	*2	5 to 18	V
*2 : The upper limit for VCC op is VCC max – 2V.			Continued on next page.

Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircraft’s control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges,or other parameters) listed in products specifications of any and all SANYO products described or contained herein.

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

40500TN (KT)/D191TH/5150TA, TS (GTPS) No.3227–1/8

				LA4630N
Continued from preceding page.
	FRONT L/R	BTL	VCC max	Conditions
	RL ≥ 3Ω	RL ≥ 3Ω	20V
	RL ≥ 3Ω	RL ≥ 4Ω	21V	No signal
	RL ≥ 3Ω	RL ≥ 5Ω	22V
				Front L/R input with capacitor Rg=0
	RL ≥ 3Ω	RL ≥ 6Ω	23V
				BTL L/R input without capacitor Rg=0
	RL ≥ 3Ω	RL ≥ 7Ω	24V
	RL ≥ 3Ω	RL ≥ 8Ω	24V

For power supply transistor regulation, the equivalent power line resistance is 3Ω or greater.

[Precaution concerning the metal]

Select PO with a goal of a rated load/rated supply voltage of RL=3 to 8Ω and VCC=5 to 18V and design to avoid exceeding the package Pd max of 37.5W. For heavy loads or high VCC, the drive design is involved and the power effect deteriotates, so pay attention to these factors.

Operating Characteristics at Ta = 25˚C, VCC=9V, RL=3Ω, f=1kHz

Parameter	Symbol	Conditions		Ratings		Unit
			min	typ	max
Quiescent flow-in current	ICCO		35	70	140	mA
Standby current	IST			1.0	10.0	µA
Power switch pin flow-in current	ISW			10.0		mA
Mute supply flow-in current	ICCm			35.0	70.0	mA
[Stereo Section]
Output power	PO1	VCC=9V, THD=10%	2.2	3.0		W
	PO2	VCC=12V, THD=10%	4.2	5.0		W
Total harmonic distortion	THD	VO=1V		0.20	1.0	%
Input resistance	Ri			50		kΩ
Voltage gain	VG		43	45	47	dB
Output noise voltage	VNO	Rg=0, BPF=20Hz to 20kHz		0.15	0.40	mV
Ripple rejection	SVR	fR=100Hz, VR=0dBm	45	55		dB
Channel separation	CH sep	Rg=10kΩ, VO=0dBm	45	50		dB
Muting attenuation	Att	VO=0dBm		80		dB
Low-region roll off frequency	fL	At VG=–3dB		50		Hz
High-region roll off frequency	fH	At VG=–3dB		50		kHz
[Super Bus Section]
Output power	PO1	VCC=9V, THD=10%	5.0	6.0		W
	PO2	VCC=12V, THD=10%	8.0	10.0		W
Total harmonic distortion	THD	VO=1V		0.20	1.0	%
Input resistance	Ri			30		kΩ
Voltage gain	VG		43	45	47	dB
Output noise voltage	VNO	Rg=0, BPF=20Hz to 20kHz		0.3	0.6	mV
Ripple rejection	SVR	fR=100Hz, VR=0dBm	50	60		dB
Muting attenuation	Att	VO=0dBm		80		dB
Low-region roll off frequency	fL	VG : –3dB		5		Hz
High-region roll off frequency	fH	VG : –3dB		40		kHz
Output offset voltage	VOFF	Rg=0	–150		+150	mV

No.3227–2/8

LA4630N

Block Diagram

Note 1 : The motor should not be connected to the power switch pin, since transient noise may appear on the amplifier outputs when the motor is started or stopped.

Note 2 : Audio mute is enabled by connecting a 300Ω resistance between the DC pin and ground. DC bias control of both the stereo (L ch, R ch) and BTL (super bass) channels is enabled, and all audio output signals can be muted by controlling the MUTE pin.

No.3227–3/8