SANYO LC651306A, LC651304A, LC651302A, LC651301A Datasheet

Ordering number : ENN*6727

CMOS IC

LC651306A/04A/02A/01A

4-Bit Single-Chip Microcontroller for Small-Scale Control Applications

Preliminary

Overview

The LC651306A, LC651304A, LC651302A, LC651301A belong to our 4-bit single-chip microcontroller LC6500 series fabricated using CMOS process technology. They are ideally suited for use in small-scale control applications. Their basic architecture and instruction set are the same. These microcontrollers include an 8-input 8-bit A/D converter and are appropriate for use in a wide range of applications. That range includes applications with a small number of control circuits that were previously implemented in standard logic, and applications with a larger scale such as home appliances, automotive equipment, communications equipment, office equipment, and audio equipment such as decks and players.

Features

1)CMOS technology for a low-power consumption operation (A standby function that can be invoked under program control is also provided.)

2)ROM/RAM

LC651306A ROM : 6K × 8 bits, RAM : 256 × 4 bits

LC651304A ROM : 4K × 8 bits, RAM : 256 × 4 bits

LC651302A ROM : 2K × 8 bits, RAM : 256 × 4 bits

LC651301A ROM : 1K × 8 bits, RAM : 256 × 4 bits

3)Instruction set : 81 instructions common to all microcontrollers of the LC6500 series

4)Wide operating voltage range : 2.5V to 6.0V

5)Instruction cycle time : 0.92 µ s

6)On-chip serial I/O port

Ver.0.90

91400 RM (IM) TY No.6727-1/21

62600

LC651306A/04A/02A/01A

7) Flexible I/O port
• Number of ports	: 5 ports / 18 pins (max.)
• All ports	: Input / output common
	Input / output capacity voltage
	Output current

15V max. (open-drain specification C and D only) 20 mA max. sink current (Can drive an LED directly)

•Support options for system specification

A. Open drain output, pull-up resistor : all ports in bit unit

B. Output level in the reset mode

: high/low level for port C and D specified in 4-bit unit

8) Interrupt function

Interrupt by timer overflow (can be tested under program control)

Interrupt by the state of the INT pin or completion of transmission/reception at serial I/O port (can be tested under program control)

9)Stack level : 8 levels (common use with interrupt)

10)Timer : 4-bit variable prescaler + 8-bit programmable counter

11)Clock oscillation options for user’s intended system

•Oscillator circuit options : two-pin RC oscillator

two-pin ceramic oscillator

• Divider circuit options : No divider built-in divide by 3 built-in divide by 4

12)Continuous square wave output (64 times of the cycle time)

13)AD converter (successive approximation)

•Precise conversion (expressed in 8 bits), 8 input channels

14)Watchdog timer

•RC circuit time constant

•Watchdog timer reset function can be assigned to an external pin by the option.

15)Low voltage detection circuit

•Can be implemented by the option.

16)Factory shipment

•DIP24S, MFP24S, SSOP24

No.6727-2/21

LC651306A/04A/02A/01A

Function Table

	Parameter		LC651306A/04A/02A/01A		LC651154F/1152F	LC651432F/1431F
Memory		ROM	6144 × 8 bits (1306A)		4096 × 8 bits (1154F)	2048 × 8 bits (1432F)
			4096 × 8 bits (1304A)		2048 × 8 bits (1152F)	1024 × 8 bits (1431F)
			2048 × 8 bits (1302A)
			1024 × 8 bits (1301A)
		RAM	256 ×	4 bits	256 × 4 bits	128 × 4 bits (1432F)
			(1306A/04A/02A/01A)		(1154/1152F)	64 × 4 bit (1431F)
Instructions		Instruction set	81		80	80
		Table reference	Supported		Supported	Supported
On-chip		Interrupt	1 external, 1 internal		1 external, 1 internal	1 external, 1 internal
functions		Timer	4-bit variable prescaler + 8-bit		4-bit variable prescaler +	4-bit fixed prescaler +
			timers		8-bit timers	8-bit timers
		Stack level		8	8	4
		Standby function	Standby mode by the HALT		Standby mode by the	Standby mode by the
			instruction supported		HALT instruction	HALT instruction
					supported	supported
I/O ports		Port number	18 I/O port pins		22 I/O port pins	25 I/O port pins (max.)
		Serial port	Input and output in 4 or 8 bit units		Input and output in 4 or 8	Input and output in 4 or 8
					bit units	bit units
		I/O voltage capacity	15 V max.		15 V max.	15 V max.
		Output current	10 mA typ.	20 mA max.	10 mA typ. 20 mA	10 mA typ. 20 mA
					max.	max.
		I/O circuit type	Open drain (N-channel) or pull-		up resistor output option can	be specified in 1- bit unit
		Output level at reset	High or low level output can be selected in port unit (ports C and D only)
		Square wave output	Supported		Supported	Supported
Characteristics		Minimum cycle time	0.92 µ s (VDD ≥ 2.5 V)		0.92 µ s (VDD ≥ 2.5 V)	0.92 µ s (VDD ≥ 3 V)
		Supply voltage	2.5 to 6 V		2.5 to 6 V	3 to 6 V
		Supply current	1.5 mA typ.		2 mA typ.	1.5 mA typ.
Oscillator		Oscillator	RC (800 kHz typ.)
			Ceramic (400k, 800k,1MHz,		Ceramic 4 MHz	Ceramic 4 MHz
			4MHz)
		Divider circuit option	1/1, 1/3, 1/4		1/1	1/1
Other items		Package	DIP24S MFP24S SSOP24		DIP30S-D MFP30S	DIP30S-D MFP30S
					SSOP30	SSOP30
		Watchdog timer	Supported		Supported	Not supported
		OTP	Only DIP24S MFP24S		Only DIP30S-D MFP30S	Only DIP30S-D MFP30S

Note: The above oscillator and oscillator circuit constants are tentative. They will be announced as the recommended circuits for these microcontrollers are determined. Please confirm the progress of these developments periodically.

No.6727-3/21

LC651306A/04A/02A/01A

Pin Assignment

DIP24S, SSOP24, MFP24S

				Package Dimension
RES				(unit : mm)
	1	24	OSC1	3067A
PE0/SQR	2	23	OSC2
PE1/WDR	3	22	TEST
PF0/SI/AD4	4	21	VSS
PF1/SO/AD5	5	20	PD3
PF2/SCK/AD6	6	19	PD2
PF3/INT/AD7	7	18	PD1
PA0/AD0	8	17	PD0
PA1/AD1	9	16	PC3
PA2/AD2	10	15	PC2
PA3/AD3	11	14	PC1	SANYO : DIP24S(300mil)
VDD	12	13	PC0

Package Dimension	Package Dimension
(unit : mm)	(unit : mm)
3175A	3112A

SANYO : SSOP24(275mil)

SANYO : MFP24S(300mil)

Pin Functions

OSC1, OSC2		: Ceramic Oscillator for OSC, RC
RES		: Reset
PA0-3		: Common I/O port A0-3
PC0-3		: Common I/O port C0-3
PD0-3		: Common I/O port D0-3
PE0-1		: Common I/O port E0-1
PF0-3		: Common I/O port F0-3

TEST			:	Test
AD0-AD7			:	AD converter analog input
SQR			:	Square wave output
WDR			:	Watch Dog Reset pin
INT			:	Interrupt Request pin
SI			:	Serial Input pin
SO			:	Serial Output pin
SCK			:	Serial Clock input/output pin

Notes: • SQR and WDR are common with PE0 and PE1 respectively.

• SI, SO, SCK, and INT are common with PF0 to PF3 respectively.

No.6727-4/21

LC651306A/04A/02A/01A

System Block Diagram

LC651306A/1304A/1302A/1301A

	PA0-3	Port A
	AD0-3
		8-BIT
		ADC
	PF0-3	Port F
	AD4-7
	PC0-3	Port C
	PD0-3	Port D
	PF1/SO	Serial
		shift
F	4/8 bit	register
portwith		lower digit
	4 bit	Serial
Shared		shift
		register
	PF0/SI	higher digit
		4/8 bit
	PF2/SCK

PF3/INT

	RAM	PC	ROM
Buffer	F WR	to
		STACK
I/O	DP	STACK
			IR	I.DEC
	System Bus
E	AC		STS	TM CTL
	ALU	CF	ZF EXTF TMF
		CSF ZS		INT
Serial	Serial
mode	mode				OSC1
register	register			OSC
					OSC2
	I/O Bus				RES
					TEST
					VDD
Port E					VSS

PE0-1 WDR

RAM	:	Data Memory	ROM	:	Program Memory
F	:	Flag	PC	:	Program Counter
WR	:	Working Register	INT	:	Interrupt control
AC	:	Accumulator	IR	:	Instruction Register
ALU	:	Arithmetic and Logic Unit	I.DEC	:	Instruction Decoder
DP	:	Data Pointer	CF, CSF	: Carry Flag, Carry Save Flag
E	:	E register	ZF, ZSF	: Zero Flag, Zero Save Flag
CTL	:	Control register	EXTF	:	External Interrupt Request Flag
OSC	:	Oscillation Circuit	TMF	:	Internal Interrupt Request Flag
TM	:	Timer
STS	:	Status register

No.6727-5/21

LC651306A/04A/02A/01A

Development Support

The following are currently in the development stage and will soon be available to the user for the development of the LC651306A/04A/02A/01A.

1.User’s manual

Refer to the “LC65F1306A/LC651300 series user’s manual.”

2.Development tool manual

Refer to the “EVA86000 Development Tool Manual for 4-bit microcontrollers.”

3.Software manual

“LC65/66 Series Software Manual”

4.Development tool

a.For program development (EVA86000 system)

b.For program evaluation

Microcontroller with Flash ROM (LC65F1306)

Pin Functions

Symbol	Number	I/O		Function			Option	At reset		Handling
	of pins									when unused
VDD	1	-	Power supply		-			-		-
VSS	1	-
OSC1	1	Input	•	Pins for connecting system clock	(1)		Two-pin RC oscillator,	-		-
			•	oscillation RC or ceramic resonator.			external clock
				Leave OSC2 open when OSC1 is used	(2)		Two-pin ceramic oscillator
OSC2	1	Output
				for an external clock input	(3)		Divider option
						1. No divider
						2. Divide by 3
						3. Divide by 4
PA0-PA3/	4	I/O	•	I/O port A0 to A3	(1)		Open-drain output	High-level		Select the
AD0-AD3				Input in 4-bit unit (IP instruction)	(2)		Pull-up resistor	output (The		open-drain
				Output in 4-bit unit	(1), (2) can be specified in bit			output		output option
				(OP instruction)	unit.			N-channel		and connect to
				Testing in 1-bit unit				transistors in		VSS.
				(BP, BNP instructions)				the off state.)
				Set and reset in 1-bit unit
			•	(SPB, RPB instructions)
				PA3 is used for standby mode control.
			•	Chattering should not be occurred on
				the PA3 during HALT instruction
			•	execution.
				All four pins have shared function.
				PA0/AD0:AD converter input AD0
				PA1/AD1:AD converter input AD1
				PA2/AD2:AD converter input AD2
				PA3/AD3: converter input AD3
PC0-PC3	4	I/O	• I/O port C0 to C3		(1)		Open-drain output	• High-level		Same as PA0 to
				The port functions are identical to those	(2)		Pull-up resistor	output.		PA3.
			•	of PA0 to PA3 (See note).	(3)		High level output during reset.	• Low-level
				The output during a reset can be	(4)		Low level output during reset.	output.
				selected to be either high or low as an	•	(1) and (2) can be specified in		(Depending	on
				option.	•	bit unit.		options
			Note: This port has no standby mode			(3) and (4) are specified 4 bits		selected)
				control function.	at a time
PD0-PD3	4	I/O	• I/O port D0 to D3		Same as PC0 to PC3.			Same as PC0		toSame as PA0 to
				The port functions and options are				PC3.		PA3.
				identical to those of PC0 to PC3.

No.6727-6/21

LC651306A/04A/02A/01A

Symbol

Number

Handling

I/O

Function

Option

At reset

when

of pins

unused

PE0-PE1

2

I/O

•

I/O port E0 to E1

(1) Open -drain output

High level

Identical to

/WDR

Input in 4-bit unit (IP instruction)

(2) Pull-up resistor

output (The

those for

Output in 4-bit unit (OP instruction)

• Options (1) or (2) can be

output

PA0 to PA3.

Set and reset in 1-bit unit

specified in bit unit.

N-channel

(SPB and PRB instructions)

(3) Normal port PE1

transistors in

Testing in 1-bit unit

(4) Watchdog reset WDR

the off state)

•

(BP and BNP instructions)

• Either options (3) or (4)

PE0 also has a continuous pulse (64 Tcyc)

can be selected.

•

output function.

PE1 becomes the watchdog reset pin WDR

when selected as an option.

PF0/SI/AD4

4

I/O

•

I/O port F0 to F3

Identical to those for PA0 to

Identical to those

Identical to

PF1/SO/AD5

The port functions and options are identical

PA3.

for PA0 to PA3.

those for

PF2/

SCK

•

to those of PE0 to PE1 (See note).

The serial port

PA0 to PA3.

/AD6

PF0 to PF3 have shared functions with the

PF3/

serial interface pins and the INT input.

functions are

INT

/AD7

The function can be selected under program

disabled.

control.

The interrupt

SI... Serial input pin

source is set to

SO...Serial output pin

INT.

SCK

...Input and output of the serial clock

signal.

INT

...Interrupt request signal

The serial I/O function can be switched

between 4-bit and 8-bit transfers under

program control.

Note: There is no continuous pulse output

•

function.

All four pins have shared function.

PF0/AD4: AD converter input AD4

PF1/AD5: AD converter input AD5

PF2/AD6: AD converter input AD6

PF3/AD7: AD converter input AD7

RES

1

Input

•

System reset input

-

-

-

•

Provide an external capacitor for the

•

power-on reset.

Apply low level to this pin for 4 or more

clock cycles to reset and restart the program.

TEST

1

Input

•

Test pin for LSI.

-

-

This pin

This pin must be connected to VSS during

must be

normal operation.

connected to

VSS.

No.6727-7/21