Philips NE83Q92A20, NE83Q92N, NE83Q92A, NE83Q92D Datasheet

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NE83Q92

Low-power coaxial Ethernet transceiver

Product specification

1995 May 01

IC19 Data Handbook

P s

on o s

Philips Semiconductors

Product specification

 

 

 

 

 

Low-power coaxial Ethernet transceiver

NE83Q92

 

 

 

 

 

 

DESCRIPTION

PIN CONFIGURATION

The NE83Q92 is a low power BiCMOS coaxial transceiver interface

(CTI) for Ethernet (10base5) and Thin Ethernet (10base2) local area networks. The CTI is connected between the coaxial cable and the Data Terminal Equipment (DTE) and consists of a receiver, transmitter, receive-mode collision detector, heartbeat generator and jabber timer (see Block Diagram). The transmitter output connects directly to a doubly terminated 50Ω cable, while the receiver output, collision detector output and transmitter input are connected to the

DTE through isolation transformers. Isolation between the CTI and the DTE is an IEEE 802.3 requirement that can be met on signal lines by using a set of pulse transformers. Power isolation for the CTI is achieved using DC-to-DC conversion through a power transformer (see Figure 3, Connection Diagram).

The part is fully pin compatible with the industry standard 8392, but has substantially lower current consumption, is fully compliant with the IEEE802.3 standard, and has additional features such as optional pull-down resistors (Figure 3, Note 4), and automatic selection between AUI and coaxial connections.

The NE83Q92 is manufactured on an advanced BiCMOS process and is available with PLCC and SOL packages which make it ideally suited to lap-top personal computers or systems where low power consumption, limited board space and jumperless design is required. Refer to selection flow chart for optimal apllication.

FEATURES

Fully compliant with Ethernet II, IEEE 802.3 10BASE-5 and 10BASE-2, and ISO 8802/3 interface specifications

100% drop-in compatible with industry standard 8392 sockets (N & A options)

Optimal implementation can use 1 Watt DC-DC converter and reduces external part count by not requiring external pull-down resistors

High efficiency AUI drivers automatically power-down under idle conditions to minimize current consumption

Automatically disables AUI drivers when no coaxial cable is connected, allowing hard-wiring of AUI connection and local/integrated CTI connection

Smart squelch on data inputs eliminates false activations

Advanced BiCMOS process for extremely low power operation

Available in 16-pin DIP, 16-pin SOL and both 20and 28-pin

PLCC packages

Expanded version (NE83Q93) with 5 LED status drivers is available for repeater and advanced system applications

Full ESD protection

Power-on reset prevents glitches on coaxial cable

D, N Packages

CD+

1

 

16

CDS

 

 

 

 

 

 

 

 

 

 

CD±

2

 

15

TXO

 

 

 

 

 

 

 

 

 

 

RX+

3

 

14

RXI

VEE

 

 

 

VEE

 

 

 

4

 

13

VEE

 

 

 

 

5

 

12

RR±

 

 

 

 

 

RX±

6

 

11

RR+

 

 

 

 

 

 

 

 

 

 

TX+

7

 

10

GND

 

 

 

 

 

 

 

 

 

 

TX±

8

 

9

HBE

A Packages

 

 

 

CD±

CD+

N/C

CDS

TXO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

 

2

 

1

 

20

 

19

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RX+

4

 

 

 

 

 

 

 

 

 

 

 

18

RXI

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VEE

5

 

 

 

 

 

 

 

 

 

 

17

VEE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

V

6

 

 

 

 

 

 

 

 

 

 

16

VEE

EE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VEE

7

 

 

 

 

 

 

 

 

 

 

 

15

RR±

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RX±

8

 

 

 

 

 

 

 

 

 

 

 

14

RR+

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9

 

10

 

11

 

12

 

13

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TX+

TX±

GND

HBE

GND

 

 

 

 

RX+

CD±

CD+

CDS

TXO

N/C

RXI

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

 

3

 

2

 

1

 

28

 

27

 

26

 

 

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

25

 

EE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VEE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VEE

6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

24

V

VEE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EE

7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

23

V

VEE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EE

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

22

V

VEE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EE

9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

21

V

VEE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EE

10

 

 

 

 

 

 

 

 

 

 

 

 

 

 

20

V

VEE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

19

RR±

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

12

 

13

 

14

 

15

 

16

 

17

 

18

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RX±

TX+

TX±

HBE

GND

GND

RR+

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SD00302

Figure 1. Pin Configurations

ORDERING INFORMATION

DESCRIPTION

TEMPERATURE RANGE

ORDER CODE

DWG #

 

 

 

 

16-Pin Plastic Dual In-Line Package (DIP)

0 to +70°C

NE83Q92N

SOT38-4

 

 

 

 

16-Pin Plastic Small Outline Large (SOL) Package

0 to +70°C

NE83Q92D

SOT162-1

 

 

 

 

20-Pin Plastic Leaded Chip Carrier (PLCC) Package

0 to +70°C

NE83Q92A20

SOT380-1

 

 

 

 

28-Pin Plastic Leaded Chip Carrier (PLCC) Package

0 to +70°C

NE83Q92A

SOT261-3

1995 May 01

2

853-1737 15180

Philips Semiconductors

Product specification

 

 

 

Low-power coaxial Ethernet transceiver

NE83Q92

 

 

 

PIN DESCRIPTIONS

PIN NO.

PIN NO.

PIN NO.

SYMBOL

DESCRIPTION

N PKG

PLCC-20

PLCC-28

 

 

 

 

 

 

 

1

2

2

CD+

Collision Outputs. Balanced differential line driver outputs which send a 10MHz signal to the

DTE in the event of a collision, jabber interrupt or heartbeat test. External pull-down resistors

2

3

3

CD±

are optional.

 

 

 

 

 

 

 

 

 

3

4

4

RX+

Receiver Outputs. Balanced differential line driver outputs which send the received signal to

6

8

12

RX±

the DTE. External pull-down resistors are optional.

 

 

 

 

 

7

9

13

TX+

Transmitter Inputs. Balanced differential line receiver inputs which accept the transmission

8

10

14

TX±

signal from the DTE and apply it to the coaxial cable at TXO, if it meets Tx squelch threshold.

 

 

 

 

 

9

12

15

HBE

Heartbeat Enable. The heartbeat function is disabled when this pin is connected to VEE and

 

 

 

 

enabled when connected to GND or left floating.

 

 

 

 

 

11

14

18

RR+

External Resistor. A 1kΩ (1%) resistor connected between these pins establishes the

12

15

19

RR±

signaling current at TXO.

 

 

 

 

 

 

 

 

 

Receiver Input. This pin is connected directly to the coaxial cable. Received signals are

14

18

26

RXI

equalized, amplified, and sent to the DTE through the RX± pins, if it meets Rx squelch

 

 

 

 

threshold.

 

 

 

 

 

15

19

28

TXO

Transmitter Output. This pin is connected directly (Thin Ethernet) or through an external

isolating diode (Ethernet) to the coaxial cable.

 

 

 

 

 

 

 

 

 

16

20

1

CDS

Collision Detect Sense. Ground sense connection for the collision detection circuitry. This

pin should be connected directly to the coaxial cable shield for standard Ethernet operation.

 

 

 

 

 

 

 

 

 

10

11

16

GND

Positive Supply Pin.

13

17

 

 

 

 

 

 

 

 

4

5 ± 7

5 to 11

 

 

5

 

Negative supply pins.

16 ± 17

20 to 25

VEE

13

 

 

1

 

N/C

Not used.

 

 

 

 

 

NOTE:

1. The IEEE 802.3 name for CD is CI; for RX is DI; for TX is DO.

1995 May 01

3

Philips NE83Q92A20, NE83Q92N, NE83Q92A, NE83Q92D Datasheet

Philips Semiconductors

Product specification

 

 

 

Low-power coaxial Ethernet transceiver

NE83Q92

 

 

 

BLOCK DIAGRAM

COAX

 

 

 

DTE

 

 

 

INTERFACE

CABLE

 

 

 

 

 

 

 

RXI

BUFFER

 

LINE

 

 

RECEIVER

 

DRIVER

RECEIVE

 

 

 

PAIR

 

EQUALIZER

 

 

 

 

 

(RX+, RX±)

 

 

 

 

 

4±POLE BESSEL

 

RECEIVER

 

 

LOW PASS FILTER

 

AC±DC SQUELCH

 

 

TXO

 

 

TRANSMIT

 

TRANSMITTER

PAIR

 

 

 

 

(TX+, TX±)

 

CDS

 

 

 

 

 

 

 

SENSE

 

 

 

 

BUFFER

 

 

 

 

 

TRANSMITTER

 

 

 

SQUELCH

 

 

 

COLLISION

 

 

 

COMPARATOR

 

 

HEARTBEAT ENABLE

&

 

 

 

HEARTBEAT

 

 

 

 

 

 

GENERATOR

 

 

 

 

10MHz

COLLISION

 

 

 

PAIR

 

 

 

OSC

 

 

 

(CD+, CD±)

 

 

 

 

 

 

JABBER

 

LINE

 

 

TIMER

 

DRIVER

 

 

 

 

SD00274

Figure 2. Block Diagram

ABSOLUTE MAXIMUM RATINGS

SYMBOL

PARAMETER

RATING

UNIT

 

 

 

 

V

Supply voltage1

±12

V

EE

 

 

 

V

Voltage at any input1

0 to ±12

V

IN

 

 

 

TSTG

Storage temperature range

±65 to +150

°C

TSOLD

Lead soldering temperature (10sec.)

+300

°C

T

Recommended max junction temperature2

+150

°C

J

 

 

 

θJA

Thermal impedance (N and A packages)

60

°C/W

NOTE:

1.100% measured in production.

2.The junction temperature is calculated from the following expression:

TJ = TA + θJA [(VEE x 0.015 x nIDL) + (VEE x 0.027 x nRX) + (VEE x 0.075 x nTX)] where

TA

=

Ambient temperature in °C.

θJA

=

Thermal resistance of package.

VEE =

Normal operating supply voltage in volts.

nIDL =

Percentage of duty cycle idle

nRX =

Percentage of duty cycle receiving

nTX

=

Percentage of duty cycle transmitting

1995 May 01

4

Philips Semiconductors

Product specification

 

 

 

Low-power coaxial Ethernet transceiver

NE83Q92

 

 

 

ELECTRICAL CHARACTERISTICS

V = ±9V ±6%; T = 0°C to +70°C unless otherwise specified1,2. No external isolation

 

 

 

 

EE

A

 

 

 

 

 

 

 

 

 

LIMITS

 

 

 

 

 

 

 

 

 

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

 

 

 

 

 

 

 

VUVL

Under voltage lockout. Transceiver disabled for

 

 

±7.5

 

V

|VEE| < |VUVL|

 

 

 

 

 

 

 

 

 

 

Supply current idle

 

 

±15

±20

mA

IEE

 

 

 

 

 

 

Supply current transmitting (without collision)

Without external

 

±80

±90

mA

 

pull-down resistors

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IRXI

Receive input bias current

VRXI = 0V

±2

 

+25

μA

ICDS

Cable sense input bias current

VCDS = 0V

 

+1

+3

μA

VIH

HBE input HIGH voltage

 

VEE +2.4

 

 

V

VIL

HBE input LOW voltage

 

 

 

VEE +1.6

V

IIH

HBE input HIGH current

VHBE = 0V

 

 

+10

μA

IIL

HBE input LOW current

VHBE = VEE

±30

 

 

μA

I

Transmit output DC current level3

 

±37

 

±45

mA

TDC

 

 

 

 

 

 

I

Transmit output AC current level3

 

±28

 

±I

mA

TAC

 

 

 

 

TDC

 

ITX10

Transmit current

VTXO = ±10V

±250

 

+250

μA

V

Transmitter output voltage compliance4

 

 

 

±3.7

V

TCOM

 

 

 

 

 

 

 

Collision threshold5

Measured by applying

 

 

 

 

VCD

DC voltage at RXI

±1450

±1530

±1580

mV

 

 

(CDS = 0V)

 

 

 

 

 

 

 

 

 

 

 

VDIS

AUI disable voltage at RXI

Measured as DC

 

±3.5

 

V

voltage at RXI

 

 

VOD

Differential output voltage ± non idle at RX± and

 

±600

 

±1100

mV

6

 

 

 

CD±

 

 

 

 

 

VOB

Differential output voltage imbalance ± idle at

 

 

 

±40

mV

7

 

 

 

 

RX± and CD±

 

 

 

 

 

VOC

Output common mode voltage at RX± and CD±

RXI = 0V

±4.0

±5.5

±7.0

V

VRS

Receiver squelch threshold

VRXI average DC

±150

±250

±350

mV

(CDS = 0V)

VTS

Transmitter squelch threshold

(VTX+ ± VTX±) peak

±175

±225

±275

mV

RRXI

Shunt resistance at RXI non±transmitting

 

100

 

 

kΩ

CRXI

Input capacitance at RXI8

 

 

1

2

pF

RTXO

Shunt resistance at TXO transmitting

 

7.5

10

 

kΩ

RAUIZ

Differential impedance at RX± and CD± with no

 

 

6

 

kΩ

coaxial cable connected

 

 

 

RTX

Differential impedance at TX±

 

 

20

 

kΩ

NOTES:

1.Currents flowing into device pins are positive. All voltages are referenced to ground unless otherwise specified. For ease of interpretation, the parameter limit that appears in the MAX column is the largest value of the parameter, irrespective of sign. Similarly, the value in the MIN column is the smallest value of the parameter, irrespective of sign.

2.All typical values are for VEE = ±9V and TA = 27°C.

3.ITDC is measured as (VMAX + VMIN)/(2 x 25) where VMAX and VMIN are the max and min voltages at TXO with a 25Ω load between TXO and GND. ITAC is measured as (VMAX ± VMIN)/(2 x 25).

4.The TXO pin shall continue to sink at least ITDC min when the idle (no signal) voltage on this pin is ±3.7V.

5.Collision threshold for an AC signal is within 5% of VCD.

6.Measured on secondary side of isolation transformer (see Connection Diagram, Figure 3). The transformer has a 1:1 turns ratio with an inductance between 30 and 100μH at 5MHz.

7.Measured as the voltage difference between the RX pins or the CD pins with the transformer removed.

8.Not 100% tested in production.

1995 May 01

5

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