Philips N74F723AD, N74F725N, N74F725AN, N74F725AD, N74F725-1N Datasheet

INTEGRATED CIRCUITS

74F723A

Quad 2-to-1 data selector multiplexer (3-State)

74F723-1

Quad 2-to-1 data selector multiplexer with 30Ω equivalent output termination impedance (3-State)

74F725A

Quad 3-to-1 data selector multiplexer (3-State)

74F725-1

Quad 3-to-1 data selector multiplexer with 30Ω equivalent output termination impedance (3-State)

Product specification

1990 Dec 13

IC15 Data Handbook

m n r

	Philips Semiconductors	Product specification
	Multiplexers	74F723A/74F723±1/
		74F725A/74F725±1

74F723A Quad 3-to-1 Data Selector Multiplexer (3-State)

74F723-1 Quad 3-to-1 Data Selector Multiplexer with 30 Equivalent Output Termination Impedance (3-State) 74F725A Quad 4-to-1 Data Selector Multiplexer

74F725-1 Quad 4-to-1 Data Selector Multiplexer with 30 Equivalent Output Termination Impedance

FEATURES for 74F723A/74F723-1

•Consists of four 3-to-1 Multiplexers

•High impedance PNP base inputs for reduced loading (20μA in High and Low states)

•Inverting or non-inverting data path capability by an inverting (INV) input

•Designed for address multiplexing of dynamic RAM and other applications

•Multiple side pins for VCC and GND to reduce lead inductance (improves speed and noise immunity)

•3-State outputs sink 64mA (74F723A only)

•30 termination impedance on each output ± 74F723-1

FEATURES for 74F725A/74F725-1

•Consists of four 4-to-1 Multiplexers

•High impedance PNP base inputs for reduced loading (20μA in High and Low states)

•Equivalent to two 74F253s without 3-State

•Outputs sink 64mA (74F725A only)

•30 termination impedance on each output ± 74F725-1

DESCRIPTION

The 74F723A/74F723-1 consist of four 3-to-1 multiplexers designed for address multiplexing of dynamic RAMs and other multiplexing applications. Select (S0, S1) inputs control which line is to be selected, as defined in the Function Table for 74F723A/74F723-1.

When the invering input (INV) is Low, the input data path is inverted.

To improve speed and noise immunity, VCC and GND side pins are used. The 3-State outputs source 15mA and sink 64mA. The

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

74F723-1 is the same as 74F723A except that it has a 30 temination impedance on each output to reduce line noise and the 3-State outputs sink 5mA.

The 74F725A/74F725-1 consist of four 4-to1 multiplexers designed for general multiplexing purpose. The select (S0, S1) inputs control which line is to be selected, as defined in the Function Table for 74F725A/725-1. The outputs source 15mA and sink 64mA. The 74F725-1 is the same as the 74F725A except that it has a 30 termination impedance on each output to reduce line noise and the outputs sink 5mA.

		TYPICAL	TYPICAL SUPPLY
	TYPE		CURRENT
		PROPAGATION DELAY
			(TOTAL)
	74F723A	5.5ns	25mA
	74F723-1	7.0ns	26mA
	74F725A	5.5ns	20mA
	74F725-1	6.5ns	20mA

ORDERING INFORMATION

		COMMERCIAL RANGE	PKG DWG
	DESCRIPTION	VCC = 5V ± 10%
			#
		Tamb = 0° C to +70°C
	20-Pin Plastic Slim	N74F723AN, N74F723-1N,	SOT222-1
	DIP (300 mil)	N74F725AN, N74F725-1N
	24-Pin Plastic SOL	N74F723AD, N74F723-1D,	SOT137-1
		N74F725AD, N74F725-1D

TYPE					PINS	DESCRIPTION	74F(U.L.)	LOAD VALUE
							HIGH/LOW	HIGH/LOW
		Dna, Dnb, Dnc				Data inputs	1.0/0.066	20μA/40μA
74F723A/		S0, S1				Select inputs	1.0/0.033	20μA/20μA
74F723-1						Output Enable input	1.0/0.033	20μA/20μA
			OE
						Output inverting input	1.0/0.033	20μA/20μA
		INV
74F723A		Q0 - Q3				Data outputs for 74F723A	750/106.7	15mA/64mA
74F723-1		Q0 - Q3				Data outputs for 74F723-1	750/8.33	15mA/5mA
74F725A/		Dna, Dnb, Dnc, Dnd				Data inputs	1.0/0.066	20μA/40μA
74F725-1		S0, S1				Select inputs	1.0/0.033	20μA/20μA
74F725A		Q0 - Q3				Data outputs	750/106.7	15mA/64mA
74F725-1		Q0 - Q3				Data outputs	750/8.33	15mA/5mA

NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20μA in the High state and 0.6mA in the Low state.

1990 Dec 13

2

853-1369 01257

Philips Semiconductors Product specification

Multiplexers													74F723A/74F723±1/
													74F725A/74F725±1
PIN CONFIGURATION ± 74F723A/74F723-1											PIN CONFIGURATION ± 74F725A/74F725-1
D0a	1				24		OE				D0a	1				24	SO
D0b	2				23		INV				D0b	2				23	S1
D0c	3				22	D1a					D0c	3				22	D1a
Q0	4				21	D1b					D0d	4				21	D1b
Q1	5				20	D1c					Q0	5				20	D1c
GND	6				19	VCC					Q1	6				19	D1d
GND	7				18	VCC					GND	7				18	VCC
Q2	8				17	D2a					Q2	8				17	D2a
Q3	9				16	D2b					Q3	9				16	D2b
D3a	10				15	D2c					D3a	10				15	D2c
D3b	11				14	S0					D3b	11				14	D2d
D3c	12				13	S1					D3c	12				13	D3d
																SF01227
				SF01226

LOGIC SYMBOL ± 74F723A/74F723-1

		1		2		3		22			21		20		17			16		15			10		11		12
		D0a D0b				D0c D1a D1b D1c D2a D2b D2c D3a D3b D3c
14		S0
13		S1
23		INV
24		OE							Q0				Q1			Q2				Q3
								4					5		8					9
VCC = Pin 18, 19
GND = Pin 6, 7																									SF01228

LOGIC SYMBOL ± 74F725A/74F725-1

1

2

3

4

22

21

20

19

17

16

15

14

10

11

12

13

D0a D0b D0c D0d D1a D1b D1c D1d D2a D2b D2cD2d D3a D3b D3c D3d

24		S0
23		S1	Q0		Q1		Q2		Q3
VCC = Pin 18			5		6		5		9
GND = Pin 7										SF01229

LOGIC SYMBOL (IEEE/IEC) ± 74F723A/74F723-1									LOGIC SYMBOL (IEEE/IEC) ± 74F725A/74F725-1
	14
		G1		MUX									MUX
	13									24
		G2										G1
	23									23
		M										G2
24
		EN									1
	1										2				5
	2					4					3
											4
	3
									22
	22								21						6
						5					20
	21
											19
20
											17
17											16				8
	16					8					15
											14
	15
											10
	10
											11				9
	11					9			12
									13
12						SF01230									SF01231

1990 Dec 13

3

Philips Semiconductors Product specification

	Multiplexers	74F723A/74F723±1/
		74F725A/74F725±1
	LOGIC DIAGRAM ± 74F723A/74F723-1

VCC = Pin 18, 19

GND = Pin 6, 7

OE	24
INV	23
S0	14
S1	13
D0a	1
D0b	2
	4
		Q0
D0c	3
D1a	22
D1b	21
	5	Q1
D1c	20
D2a	17
D2b	16
	8	Q2
D2c	15
D3a	10
D3b	11
	9	Q3
D3c	12
	SF01232

FUNCTION TABLE ± 74F723A/74F723-1

INPUTS

OUTPUT

S0

S1

INV

OE

Dna

Dnb

Dnc

Qn

L

L

L

L

Data a

Data b

Data c

Data a

L

L

H

L

Data a

Data b

Data c

Data a

H

L

L

L

Data a

Data b

Data c

Data b

H

L

H

L

Data a

Data b

Data c

Data b

X

H

L

L

Data a

Data b

Data c

Data c

X

H

H

L

Data a

Data b

Data c

Data c

X

X

X

H

X

X

X

Z

H

=

High voltage level

L

=

Low voltage level

X

=

Don't care

Z

=

High impedance ªoffº state

1990 Dec 13

4

	Philips Semiconductors	Product specification
	Multiplexers	74F723A/74F723±1/
		74F725A/74F725±1

LOGIC DIAGRAM ± 74F725A/74F725-1
S0	24
S1	23
D0a	1
D0b	2
D0c	3	5 Q0
D0d	4
D1a	22
D1b	21
D1c	20	6 Q1
D1d	19
D2a	17
D2b	16
D2c	15	8 Q2
D2d	14
D3a	10
D3b	11
D3c 12		9 Q3
D3d 13
VCC = Pin 18
GND = Pin 7		SF01233

FUNCTION TABLE ± 74F725A/74F725-1

				INPUTS				OUTPUT
	S0		S1	Dna	Dnb	Dnc	Dnd	Qn
	L		L	Data a	Data b	Data c	Data d	Data a
	H		L	Data a	Data b	Data c	Data d	Data b
	L		H	Data a	Data b	Data c	Data d	Data c
	H		H	Data a	Data b	Data c	Data d	Data d
H	=	High voltage level
L	=	Low voltage level

1990 Dec 13

5