Analog Devices AD1866 Datasheet

a		Single Supply
		Dual 16-Bit Audio DAC
		AD1866*

FEATURES

Dual Serial Input, Voltage Output DACs Single +5 Volt Supply

0.005% THD+N Low Power –50 mW

115 dB Channel Separation Operates at 83 Oversampling

16-Pin Plastic DIP or SOIC Package

APPLICATIONS

Multimedia Workstations

PC Audio Add-In Boards

Portable CD and DAT Players

Automotive CD and DAT Players

Noise Cancellation

FUNCTIONAL BLOCK DIAGRAM

			16-BIT				AD1866
VL	1		DAC						16	VBL
										VS
LL	2		16-BIT						15
			SERIAL
DL	3		REGISTER						14	VOL
CLK	4						VREF		13	NRL
										AGND
DR	5		16-BIT						12
			SERIAL
LR	6		REGISTER				VREF		11	NRR
DGND
	7		16-BIT						10	VOR
VBR			DAC							VS
	8								9

PRODUCT DESCRIPTION

The AD1866 is a complete dual 16-bit DAC offering excellent performance while requiring a single +5 V power supply. It is fabricated on Analog Devices’ ABCMOS wafer fabrication process. The monolithic chip includes CMOS logic elements, bipolar and MOS linear elements and laser trimmed, thinfilm resistor elements. Careful design and layout techniques have resulted in low distortion, low noise, high channel separation and low power dissipation.

The DACs on the AD1866 chip employ a partially segmented architecture. The first three MSBs of each DAC are segmented into 7 elements. The 13 LSBs are produced using standard R-2R techniques. The segments and R-2R resistors are laser trimmed to provide extremely low total harmonic distortion. The AD1866 requires no deglitcher or trimming circuitry.

Each DAC is equipped with a high performance output amplifier. These amplifiers achieve fast settling and high slew rate, producing ±1 V signals at load currents up to ±1 mA. The buffered output signal range is 1.5 V to 3.5 V. The 2.5 V reference voltages eliminate the need for “false ground” networks.

A versatile digital interface allows the AD1866 to be directly connected to all digital filter chips. Fast CMOS logic elements allow for an input clock rate of up to 16 MHz. This allows for operation at 2×, 4×, 8×, or 16× the sampling frequency (where FS = 44.1 kHz) for each channel. The digital input pins of the AD1866 are TTL and +5 V CMOS compatible.

*Protected by U.S. Patent Nos: 3,961,326; 4,141,004; 4,349,811; 4,857,862; and patents pending.

The AD1866 operates on +5 V power supplies. The digital supply, VL, can be separated from the analog supply, VS, for reduced digital feedthrough. Separate analog and digital ground pins are also provided. In systems employing a single +5 volt power supply, VL and VS should be connected together. In battery operated systems, operation will continue even with reduced supply voltage. Typically, the AD1866 dissipates 50 mW.

The AD1866 is packaged in either a 16-pin plastic DIP or a 16-pin plastic SOIC package. Operation is guaranteed over the temperature range of –35°C to +85°C and over the voltage supply range of 4.75 V to 5.25 V.

PRODUCT HIGHLIGHTS

1.Single supply operation @ +5 V.

2.50 mW power dissipation.

3.THD+N is 0.005% (typical).

4.Signal-to-Noise Ratio is 95 dB (typical).

5.115 dB channel separation (typical).

6.Compatible with all digital filter chips.

7.16-pin DIP and 16-pin SOIC packages.

8.No deglitcher required.

9.No external adjustments required.

REV. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: [phone] Fax: [phone]

AD1866–SPECIFICATIONS (TA = +258C and +5 V supplies unless otherwise noted)

		Min	Typ	Max	Unit
RESOLUTION			16		Bits
DIGITAL INPUTS	VIH	2.4		0.8	V
	VIL				V
	IIH, VIH = VL		1.0		μA
	IIL, VIL = DGND	13.5	–10.0		μA
Maximum Clock Input Frequency					MHz
ACCURACY			±3
Gain Error					% of FSR
Gain Matching			±3		% of FSR
Midscale Error			±30		mV
Midscale Error Matching			±10		mV
Gain Linearity Error			±3		dB
DRIFT (0°C to +70°C)			±100		ppm/°C
Gain Drift
Midscale Drift			–130		μV/°C
TOTAL HARMONIC DISTORTION + NOISE
0 dB, 990.5 Hz	AD1866N		0.005	0.01	%
	AD1866R		0.005	0.01	%
–20 dB, 990.5 Hz	AD1866N		0.02		%
	AD1866R		0.02		%
–60 dB, 990.5 Hz	AD1866N		2.0		%
	AD1866R		2.0		%
CHANNEL SEPARATION (1 kHz, 0 dB)		108	115		dB
SIGNAL-TO-NOISE RATIO (With A-Weight Filter)			95		dB
D-RANGE (With A-Weight Filter)			90		dB
OUTPUT
Voltage Output Pins (VOL, VOR)			±1
Output Range (±3%)					V
Output Impedance			0.1		Ω
Load Current			±1		mA
Bias Voltage Pins (VBL, VBR)
Output Range			+2.5		V
Output Impedance			350		Ω
POWER SUPPLY
Specification, VL and VS		4.75	5	5.25	V
Operation, VL and VS		3.5		5.25	V
+I, VL and VS = 5 V			10	14	mA
POWER DISSIPATION			50	70	mW
TEMPERATURE RANGE					°C
Operation		–35		85
Storage		–60		100	°C

Specifications subject to change without notice.

Specifications in boldface are tested on all production units at final electrical

–2–

REV. 0

Typical Performance–AD1866

	–30
	–40			–60dB
	–50
dB	–60
–
THD+N	–70
	–80			–20dB
	–90			0dB
–100
	500	5500	10500	15500	20500

FREQUENCY – Hz

Figure 1. THD+N vs. Frequency

	125
dB–	124
SEPARATION	123
CHANNEL	122

121

120

102	103	104	105
	FREQUENCY – Hz

Figure 2. Channel Separation vs. Frequency

	–30
	–40					–60dB
	–50
dB–	–60
THD+N	–70
	–80						–20dB
	–90						0dB
	–100
				4.8	5.0	5.2	5.4
	4.4		4.6					5.6
				SUPPLY VOLTAGE

Figure 3. THD+N vs. Supply Voltage

	6		–35°C
	4
dB	2		0°C
–
ERROR			25°C
LINEARITY	0
	–2
	–4		70°C
GAIN
	–6
			125°C
	–8
	–100			–80	–60	–40	–20	0	20

INPUT AMPLITUDE – dB

Figure 4. Gain Linearity Error vs. Input Amplitude

	–30
	–40					–60dB
	–50
dB	–60
–
THD+N	–70
							–20dB
	–80
	–90						0dB
	–100
	–75	–50	–25	0	25	50	75	100	125
				TEMPERATURE – °C

Figure 5. THD+N vs. Temperature

	80
	70
dB–	60
PSRR
	50
	40
	103	104	105

FREQUENCY – Hz

Figure 6. Power Supply Rejection Ratio vs. Frequency (Supply Modulation Amplitude at 500 mV p-p)

REV. 0

–3–

AD1866

ABSOLUTE MAXIMUM RATINGS*

*Stresses greater than those listed under “Absolute Maximum Ratings” may cause

VL to DGND

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 6 V

permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions above those indicated in the

VS to AGND

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 6 V

operational section of this specification is not implied. Exposure to absolute

AGND to DGND

. . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.3 V

maximum rating conditions for extended periods may affect device reliability.

Digital Inputs to DGND . . . . . . . . . . . . . . . . . . . –0.3 V to VL

Soldering (10 sec)

. . . . . . . . . . . . . . . . . . . . . . . . . . . +300°C

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

WARNING!

accumulate on the human body and test equipment and can discharge without detection.

Although the AD1866 features proprietary ESD protection circuitry, permanent damage may

occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD

ESD SENSITIVE DEVICE

precautions are recommended to avoid performance degradation or loss of functionality.

PIN CONFIGURATION

PIN DESIGNATIONS

AD1866

Pin

Mnemonic

Description

16-BIT

VL

1

DAC

16

VBL

1

VL

Digital Supply (+5 V)

LL

2

16-BIT

15

VS

2

LL

Left Channel Latch Enable Pin

SERIAL

3

DL

Left Channel Data Input Pin

DL

3

REGISTER

14

VOL

4

CLK

Clock Input Pin

CLK

4

VREF

13

NRL

DR

5

12

AGND

5

DR

Right Channel Data Input Pin

16-BIT

6

LR

Right Channel Latch Enable Pin

SERIAL

LR

6

REGISTER

VREF

11

NRR

7

DGND

Digital Common Pin

DGND

7

10

VOR

8

VBR

Right Channel Bias Pin

DAC

16-BIT

VBR

8

9

VS

9

VS

Analog Supply (+5 V)

10

VOR

Right Channel Output Pin

11

NRR

Right Channel Noise Reduction Pin

12

AGND

Analog Common Pin

13

NRL

Left Channel Noise Reduction Pin

14

VOL

Left Channel Output Pin

15

VS

Analog Supply (+5 V)

16

VBL

Left Channel Bias Pin

ORDERING GUIDE

Temperature

Package

Package

Model

Range

Description

Option

AD1866N

–35°C to +85°C

Plastic DIP

N-16

AD1866R

–35°C to +85°C

SOIC

R-16

AD1866R-REEL

–35°C to +85°C

SOIC

R-16

–4–

REV. 0