Analog Devices AD1862N-J, AD1862N Datasheet

a		Ultralow Noise
		20-Bit Audio DAC
		AD1862*

FEATURES

120 dB Signal-to-Noise Ratio

102 dB D-Range Performance

61 dB Gain Linearity

61 mA Output Current

16-Pin DIP Package

0.0012% THD + N

APPLICATIONS

High Performance Compact Disc Players

Digital Audio Amplifiers

Synthesizer Keyboards

Digital Mixing Consoles

High Resolution Signal Processing

FUNCTIONAL BLOCK DIAGRAM

	–VS	1		VOLTAGE	16	+VS
	–VS	2		REFERENCE	15	NR2
	TRIM	3			14	ADJ
	+VL	4			13	NR1
	CLK	5	INPUT		12	AGND
	LE	6	&	20-BIT	11	IOUT
			DIGITAL
				DAC
			OFFSET
	DATA	7			10	RF
	–VL	8	AD1862		9	DGND

PRODUCT DESCRIPTION

The AD1862 is a monolithic 20-bit digital audio DAC. Each device provides a 20-bit DAC, 20-bit serial-to-parallel input register and voltage reference. The digital portion of the AD1862 is fabricated with CMOS logic elements that are provided by Analog Devices’ BiMOS II process. The analog portion of the AD1862 is fabricated with bipolar and MOS devices as well as thin-film resistors.

New design, layout and packaging techniques all combine to produce extremely high performance audio playback. The design of the AD1862 incorporates a digital offset circuit which improves low-level distortion performance. Low stress packaging techniques are used to minimize stress-induced parametric shifts. Stress-sensitive circuit elements are located in die areas which are least affected by packaging stress. Laser-trimming of initial linearity error affords extremely low total harmonic distortion. Output glitch is also small, contributing to the overall high level of performance.

The noise performance of the AD1862 is excellent. When used with the recommended two external noise-reduction capacitors, it achieves 120 dB signal-to-noise ratio.

The serial input port consists of the clock, data and latch enable pins. A serial 20-bit, 2s complement data word is clocked into the DAC, MSB first, by the external data clock. A latch-enable signal transfers the input word from the internal serial input

*Protected by U.S. Patent Numbers: 4,349,811; 4,857,862; 4,855,618; 3,961,326; 4,141,004; 4,902,959.

REV. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

register to the DAC input register. The data clock can function at 17 MHz, allowing 16 × FS operation. The serial input port is compatible with second-generation digital filter chips for consumer audio products such as the NPC SM5813 and SM5818.

The AD1862 operates with ±5 V to ±12 V supplies for the digital power supplies and ±12 V supplies for the analog supplies. The digital and analog supplies can be separated for reduced digital crosstalk. Separate analog and digital common pins are also provided. The AD1862 typically dissipates less than

300 mW.

The AD1862 is packaged in a 16-pin plastic DIP. The operating range is guaranteed to be –25°C to +70°C.

PRODUCT HIGHLIGHTS

1.120 dB signal-to-noise ratio. (typical)

2.102 dB D-Range performance. (minimum)

3.±1 dB gain linearity @ –90 dB amplitude.

4.20-bit resolution provides 120 dB of dynamic range.

5.16 × FS operation.

6.0.0016% THD+N @ 0 dB signal amplitude. (typical)

7.Space saving 16-pin DIP package.

8.±1 mA output current.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: [phone] Fax: [phone]

AD1862–SPECIFICATIONS (TA at +258C and 612 V supplies, see Figure 10 for test circuit schematic)

		Min	Typ	Max	Units
RESOLUTION		20			Bits
DIGITAL INPUTS	VIH	2.0	4.0		V
	VIL		0.4	0.8	V
	IIH @ VIH = 4.0 V			1.0	μA
	IIL @ VIL = 0.4 V	17		–10	μA
Maximum Clock Input Frequency					MHz
ACCURACY				±2
Gain Error			±2		%
Midscale Output Error				±5	μA
TOTAL HARMONIC DISTORTION + NOISE (EIAJ)1
0 dB, 990.5 Hz	AD1862N-J		–98 (0.0012)	–96 (0.0016)	dB (%)
	AD1862N		–94 (0.0019)	–92 (0.0025)	dB (%)
–20 dB, 990.5 Hz	AD1862N, N-J		–84 (0.0063)	–80 (0.01)	dB (%)
–60 dB, 990.5 Hz	AD1862N, N-J		–45 (0.56)	–42 (0.8)	dB (%)
D-Range, –60 dB,	A-Weight Filter	102			dB
SIGNAL-TO-NOISE RATIO2: (EIAJ)1
A-Weight Filter	AD1862N-J	113	119		dB
	AD1862N	110	119		dB
GAIN LINEARITY			±1
@ –90 dB	AD1862N-J				dB
	AD1862N		±1		dB
OUTPUT CURRENT			±1
Bipolar Range					mA
Tolerance			±1	62	%
Output Impedance (±30%)			2.1		kΩ
Settling Time			350		ns
FEEDBACK RESISTOR					kΩ
Value			3
Tolerance			±1	62	%
POWER SUPPLY					±V
Voltage	VL and –VL	4.75	12.0	13.2
Voltage	VS and –VS	10.8	12.0	13.2	±V
Current	+I, VL and VS = 12 V, 17 MHz Clock		11	15	mA
	–I, –VL and –VS = –12 V, 17 MHz Clock		13	16	mA
POWER DISSIPATION
VL and VS = 12 V, –VL and –VS = –12 V, 17 MHz Clock			288	372	mW
TEMPERATURE RANGE					°C
Specification			+25
Operation		–25		+70	°C
Storage		–60		+100	°C

NOTES

1Test Method complies with EIAJ Standard CP-307.

2The signal-to-noise measurement includes noise contributed by the SE5534A op amp used in the test fixture but does not include the noise contributed by the low pass filter used in the test fixture.

Specifications in boldface are tested on all production units at final electrical test.

Specifications subject to change without notice.

–2–

REV. A

–30

	–40
	–50						–60dB
dB–+N
	–60
THD	–70
	–80
							–20dB
	–90
								0dB
			1		10		20
				FREQUENCY – kHz
			Figure 1. THD+N vs. Frequency
	400
	350
	300
ÖnV/Hz	250
	200
	150
	100				FULLSCALE
			MIDSCALE		–FULLSCALE
	50
	0
	1		10	100	1k	10k			100k
					Hz

Figure 2. Noise Density

Figure 3. Broadband Noise (20 kHz Bandwidth, Midscale)

AD1862

	2
					AD1862N-J
					GAIN LINEARITY
– dB	1
OUTPUT ERROR
ANALOG	–1
	– 2
	– 100	– 80	– 60	– 40	– 20	0
			DIGITAL INPUT – dB

Figure 4. Gain Linearity

	–30
	–40				–60dB
dB–N
	–50
+	–60
THD	–70
	–80
	–90				–20dB
					0dB
	–25	0	25	50	75
			TEMPERATURE – °C

Figure 5. THD+N vs. Temperature (1 kHz)

Figure 6. Midscale Differential Linearity

REV. A

–3–

AD1862

ABSOLUTE MAXIMUM RATINGS*

VL to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +13.2 V –VL to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –VS to 0 V VS to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +13.2 V –VS to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . –13.2 to 0 V AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 to +0.3 V

Digital Inputs to DGND . . . . . . . . . . . . . . . . . . . . . –0.3 to VL Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300°C, 10 sec

Storage Temperature . . . . . . . . . . . . . . . . . . –60°C to +100°C

*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD1862 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

PIN CONFIGURATION PIN DESIGNATIONS

	–VS				+VS	Pin	Function	Description
		1		16
						1	–VS	Bias Capacitor
	–VS
		2		15	NR2	2	–VS	Analog Negative Supply
	TRIM	3		14	ADJ	3	TRIM	Trim Pot Connection
			AD1862			4	+VL	Positive Logic Supply
	+VL	4	TOP VIEW	13	NR1	5	CLK	External Clock Input
						6	LE	Latch Enable Input
	CLK	5	(Not to Scale)	12	AGND	7	D	Data Input
	LE	6		11	IOUT	8	–VL	Negative Logic Supply
						9	DGND	Digital Ground
	DATA	7		10	RF	10	RF	Feedback Resistor
						11	IOUT	Output Current
	–VL
		8		9	DGND	12	AGND	Analog Ground
						13	NR1	Reference Capacitor
						14	ADJ	Midscale Adjust
						15	NR2	Bias Capacitor
						16	+VS	Positive Analog Supply

ORDERING GUIDE

	Operating
	Temperature			Package
Model	Range	THD+N @ FS	SNR	Option*
AD1862N	–25°C to +70°C	–92 dB, 0.0025%	110 dB	N-16
AD1862N-J	–25°C to +70°C	–96 dB, 0.0016%	113 dB	N-16

*N = Plastic DIP.

–4–

REV. A