a 16-Bit 500 kHz
Wide Temperature Range Sampling ADC
AD1385
FEATURES 16-Bit Resolution
500 kHz Sampling Rate
Differential Linearity Autocalibration Specified over –558C to +1258C Range
SNR 90 dB @ 100 kHz (min)
THD –88 dB @ 100 kHz (min) 0.0006% FSR DNL (typ) 0.0015% FSR INL (typ)
No Missing Codes
65, 610 V Bipolar Input Ranges
Zero Offset Autocalibration
APPLICATIONS
Medical Imaging
CAT
Magnetic Resonance
Radar
Vibration Analysis
Parametric Measurement Unit (ATE)
Digital Storage Oscilloscopes
Waveform Recorders
Analytical Instruments
PRODUCT DESCRIPTION
The AD1385 is a complete 500 kHz, 16-bit, sampling analog- to-digital converter contained in a single package. Its differential linearity autocalibration feature allows this high resolution, high speed converter to offer outstanding noise and distortion performance, as well as excellent INL and DNL specifications, over the full military temperature range. Autocalibration effectively eliminates DNL drift over temperature.
The AD1385 architecture includes a low noise, low distortion track/hold, a three pass digitally corrected subranging ADC, and linearity calibration circuitry. A complete linearity calibration requires only 15 ms. Precision thin-film resistors and a proprietary DAC contribute to the part’s outstanding dynamic and static performance.
FUNCTIONAL BLOCK DIAGRAM
The AD1385 uses four power supplies, ±5 V and ±15 V, and an external 10 MHz clock. Power dissipation is nominally 2.76 W. Two user selectable bipolar input ranges, ±5 V and ±10 V, are provided. Careful attention to grounding and a single package make it easy to design PCBs to achieve specified performance.
The AD1385’s pinout is nearly identical to that of the AD1382, a factory calibrated 16-bit, 500 kHz SADC. Just two additional connections, to enable and monitor autocalibration, are required. This commonality provides an easy upgrade path to extend system performance and operating temperature range.
REV. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
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(TA = +258C, VS = 615 V, VDD = +5 V, VSS = –5 V, 10 MHz External Clock, |
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AD1385–SPECIFICATIONS unless otherwise noted) |
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AD1385KD |
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AD1385TD |
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Parameter |
Min |
Typ |
Max |
Min |
Typ |
Max |
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Units |
RESOLUTION |
16 |
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16 |
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Bits |
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ANALOG INPUT |
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±5, ±10 |
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±5, ±10 |
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Input Ranges |
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V |
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Input Impedance |
2.45 |
2.5 |
2.55 |
2.45 |
2.5 |
2.55 |
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kΩ |
TRANSFER CHARACTERISTICS |
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(Combined ADC/Track/Hold) |
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±0.0015 |
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±0.0015 |
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Integral Nonlinearity1, 2, TMIN to TMAX |
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±0.0015 |
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±0.0015 |
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% FSR3 |
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Differential Nonlinearity1 |
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±0.0006 |
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±0.0006 |
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% FSR |
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Drift, TMIN to TMAX |
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0.3 |
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0.3 |
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ppm/°C |
Missing Codes, TMIN to TMAX |
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±0.05 |
None |
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±0.05 |
None |
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Gain Error4 |
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±0.15 |
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±0.15 |
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% FSR |
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Drift, TMIN to TMAX |
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8 |
15 |
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8 |
15 |
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ppm/°C |
Bipolar Zero4 |
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±0.05 |
±0.10 |
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±0.05 |
±0.10 |
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% FSR |
Drift, TMIN to TMAX |
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5 |
15 |
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5 |
15 |
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ppm/°C |
PSRR |
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±0.006 |
±0.10 |
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±0.006 |
±0.10 |
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% FSR/V |
Noise |
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70 |
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70 |
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μV rms |
DYNAMIC CHARACTERISTICS2 |
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±5 V FSR, VIN = –0.4 dB, TMIN to TMAX |
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Sample Rate |
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500 |
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500 |
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kHz |
Signal-to-Noise Ratio5 |
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f = 5 kHz |
90 |
93 |
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90 |
93 |
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dB |
f = 100 kHz |
90 |
92 |
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90 |
92 |
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dB |
f = 200 kHz |
88 |
91 |
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88 |
91 |
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dB |
Peak Distortion |
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f = 5 kHz |
–90 |
–107 |
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–90 |
–107 |
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dB |
f = 100 kHz |
–88 |
–95 |
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–88 |
–95 |
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dB |
f = 200 kHz |
–82 |
–88 |
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–82 |
–88 |
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dB |
Total Harmonic Distortion6 |
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f = 5 kHz |
–90 |
–105 |
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–90 |
–105 |
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dB |
f = 100 kHz |
–88 |
–95 |
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–88 |
–95 |
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dB |
f = 200 kHz |
–82 |
–88 |
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–82 |
–88 |
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dB |
DYNAMIC CHARACTERISTICS2 |
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±10 V FSR, VIN = –0.4 dB, TMIN to TMAX |
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Sample Rate |
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500 |
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500 |
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kHz |
Signal-to-Noise Ratio5 |
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f = 5 kHz |
90 |
95 |
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90 |
95 |
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dB |
f = 100 kHz |
90 |
94 |
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90 |
94 |
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dB |
f = 200 kHz |
88 |
93 |
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88 |
93 |
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dB |
Peak Distortion |
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f = 5 kHz |
–90 |
–108 |
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–90 |
–108 |
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dB |
f = 100 kHz |
–80 |
–87 |
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–80 |
–87 |
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dB |
f = 200 kHz |
–74 |
–82 |
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–74 |
–82 |
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dB |
Total Harmonic Distortion6 |
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f = 5 kHz |
–90 |
–105 |
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–90 |
–105 |
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dB |
f = 100 kHz |
–80 |
–87 |
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–80 |
–87 |
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dB |
f = 200 kHz |
–74 |
–82 |
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–74 |
–82 |
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dB |
DIGITAL INPUTS |
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Input Voltage |
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VIL |
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0.8 |
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0.8 |
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V |
VIH |
2.25 |
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±200 |
2.25 |
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±200 |
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V |
Input Current |
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μA |
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Input Capacitance |
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2 |
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2 |
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pF |
Clock |
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Frequency |
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2.5–10 |
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2.5–10 |
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MHz |
Duty Cycle |
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40-60 |
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40-60 |
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% |
Aperture Delay7 |
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7 |
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7 |
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ns |
DIGITAL OUTPUTS |
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Output Voltage |
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VOL @ IOL = 3.2 mA |
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0.2 |
0.4 |
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0.2 |
0.4 |
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V |
VOH @ IOH = –3.2 mA |
2.4 |
4.5 |
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2.4 |
4.5 |
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V |
Output Capacitance |
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4 |
±200 |
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4 |
±200 |
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pF |
Leakage, Outputs Disabled |
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μA |
–2– |
REV. 0 |
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AD1385 |
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AD1385KD |
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AD1385TD |
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Parameter |
Min |
Typ |
Max |
Min |
Typ |
Max |
Units |
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OUTPUT CODING |
Complementary Offset Binary or Complementary Twos Complement |
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INTERNAL REFERENCE |
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Voltage |
9.990 |
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10.010 |
9.990 |
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10.010 |
V |
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Current |
2 |
5 |
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2 |
5 |
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mA |
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Drift |
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5 |
15 |
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5 |
15 |
ppm/°C |
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TEMPERATURE RANGE, CASE |
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°C |
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Specified |
0 |
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+70 |
–55 |
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+125 |
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Storage |
–65 |
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+150 |
–65 |
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+150 |
°C |
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POWER REQUIREMENTS |
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Specified Operating Range |
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±VS |
14.25 |
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15.75 |
14.25 |
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15.75 |
V |
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+VDD |
4.75 |
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5.25 |
4.75 |
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5.25 |
V |
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–VSS |
–5.25 |
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–4.75 |
–5.25 |
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–4.75 |
V |
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Current Drains |
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+VS |
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52 |
80 |
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52 |
80 |
mA |
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–VS |
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48 |
75 |
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48 |
75 |
mA |
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+VDD |
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104 |
160 |
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104 |
160 |
mA |
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–VSS |
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148 |
200 |
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148 |
200 |
mA |
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Power Dissipation |
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2.76 |
4.125 |
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2.76 |
4.125 |
Watts |
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NOTES
1Integral linearity is inferred from FFTs. Differential linearity is derived from histograms.
2Performance over temperature is specified at the temperature at which the last calibration was performed. 3FSR = Full-Scale Range.
4Adjustable to zero.
5SNR excludes harmonics 2-9 of the fundamental. 6THD includes harmonics 2-9 of the fundamental.
7Aperture delay is the time from the rising edge on the Hold Command Input to the opening of the switch in the Track/Hold.
Specifications subject to change without notice.
TIMING SPECIFICATIONS1, 2 |
(TA = –558C to +1258C, VS = 615 V, VDD = +5 V, VSS = –5 V) |
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Parameter |
Design Minimum |
Typ |
Unit |
Description |
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START COMMAND |
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tSCS |
10 |
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ns |
Setup Time |
tSCH |
10 |
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ns |
Hold Time |
AUTOZERO |
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tAZS |
10 |
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ns |
Setup Time |
tAZH |
20 |
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ns |
Hold Time |
DATA VALID |
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CP3 |
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tDVS |
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1.5 |
Setup Time |
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tDVH |
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0.5 |
CP3 |
Hold Time |
HOLD COMMAND |
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CP3 |
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tH |
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13 |
Hold Time |
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tD |
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7 |
ns |
Delay Time |
DATA STROBE |
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CP3 |
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tDS |
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2 |
Pulse Width |
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tDSD |
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16.5 |
CP3 |
Delay |
CALIBRATE PULSE WIDTH |
20 |
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ns |
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CALIBRATION STATUS |
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15 |
ms |
Duration |
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NOTES
1Refer to Figures 17, 18 and 24.
2Design minimums are derived from worst case design analysis and/or simulation results. Typical values are based on characterization data. These specifications are not guaranteed or tested.
3The time duration for this parameter varies in direct proportion to the width of the Clock Pulse (CP).
REV. 0 |
–3– |
AD1385
ABSOLUTE MAXIMUM RATINGS*
+VS to AGND . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . . . 18 V |
–VS to AGND . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . . –18 V |
VDD to PGND . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . . . . 7 V |
VSS to PGND . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . . . –7 V |
AGND to PGND . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . ±0.3 V |
Analog Inputs . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . . . . . . .±VS |
Reference Input . . . . . . . . . . . . . . . . |
. . . . . . . . . .0 V to +11 V |
Digital Inputs . . . . . . . . . . . . . . . . . . |
. . –0.3 V to VDD + 0.3 V |
Output Short Circuit Duration |
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Reference Output . . . . . . . . . . . . . |
. . . . . . . . . . . . Indefinite |
Track/Hold Output . . . . . . . . . . . |
. . . . . . . . . . . . . . . . 1 sec |
Digital Outputs . . . . . . . . . . . . . . |
1 sec for Any One Output |
Case Temperature (Operating) . . . . |
. . . . . . –55°C to +125°C |
Storage Temperature . . . . . . . . . . . . |
. . . . . . –65°C to +150°C |
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ORDERING GUIDE
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Temperature |
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Model |
Range (Case) |
Package Option* |
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AD1385KD |
0°C to +70°C |
DH-48A |
AD1385TD |
–55°C to +125°C |
DH-48A |
AD1385TD/883B |
–55°C to +125°C |
DH-48A |
*DH-48A = Bottom Brazed Ceramic DIP.
AD1385 PIN CONNECTIONS
The AD1385 is housed in a 48-pin bottom-brazed ceramic bathtub package. The pinout is as follows:
Pin |
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Function |
Pin |
Function |
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1 |
CLOCK IN |
48 |
VDD2 (+5 V POWER) |
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2 |
POWER GROUND |
47 |
POWER GROUND |
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3 |
B1/B9 (MSB) |
46 |
VSS2 (–5 V POWER) |
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4 |
B2/B10 |
45 |
AUTOZERO |
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5 |
B3/B11 |
44 |
B1 SELECT |
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6 |
B4/B12 |
43 |
POWER GROUND |
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7 |
B5/B13 |
42 |
POWER GROUND |
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8 |
B6/B14 |
41 |
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CAL |
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9 |
B7/B15 |
40 |
GAIN ADJUST |
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10 |
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B8/B16 (LSB) |
39 |
+10 V REFERENCE OUT |
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11 |
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VDD1 (+5 V SIGNAL) |
38 |
–VS1 (–15 V) |
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12 |
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POWER GROUND |
37 |
SIGNAL GROUND |
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13 |
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VSS1 (–5 V SIGNAL) |
36 |
+VS1 (+15 V) |
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14 |
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SIGNAL GROUND |
35 |
SIGNAL GROUND |
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15 |
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DATA STROBE |
34 |
DNC |
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16 |
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HI/LO BYTE SELECT |
33 |
DNC |
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17 |
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DATA ENABLE |
32 |
+10 V REFERENCE IN |
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OE |
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18 |
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START CONVERT |
31 |
VIN B |
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19 |
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HOLD COMMAND OUT |
30 |
VIN A |
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20 |
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SIGNAL GROUND |
29 |
OFFSET ADJUST |
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21 |
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+VS2 (+15 V) |
28 |
CAL STATUS |
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22 |
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HOLD COMMAND IN |
27 |
TRACK/HOLD OUTPUT |
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23 |
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–VS2 (–15 V) |
26 |
SIGNAL GROUND |
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24 |
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POWER GROUND |
25 |
TRACK/HOLD INPUT |
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DNC = DO NOT CONNECT.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD1385 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4– |
REV. 0 |
AD1385
Figure 1. Spurious-Free Range vs. Input Amplitude,
±5 V Range, 2048-Point FFT, 500 kHz Sample Rate
Figure 2. Spurious-Free Range vs. Input Amplitude,
±10 V Range, 2048-Point FFT, 500 kHz Sample Rate
Figure 3. Full-Scale Sine Wave Power Spectral Density,
±5 V Range, 16384-Point FFT, 500 kHz Sample Rate
Figure 4. Full-Scale Sine Wave Power Spectral Density,
±5 V Range, 16384-Point FFT, 500 kHz Sample Rate
Figure 5. Full-Scale Sine Wave Power Spectral Density,
±5 V Range, 16384-Point FFT, 500 kHz Sample Rate
Figure 6. 100 kHz Intermodulation Performance, ±5 V Range, 16384-Point FFT, 500 kHz Sample Rate
REV. 0 |
–5– |
AD1385
Figure 7. 200 kHz Intermodulation Performance, ±5 V Range, 16384-Point FFT, 500 kHz Sample Rate
Figure 8. Full-Scale Sine Wave Power Spectral Density,
±10 V Range, 16384-Point FFT, 500 kHz Sample Rate
Figure 9. Full-Scale Sine Wave Power Spectral Density,
±10 V Range, 16384-Point FFT, 500 kHz Sample Rate
Figure 10. Full-Scale Sine Wave Power Spectral Density,
±10 V Range, 16384-Point FFT, 500 kHz Sample Rate
Figure 11. 100 kHz Intermodulation Performance, ±10 V Range, 16384-Point FFT, 500 kHz Sample Rate
Figure 12. 200 kHz Intermodulation Performance, ±10 V Range, 16384-Point FFT, 500 kHz Sample Rate
–6– |
REV. 0 |