Texas Instruments BQ2050HSN-A508, BQ2050HSN-A308TR, BQ2050HSN-A308, BQ2050HSN-A304TR, BQ2050HSN-A508TR Datasheet

bq2050H

Low-Cost Lithium Ion Power Gauge™ IC

Features

Accurate measurement of available capacity in Lithium Ion batteries

Provides a low-cost battery management solution for pack integration

-Complete circuit can fit in as little as 12 square inch of PCB

-Low operating current (120 A typical)

-Less than 100nA of data retention current

High-speed (5kb) single-wire communication interface (HDQ bus) for critical battery parameters

Monitors and controls charge FET in Li-Ion pack protection circuit

Direct drive of remaining capacity LEDs

Measurements automatically compensated for rate and temperature

16-pin narrow SOIC

Pin Connections

LCOM	1	16		VCC
SEG1/PROG1	2	15		REF
SEG2/PROG2	3	14		PSTAT
SEG3/PROG3	4	13		HDQ
SEG4/PROG4	5	12		RBI
SEG5/PROG5	6	11		SB
CFC	7	10
				DISP
VSS	8	9		SR

16-Pin Narrow SOIC

PN2050H1.eps

General Description

The bq2050H Lithium Ion Power Gauge™ IC is intended for batterypack or in-system installation to maintain an accurate record of available battery capacity. The IC monitors a voltage drop across a sense resistor connected in series between the negative battery terminal and ground to determine charge and discharge activity of the battery. Compensations for battery temperature, self discharge, and rate of discharge are applied to the charge counter to provide available capacity information across a wide range of operating conditions. Battery capacity is automatically recalibrated, or “learned,” in the course of a discharge cycle from full to empty.

Nominal available capacity may be directly indicated using a fivesegment LED display. These seg-

ments are used to graphically indicate available capacity. The bq2050H also supports a simple single-line bidirectional serial link to an external processor (common ground). The 5kb HDQ bus interface reduces communications overhead in the external microcontroller.

Internal registers include available capacity, temperature, scaled available energy, battery ID, battery status, and Li-Ion charge FET status. The external processor may also overwrite some of the bq2050H power gauge data registers.

The bq2050H can operate from the batteries in the pack. The REF output and an external transistor allow a simple, inexpensive voltage regulator to supply power to the circuit from the cells.

Pin Names

LCOM	LED common output	VSS		System ground
SEG1/PROG1	LED segment 1/	SR		Sense resistor input
	program 1 input
		DISP		Display control input
SEG2/PROG2	LED segment 2/
	program 2 input	SB		Battery sense input
SEG3/PROG3	LED segment 3/	RBI		Register backup input
	program 3 input
		HDQ		Serial communications
SEG4/PROG4	LED segment 4/			input/output
	program 4 input
		PSTAT		Protector status input
SEG5/PROG5	LED segment 5/
	program 5 input	REF		Voltage reference output
CFC	Charge FET control	VCC		Supply voltage
	output

SLUS150–MAY 1999 D

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bq2050H

Pin Descriptions

LCOM	LED common output
	This open-drain output switches VCC to
	source current for the LEDs. The switch is
	off during initialization to allow reading of
	the soft pull-up or pull-down program resis-
	tors. LCOM is also high impedance when the
	display is off.
SEG1–	LED display segment outputs (dual func-
SEG5	tion with PROG1–PROG5)
	Each output may activate an LED to sink
	the current sourced from LCOM.

PROG1– Programmed full count selection inputs PROG2 (dual function with SEG1–SEG2)

These three-level input pins define the programmed full count (PFC) thresholds described in Table 2.

PROG3– Power gauge scale selection inputs (dual

PROG4	function with SEG3–SEG4)
	These three-level input pins define the scale
	factor described in Table 2.
PROG5	Self-discharge rate selection (dual func-
	tion with SEG5)
	This three-level input pin defines the
	self-discharge and battery compensation fac-
	tors as shown in Table 1.
CFC	Charge FET control output
	This pin can be used as an additional control
	to the charge FET of the Li-Ion pack protec-
	tion circuitry.
VSS	Ground
SR	Sense resistor input
	The voltage drop (VSR) across the sense re-
	sistor RS is monitored and integrated over
	time to interpret charge and discharge activ-
	ity. The SR input is tied between the nega-
	tive terminal of the battery and the sense re-
	sistor. VSR < VSS indicates discharge, and
	VSR > VSS indicates charge. The effective
	voltage drop, VSRO, as seen by the bq2050H
	is VSR + VOS .

DISP		Display control input
			high disables the LED display.
		DISP				DISP
		tied to VCC allows PROGX to connect di-
		rectly to VCC or VSS instead of through a
		pull-up or pull-down resistor.		DISP	floating
		allows the LED display to be active during
		charge. DISP low activates the display. See
		Table 1.

SB	Secondary battery input
	This input monitors the battery cell voltage
	potential through a high-impedance resis-
	tive divider network for end-of-discharge
	voltage (EDV) thresholds and battery-removed
	detection.

RBI	Register backup input
	This pin is used to provide backup potential to
	the bq2050H registers during periods when
	VCC ≤ 3V. A storage capacitor or a battery
	can be connected to RBI.
HDQ	Serial communication input/output
	This is the open-drain bidirectional commu-
	nications port.
PSTAT	Protector status input
	This input provides overvoltage status from
	the Li-Ion protector circuit. It should con-
	nect to VSS when not used.
REF	Voltage reference output for regulator
	REF provides a voltage reference output for
	an optional micro-regulator.
VCC	Supply voltage input

2

bq2050H

Functional Description

General Operation

capacity. The scaled available energy measurement is corrected for environmental and operating conditions.

		Figure 1 shows a typical battery pack application of the
	The bq2050H determines battery capacity by moni-	bq2050H using the LED display capability as a charge-
	toring the amount of current input to or removed	state indicator. The bq2050H is configured to display
	from a rechargeable battery. The bq2050H meas-	capacity in relative display mode. The relative display
	ures discharge and charge currents, measures bat-	mode uses the last measured discharge capacity of the
	tery voltage, estimates self-discharge, monitors the	battery as the battery “full” reference. A push-button
	battery for low battery-voltage thresholds, and com-	display feature is available for momentarily enabling
	pensates for temperature and discharge rate. Cur-	the LED display.
	rent measurement is measured by monitoring the	The bq2050H monitors the charge and discharge cur-
	voltage across a small-value series sense resistor be-
		rents as a voltage across a sense resistor. (See RS in Fig-
	tween the negative battery terminal and ground.
		ure 1.) A filter between the negative battery terminal
	Scaled available energy is estimated using the re-
		and the SR pin is required.
	maining average battery voltage during the dis-
	charge cycle and the remaining nominal available

			R1
	bq2050H		Q1
	Power Gauge IC
			ZVNL110A
		REF
		C1
	LCOM	VCC	RB1
	SEG1/PROG1	SB
	SEG2/PROG2	VCC	C2
			RB
			2
	SEG3/PROG3	DISP
	SEG4/PROG4	100K
		SR
	SEG5/PROG5	0.1 F	R
			S
	CFC	VSS
		RBI	See note 4
	PSTAT	HDQ
Notes:			Charger
1.	Indicates optional.

2. Programming resistors and ESD-protection diodes are not shown.	Load

3.RC on SR is required.

4.A series diode is required on RBI if the bottom series cell is used as the backup source. If the cell is used, the backup capacitor is not required, and the anode is connected to the positive terminal of the cell.

FG2050H1.eps

Figure 1. Battery Pack Application Diagram—LED Display

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bq2050H

Voltage Thresholds

In conjunction with monitoring VSR for charge/discharge currents, the bq2050H monitors the battery potential through the SB pin. The voltage is determined through a resistor-divider network per the following equation:

RB1 = 4N − 1

RB2

where N is the number of cells, RB1 is connected to the positive battery terminal, and RB2 is connected to the negative battery terminal. The single-cell battery voltage is monitored for the end-of-discharge voltage (EDV) thresholds. The EDV threshold levels are used to determine when the battery has reached an “empty” state.

The EDV thresholds for the bq2050H are programmable with the default values fixed at:

EDV1 (first) = 0.76V

EDVF (final) = EDV1-0.025V = 0.735V

If VSB is below either of the two EDV thresholds, the associated flag is latched and remains latched, independent of VSB, until the next valid charge. The VSB value is also available over the serial port.

During discharge and charge, the bq2050H monitors VSR for various thresholds used to compensate the charge counter. EDV monitoring is disabled if the discharge rate is greater than 2C (OVLD Flag = 1) and resumes 12 second after the rate falls below 2C.

TMP (hex)	Temperature Range
0x	< -30°C
1x	-30°C to -20°C
2x	-20°C to -10°C
3x	-10°C to 0°C
4x	0°C to 10°C
5x	10°C to 20°C
6x	20°C to 30°C
7x	30°C to 40°C
8x	40°C to 50°C
9x	50°C to 60°C
Ax	60°C to 70°C
Bx	70°C to 80°C
Cx	> 80°C

RBI Input

The RBI input pin is intended to be used with a storage capacitor or external supply to provide backup potential to the internal bq2050H registers when VCC drops below 3.0V. VCC is output on RBI when VCC is above 3.0V. If using an external supply (such as the bottom series cell) as the backup source, an external diode is required for isolation.

Reset

The bq2050H can be reset by removing VCC and grounding the RBI pin for 15 seconds or by commands over the serial port. The serial port reset command sequence requires writing 00h to register PPFC (address = 1Eh) and then writing 00h to register LMD (address = 05h).

Temperature

The bq2050H internally determines the temperature in 10°C steps centered from approximately -35°C to +85°C. The temperature steps are used to adapt charge and discharge rate compensations, self-discharge counting, and available charge display translation. The temperature range is available over the serial port in 10°C increments as shown in the following table:

Layout Considerations

The bq2050H measures the voltage differential between the SR and VSS pins. VOS (the offset voltage at the SR pin) is greatly affected by PC board layout. For optimal results, the PC board layout should follow the strict rule of a single-point ground return. Sharing high-current ground with small signal ground causes undesirable noise on the small signal nodes. Additionally:

■The capacitors (C1 and C2) should be placed as close as possible to the VCC and SB pins, respectively, and their paths to VSS should be as

short as possible. A high-quality ceramic capacitor of 0.1µF is recommended for VCC.

■The sense-resistor capacitor should be placed as close as possible to the SR pin.

■The sense resistor (RS) should be as close as possible to the bq2050H.

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bq2050H

Gas Gauge Operation

The operational overview diagram in Figure 2 illustrates the operation of the bq2050H. The bq2050H accumulates a measure of charge and discharge currents, as well as an estimation of self-discharge. The accumulated charge and discharge currents are adjusted for temperature and rate to provide the indication of compensated available capacity to the host system or user.

The main counter, Nominal Available Capacity (NAC), represents the available battery capacity at any given time. Battery charging increments the NAC register, while battery discharging and self-discharge decrement the NAC register and increment the DCR (Discharge Count Register).

The Discharge Count Register is used to update the Last Measured Discharge (LMD) register only if a complete battery discharge from full to empty occurs without any partial battery charges. Therefore, the bq2050H adapts its capacity determination based on the actual conditions of discharge.

The battery's initial capacity equals the Programmed Full Count (PFC) shown in Table 2. Until LMD is updated, NAC counts up to but not beyond this threshold during subsequent charges. This approach allows the gas gauge to be charger-independent and compatible with any type of charge regime.

1.Last Measured Discharge (LMD) or learned battery capacity:

LMD is the last measured discharge capacity of the battery. On initialization (application of VCC or battery replacement), LMD = PFC. During subsequent discharges, the LMD is updated with the latest measured capacity in the Discharge Count Register representing a discharge from full to below EDV1. A qualified discharge is necessary for a capacity transfer from the DCR to the LMD register. The LMD also serves as the 100% reference threshold used by the relative display mode.

Inputs

Charge

Discharge

Self-Discharge

Current

Current

Timer

Rate and

Temperature

Temperature

Temperature

Compensation

Compensation

Compensation

- -

+

+

+

Nominal

Last

Discharge

Main Counters

Available

< Measured

Count

and Capacity

Charge

Discharged

Qualified

Register

Reference (LMD)

(NAC)

(LMD)

Transfer

(DCR)

Rate and

Temperature Step,

Temperature

Other Data

Compensation

Outputs

Compensated

Serial

Available Charge

Port

LED Display, etc.

FG2050H2.eps

Figure 2. Operational Overview

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bq2050H

2.Programmed Full Count (PFC) or initial battery capacity:

The initial LMD and gas gauge rate values are programmed by using PROG1–PROG4. The bq2050H is configured for a given application by selecting a PFC value from Table 2. The correct PFC may be determined by multiplying the rated battery capacity in mAh by the sense resistor value:

Battery capacity (mAh) * sense resistor (Ω) =

PFC (mVh)

Selecting a PFC slightly less than the rated capacity provides a conservative capacity reference until the bq2050H “learns” a new capacity reference.

Example: Selecting a PFC Value

Given:

Sense resistor = 0.05Ω Number of cells = 2

Capacity = 1000mAh, Li-Ion battery, coke-anode Current range = 50mA to 1A

Relative display mode Self-discharge = NAC512 per day @ 25°C

Voltage drop over sense resistor = 2.5mV to 50mV Nominal discharge voltage = 3.6V

Therefore:

1000mAh * 0.05Ω = 50mVh

Table 1. Self-Discharge and Capacity Compensation

Pin	PROG5 Compensation/Self-Discharge		DISP
Connection	(See Tables 3 and 4)	Display State
H	Coke anode/disabled	LEDs disabled
Z	Coke anode/ NAC512	LEDs on when charging
L	Graphite anode/ NAC512	LEDs on for 4 s

Table 2. bq2050H Programmed Full Count mVh, VSR Gain Selections

			Pro-
			grammed
PROGx			Full		PROG4 = L		PROG4 = Z or H
			Count	PROG3 = H	PROG3 = Z	PROG3 = L	PROG3 = H	PROG3 = Z	PROG3 = L
1		2	(PFC)							Units
-		-	-	SCALE =	SCALE =	SCALE =	SCALE =	SCALE =	SCALE =	mVh/
				1/80	1/160	1/320	1/640	1/1280	1/2560	count
H		H	49152	614	307	154	76.8	38.4	19.2	mVh
H		Z	45056	563	282	141	70.4	35.2	17.6	mVh
H		L	40960	512	256	128	64.0	32.0	16.0	mVh
Z		H	36864	461	230	115	57.6	28.8	14.4	mVh
Z		Z	33792	422	211	106	53.0	26.4	13.2	mVh
Z		L	30720	384	192	96.0	48.0	24.0	12.0	mVh
L		H	27648	346	173	86.4	43.2	21.6	10.8	mVh
L		Z	25600	320	160	80.0	40.0	20.0	10.0	mVh
L		L	22528	282	141	70.4	35.2	17.6	8.8	mVh
VSR equivalent to 2				90	45	22.5	11.25	5.6	2.8	mV
	counts/s (nom.)

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bq2050H

Select:

PFC = 30720 counts or 48mVh

PROG1 = float

PROG2 = low

PROG3 = high

PROG4 = float

PROG5 = float

The initial full battery capacity is 48mVh (960mAh) until the bq2050H “learns” a new capacity with a qualified discharge from full to EDV1.

3.Nominal Available Capacity (NAC):

NAC counts up during charge to a maximum value of LMD and down during discharge and self-dis- charge to 0. NAC is reset to 0 on initialization and on the first valid charge following discharge to EDV1. To prevent overstatement of charge during periods of overcharge, NAC stops incrementing when NAC = LMD.

4.Discharge Count Register (DCR):

The DCR counts up during discharge independent of NAC and could continue increasing after NAC has decremented to 0. Prior to NAC = 0 (empty battery), both discharge and self-discharge increment the DCR. After NAC = 0, only discharge increments the DCR. The DCR resets to 0 when NAC = LMD. The DCR does not roll over but stops counting when it reaches FFh.

The DCR value becomes the new LMD value on the first charge after a valid discharge to VEDV1 if all the following conditions are met:

■No valid charge initiations (charges greater than 2 NAC updates where VSRO > VSRQ) occurred during the period between NAC = LMD and EDV1.

■The self-discharge is less than 6% of NAC.

■The temperature is ≥ 0°C when the EDV1 level is reached during discharge.

■VDQ is set

The valid discharge flag (VDQ) indicates whether the present discharge is valid for LMD update. If the DCR update value is less than 0.94 LMD, LMD will only be modified by 0.94 LMD. This prevents invalid DCR values from corrupting LMD.

5.Scaled Available Energy (SAE):

SAE is useful in determining the available energy within the battery, and may provide a more useful capacity reference in battery chemistries with sloped voltage profiles during discharge. SAE may be converted to an mWh value using the following formula:

E(mWh) = (SAEH 256 + SAEL)

1.2 SCALE (RB1 + RB2)

RS RB2

where RB1, RB2, and RS are resistor values in ohms, as shown in Figure 1. SCALE is the selected scale from Table 2.

6.Compensated Available Capacity (CACT)

CACT counts similarly to NAC, but contains the available capacity compensated for discharge rate and temperature.

Charge Counting

Charge activity is detected based on a positive voltage on the SR input. If charge activity is detected, the bq2050H increments NAC at a rate proportional to VSR and, if enabled, activates an LED display.

The bq2050H counts charge activity when the voltage at the SR input (VSRO) exceeds the minimum charge threshold (VSRQ). A valid charge is detected when NAC has been updated twice without discharging or reaching the digital magnitude filter time-out. Once a valid charge is detected, charge counting continues until VSR, including offset, falls below VSRQ.

Discharge Counting

Discharge activity is detected based on a negative voltage on the SR input. All discharge counts where VSRO is less than the minimum discharge threshold (VSRD) cause the NAC register to decrement and the DCR to increment.

Self-Discharge Counting

The bq2050H continuously decrements NAC and increments DCR for self-discharge based on time and temperature.

Charge/Discharge Current

The bq2050H current-scale registers, VSRH and VSRL, can be used to determine the battery charge or discharge current. See the Current Scale Register description for details.

Count Compensations

Compensated Available Capacity

Compensated Available Capacity compensation is based on the rate of discharge, temperature, and negative electrode type. Tables 3A and 3B outline the correction factor typically used for graphite-anode Li-Ion batteries, and Tables 4A and 4B outline the factors typically used for coke-anode Li-Ion batteries. The compensation factor is applied to NAC to derive the CACD and CACT values.

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bq2050H

Table 3A. Graphite Anode

Approximate Discharge	Available Capacity
Rate	Reduction
< 0.5C	0
≥ 0.5C	0.05 LMD

Charge Compensation

The bq2050H also monitors temperature during charge. If the temperature is <0°C, NAC will only increment up

to 0.94 * LMD, inhibiting VDQ from being set. This keeps a “learn” cycle from occurring when the battery is

charged at very low temperatures. If the temperature rises above 0°C, NAC will be allowed to count up to NAC

= LMD.

Table 3B. Graphite Anode

	Available Capacity
Temperature	Reduction
≥ 10°C	0
0°C to 10°C	0.05 LMD
-20°C to 0°C	0.15 LMD
≤ -20°C	0.37 LMD

Table 4A. Coke Anode

Approximate Discharge	Available Capacity
Rate	Reduction
<0.5C	0
≥ 0.5C	0.10 LMD

Table 4B. Coke Anode

	Available Capacity
Temperature	Reduction
≥ 10°C	0
0°C to 10°C	0.10 LMD
-20°C to 0°C	0.30 LMD
≤ -20°C	0.60 LMD

The CACD value is the available charge compensated for the rate of discharge. At high discharge rates, CACD is reduced. The reduction is maintained until a valid charge is detected. The CACT value is the available charge compensated for the rate of discharge and temperature. The CACT value is used to drive the LED display.

Self-Discharge Compensation

The self-discharge compensation is programmed for a nominal rate of 1512 NAC per day. This is the rate that NAC is reduced for a battery within the 20–30°C temperature range. This rate varies across 8 ranges from <10°C to >70°C, as shown in Table 5.

Table 5. Self-Discharge Compensation

	Typical Rate
Temperature Range
	PROG5 = Z or L
< 10°C	2048
	NAC
10–20°C	1024
	NAC
20–30°C	512
	NAC
30–40°C	256
	NAC
40–50°C	128
	NAC
50–60°C	64
	NAC
60–70°C	32
	NAC
> 70°C	16
	NAC

Self-discharge may be disabled by connecting PROG5 = H.

Digital Magnitude Filter

The bq2050H has a digital filter to eliminate charge and discharge counting below a set threshold. The minimum

charge (VSRQ) and discharge (VSRD) threshold for the bq2050H is 250 V.

Pack Protection Supervision

The bq2050H can monitor the charge FET in a Li-Ion pack protector circuit as shown in Figure 3. If the battery voltage is too high or the temperature is out of the 0—60°C range, the bq2050H disables the charge FET with the CFC output, which turns off the charge to the pack.

The PSTAT input is used to monitor the protector state. If PSTAT is above 2.5V, bit 5 of FLGS1 is set to 1. If PSTAT is below 0.5V, bit 5 of FLGS1 is cleared to zero. Using this input, the system can monitor the state of the charge con-

8