Texas Instruments 74AC11245PWLE, 74AC11245NT, 74AC11245DWR, 74AC11245DW, 74AC11245DBR Datasheet
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74AC11245 |
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OCTAL BUS TRANSCEIVER |
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WITH 3-STATE OUTPUTS |
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SCAS010B ± JULY 1987 ± REVISED APRIL 1996 |
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D 3-State Outputs Drive Bus Lines Directly |
DB, DW, NT, OR PW PACKAGE |
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D Flow-Through Architecture Optimizes |
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(TOP VIEW) |
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PCB Layout |
A1 |
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1 |
24 |
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DIR |
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D Center-Pin VCC and GND Configurations |
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A2 |
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2 |
23 |
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B1 |
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Minimize High-Speed Switching Noise |
A3 |
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3 |
22 |
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B2 |
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D EPICt (Enhanced-Performance Implanted |
A4 |
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4 |
21 |
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B3 |
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CMOS) 1-mm Process |
GND |
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5 |
20 |
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B4 |
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D 500-mA Typical Latch-Up Immunity at |
GND |
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6 |
19 |
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VCC |
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7 |
18 |
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125°C |
GND |
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VCC |
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8 |
17 |
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D Package Options Include Plastic |
GND |
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B5 |
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A5 |
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9 |
16 |
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B6 |
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Small-Outline (DW), Shrink Small-Outline |
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A6 |
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10 |
15 |
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B7 |
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(DB), and Thin Shrink Small-Outline (PW) |
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A7 |
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11 |
14 |
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B8 |
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Packages, and Standard Plastic 300-mil |
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A8 |
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12 |
13 |
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DIPs (NT) |
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OE |
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description
This octal bus transceiver is designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.
The device allows noninverted data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.
The 74AC11245 is characterized for operation from ±40°C to 85°C.
FUNCTION TABLE
OUTPUT |
DIRECTION |
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ENABLE |
CONTROL |
OPERATION |
OE |
DIR |
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L |
L |
B data to A bus |
L |
H |
A data to B bus |
H |
X |
Isolation |
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1996, Texas Instruments Incorporated
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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74AC11245
OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SCAS010B ± JULY 1987 ± REVISED APRIL 1996
logic symbol²
OE |
13 |
G3 |
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DIR |
24 |
3 EN1 [BA] |
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3 EN2 [AB] |
A1 |
1 |
23 |
1 |
B1 |
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2 |
2 |
A2 |
22 |
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3 |
B2 |
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A3 |
21 |
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4 |
B3 |
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A4 |
20 |
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9 |
B4 |
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A5 |
17 |
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10 |
B5 |
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A6 |
16 |
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11 |
B6 |
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A7 |
15 |
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12 |
B7 |
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A8 |
14 |
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B8 |
² This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
24
DIR
13 OE
1
A1
23 B1
2
A2
22 B2
3
A3
21 B3
4
A4
20 B4
9
A5
17 B5
10
A6
16 B6
11
A7
15 B7
12
A8
14 B8
2 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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