74ACT11257 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS
SCAS053B ± JANUARY 1989 ± REVISED APRIL 1996
DInputs Are TTL-Voltage Compatible
D3-State Outputs Interface Directly With System Bus
DFlow-Through Architecture Optimizes PCB Layout
DCenter-Pin VCC and GND Configurations Minimize High-Speed Switching Noise
DEPICt (Enhanced-Performance Implanted CMOS) 1-mm Process
D500-mA Typical Latch-Up Immunity at
125°C
DProvides Bus Interface From Multiple Sources in High-Performance Systems
DPackage Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-mil DIPs (N)
description
DB, DW, OR N PACKAGE
(TOP VIEW)
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A/B |
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1 |
20 |
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1A |
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1Y |
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2 |
19 |
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1B |
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2Y |
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3 |
18 |
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2A |
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GND |
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4 |
17 |
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2B |
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GND |
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5 |
16 |
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VCC |
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GND |
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6 |
15 |
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VCC |
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GND |
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7 |
14 |
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3A |
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3Y |
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8 |
13 |
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3B |
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4Y |
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12 |
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4A |
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4B |
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OE |
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10 |
11 |
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The 74ACT11257 is designed to multiplex signals from 4-bit data sources to four output data lines in bus-organized systems. The 3-state outputs do not load the data lines when the output-enable (OE) input is at a high logic level.
The 74ACT11257 is characterized for operation from ±40°C to 85°C.
FUNCTION TABLE
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INPUTS |
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OUTPUT |
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SELECT |
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DATA |
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Y |
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OE |
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A/B |
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A |
B |
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H |
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X |
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X |
X |
Z |
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L |
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L |
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L |
X |
L |
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L |
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L |
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H |
X |
H |
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L |
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H |
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X |
L |
L |
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L |
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H |
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X |
H |
H |
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1996, Texas Instruments Incorporated
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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74ACT11257
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER WITH 3-STATE OUTPUTS
SCAS053B ± JANUARY 1989 ± REVISED APRIL 1996
logic symbol²
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10 |
EN |
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OE |
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1 |
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A |
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G1 |
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20 |
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MUX |
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1A |
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1 |
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2 |
1Y |
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19 |
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1B |
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1 |
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18 |
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2A |
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3 |
2Y |
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17 |
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2B |
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14 |
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3A |
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8 |
3Y |
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13 |
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3B |
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12 |
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4A |
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9 |
4Y |
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11 |
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4B |
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² This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
OE |
10 |
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A / B |
1 |
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1A |
20 |
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2 |
1Y |
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1B |
19 |
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2A |
18 |
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3 |
2Y |
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2B |
17 |
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3A |
14 |
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8 |
3Y |
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3B |
13 |
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4A |
12 |
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9 |
4Y |
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4B |
11 |
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2 |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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