Texas Instruments AM26C32QD, AM26C32MWB, AM26C32MJB, AM26C32MFKB, AM26C32IN Datasheet
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AM26C32C, AM26C32I, AM26C32M |
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QUADRUPLE DIFFERENTIAL LINE RECEIVERS |
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SLLS104F ± DECEMBER 1990 ± REVISED APRIL 1998 |
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D Meet or Exceed the Requirements of ANSI |
AM26C32C, AM26C32I . . . D OR N PACKAGE |
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EIA/TIA-422-B, EIA/TIA-423-B, and ITU |
AM26C32M . . . J OR W PACKAGE |
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Recommendation V.10 and V.11 |
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(TOP VIEW) |
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D Low Power, ICC = 10 mA Typ |
1B |
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1 |
16 |
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VCC |
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D ± 7-V Common-Mode Range With ± 200-mV |
1A |
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2 |
15 |
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4B |
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Sensitivity |
1Y |
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3 |
14 |
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4A |
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D Input Hysteresis . . . 60 mV Typ |
G |
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4 |
13 |
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4Y |
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D tpd = 17 ns Typ |
2Y |
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5 |
12 |
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G |
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2A |
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6 |
11 |
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3Y |
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D Operate From a Single 5-V Supply |
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2B |
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7 |
10 |
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3A |
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D 3-State Outputs |
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GND |
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8 |
9 |
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3B |
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DInput Fail-Safe Circuitry
DImproved Replacements for AM26LS32
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FK PACKAGE |
description |
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The AM26C32C, AM26C32I, and AM26C32M are quadruple differential line receivers for balanced or unbalanced digital data transmission. The enable function is common to all four receivers and offers a choice of active-high or active-low input. The 3-state outputs permit connection directly to a bus-organized system. Fail-safe design specifies that if the inputs are open, the outputs are always high.
The AM26C32 is manufactured using a BiCMOS process, which is a combination of bipolar and CMOS transistors. This process provides the high voltage and current of bipolar with the low power of CMOS to reduce the power consumption to about one-fifth that of the standard AM26LS32 while maintaining ac and dc performance.
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1A |
1B |
NC |
CC |
4B |
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V |
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1Y |
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2 |
1 |
20 19 |
4A |
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4 |
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18 |
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G |
5 |
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17 |
4Y |
NC |
6 |
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16 |
NC |
2Y |
7 |
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15 |
G |
2A |
8 |
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14 |
3Y |
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9 |
10 11 12 13 |
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2B |
GND |
NC |
3B |
3A |
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NC ± No internal connection
The AM26C32C is characterized for operation from 0°C to 70°C. The AM26C32I is characterized for operation from ±40°C to 85°C. The AM26C32M is characterized for operation from ±55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1998, Texas Instruments Incorporated
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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AM26C32C, AM26C32I, AM26C32M QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS104F ± DECEMBER 1990 ± REVISED APRIL 1998
FUNCTION TABLE (each receiver)
DIFFERENTIAL |
ENABLES |
OUTPUT |
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INPUT |
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G |
G |
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VID ≥ VIT+ |
H |
X |
H |
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X |
L |
H |
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VIT± < VID < VIT+ |
H |
X |
? |
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X |
L |
? |
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VID ≤ VIT± |
H |
X |
L |
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X |
L |
L |
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X |
L |
H |
Z |
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H = high level, L = low level, X = irrelevant
Z = high impedance (off), ? = indeterminate
logic symbol²
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G |
4 |
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≥ 1 |
EN |
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12 |
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G |
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2 |
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1A |
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3 |
1Y |
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1B |
1 |
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2A |
6 |
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5 |
2Y |
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2B |
7 |
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3A |
10 |
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11 |
3Y |
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3B |
9 |
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4A |
14 |
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13 |
4Y |
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4B |
15 |
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² This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, N, and W packages.
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POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
AM26C32C, AM26C32I, AM26C32M
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS104F ± DECEMBER 1990 ± REVISED APRIL 1998
logic diagram (positive logic)
G |
4 |
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G |
12 |
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1A |
2 |
3 |
1Y |
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1 |
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1B |
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2A |
6 |
5 |
2Y |
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7 |
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2B |
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3A |
10 |
11 |
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9 |
3Y |
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3B |
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4A 14
13 4Y
4B 15
Pin numbers shown are for the D, J, N, and W packages.
schematics
EQUIVALENT OF A OR B INPUT
VCC
17 kΩ |
1.7 kΩ |
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NOM |
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NOM |
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Input |
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288 kΩ |
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NOM |
1.7 kΩ |
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VCC(A) |
NOM |
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or |
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GND(B) |
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GND |
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EQUIVALENT OF G OR G INPUT
VCC
Input
GND
TYPICAL OF ALL OUTPUTS
VCC |
Output |
GND |
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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