74AC11032 QUADRUPLE 2-INPUT POSITIVE-OR GATE
SCAS007C ± JULY 1987 ± REVISED APRIL 1996
D Center-Pin VCC and GND Configurations |
D, DB, OR N PACKAGE |
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Minimize High-Speed Switching Noise |
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(TOP VIEW) |
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D EPIC (Enhanced-Performance Implanted |
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CMOS) 1- m Process |
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D 500-mA Typical Latch-Up Immunity at |
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2Y |
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125°C |
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GND |
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VCC |
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D Package Options Include Plastic |
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GND |
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VCC |
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Small-Outline (D) and Shrink Small-Outline |
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(DB) Packages, and Standard Plastic |
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300-mil DIPs (N) |
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description |
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This device contains four independent 2-input OR |
gates. It performs |
the Boolean function |
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Y + A )B or Y + |
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in positive logic. |
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The 74AC11032 is characterized for operation from ±40°C to 85°C.
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FUNCTION TABLE |
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(each gate) |
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INPUTS |
OUTPUT |
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A |
B |
Y |
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H |
X |
H |
X |
H |
H |
L |
L |
L |
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logic symbol²
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1A |
≥ 1 |
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2 |
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16 |
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1Y |
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1B |
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14 |
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2Y |
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2B |
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11 |
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3A |
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3Y |
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3B |
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9 |
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4A |
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7 |
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4Y |
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4B |
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² This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. |
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright 1996, Texas Instruments Incorporated
POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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74AC11032
QUADRUPLE 2-INPUT POSITIVE-OR GATE
SCAS007C ± JULY 1987 ± REVISED APRIL 1996
logic diagram (positive logic)
1A |
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1B |
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2A |
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2Y |
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2B |
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4A |
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4Y |
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4B |
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absolute maximum ratings over operating free-air temperature range (unless otherwise noted)²
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . ±0.5 V to 7 |
V |
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
±0.5 V to VCC + 0.5 |
V |
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
±0.5 V to VCC + 0.5 |
V |
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . ±20 mA |
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Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . ±50 mA |
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Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . . ±50 mA |
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Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . . . . . . . ±100 mA |
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Maximum power dissipation at TA = 55°C (in still air) (see Note 2): D package . . . . . . . |
. . . . . . . . . . . . . 1.3 W |
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DB package . . . . . . |
. . . . . . . . . . . . 0.55 W |
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N package . . . . . . . |
. . . . . . . . . . . . . 1.1 W |
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Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. . . . ±65°C to 150°C |
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² Stresses beyond those listed under ªabsolute maximum ratingsº may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2.The maximum package power dissipation is calculated using a junction temperature of 150_C and a board trace length of 750 mils, except for the N package, which has a trace length of zero.
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POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
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