MJD44H11 (NPN)
MJD45H11 (PNP)
Preferred Device
Complementary Power
Transistors
DPAK For Surface Mount Applications
Designed for general purpose power and switching such as output or driver stages in applications such as switching regulators, converters, and power amplifiers.
Features
• Lead Formed for Surface Mount Application in Plastic Sleeves (No Suffix)
• Straight Lead Version in Plastic Sleeves (“-1” Suffix)
• Electrically Similar to Popular D44H/D45H Series
• Low Collector Emitter Saturation Voltage - VCE(sat) = 1.0 Volt Max @ 8.0 Amperes
• Fast Switching Speeds
• Complementary Pairs Simplifies Designs
• Epoxy Meets UL 94 V-0 @ 0.125 in
• ESD Ratings: Human Body Model, 3B u 8000 V Machine Model, C u 400 V
• Pb-Free Packages are Available
MAXIMUM RATINGS
Rating |
Symbol |
Max |
Unit |
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Collector-Emitter Voltage |
VCEO |
80 |
Vdc |
Emitter-Base Voltage |
VEB |
5 |
Vdc |
Collector Current - Continuous |
IC |
8 |
Adc |
- Peak |
|
16 |
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Total Power Dissipation |
PD |
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W |
@ TC = 25°C |
|
20 |
W/°C |
Derate above 25°C |
|
0.16 |
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Total Power Dissipation (Note 1) |
PD |
1.75 |
W |
@ TA = 25°C |
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W/°C |
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° |
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0.014 |
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Derate above 25 C |
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Operating and Storage Junction |
TJ, Tstg |
-55 to +150 |
°C |
Temperature Range |
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THERMAL CHARACTERISTICS |
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Characteristic |
Symbol |
Max |
Unit |
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Thermal Resistance, Junction-to-Case |
RqJC |
6.25 |
°C/W |
Thermal Resistance, Junction-to-Ambient |
RqJA |
71.4 |
°C/W |
(Note 1) |
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Lead Temperature for Soldering |
TL |
260 |
°C |
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1.These ratings are applicable when surface mounted on the minimum pad sizes recommended.
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SILICON
POWER TRANSISTORS
8 AMPERES
80 VOLTS, 20 WATTS
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MARKING |
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DIAGRAMS |
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4 |
YWW |
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J4 |
1 2 |
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xH11G |
3 |
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DPAK |
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CASE 369C |
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STYLE 1 |
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4 |
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YWW |
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J4 |
1 |
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xH11G |
2 |
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3 |
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DPAK-3 |
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CASE 369D |
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STYLE 1 |
Y= Year
WW = Work Week
J4xH11 = Device Code
x = 4 or 5
G= Pb-Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.
Preferred devices are recommended choices for future use and best overall value.
♥ Semiconductor Components Industries, LLC, 2008 |
1 |
Publication Order Number: |
January, 2008 - Rev. 8 |
|
MJD44H11/D |
MJD44H11 (NPN) MJD45H11 (PNP)
ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
Characteristic |
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Symbol |
Min |
Typ |
Max |
Unit |
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OFF CHARACTERISTICS |
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Collector-Emitter Sustaining Voltage |
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VCEO(sus) |
80 |
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Vdc |
(IC = 30 mA, IB = 0) |
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Collector Cutoff Current |
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ICES |
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1.0 |
mA |
(VCE = Rated VCEO, VBE = 0) |
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Emitter Cutoff Current |
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IEBO |
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1.0 |
mA |
(VEB = 5 Vdc) |
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ON CHARACTERISTICS |
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Collector-Emitter Saturation Voltage |
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VCE(sat) |
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1 |
Vdc |
(IC = 8 Adc, IB = 0.4 Adc) |
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Base-Emitter Saturation Voltage |
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VBE(sat) |
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1.5 |
Vdc |
(IC = 8 Adc, IB = 0.8 Adc) |
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DC Current Gain |
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hFE |
60 |
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- |
(VCE = 1 Vdc, IC = 2 Adc) |
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DC Current Gain |
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40 |
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(VCE = 1 Vdc, IC = 4 Adc) |
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DYNAMIC CHARACTERISTICS |
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Collector Capacitance |
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Ccb |
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pF |
(VCB = 10 Vdc, ftest = 1 MHz) |
MJD44H11 |
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45 |
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MJD45H11 |
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130 |
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Gain Bandwidth Product |
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fT |
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MHz |
(IC = 0.5 Adc, VCE = 10 Vdc, f = 20 MHz) |
MJD44H11 |
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85 |
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MJD45H11 |
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90 |
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SWITCHING TIMES |
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Delay and Rise Times |
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td + tr |
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ns |
(IC = 5 Adc, IB1 = 0.5 Adc) |
MJD44H11 |
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300 |
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MJD45H11 |
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135 |
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Storage Time |
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ts |
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ns |
(IC = 5 Adc, IB1 = IB2 = 0.5 Adc) |
MJD44H11 |
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500 |
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MJD45H11 |
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500 |
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Fall Time |
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tf |
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ns |
(IC = 5 Adc, IB1 = IB2 = 0.5 Adc |
MJD44H11 |
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140 |
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MJD45H11 |
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100 |
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2
MJD44H11 (NPN) MJD45H11 (PNP)
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1 |
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EFFECTIVE TRANSIENT THERMAL |
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0.7 |
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D = 0.5 |
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0.5 |
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RESISTANCE (NORMALIZED) |
0.3 |
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0.2 |
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0.2 |
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RqJC(t) = r(t) RqJC |
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P(pk) |
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0.1 |
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0.1 |
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0.05 |
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RqJC = 6.25°C/W MAX |
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D CURVES APPLY FOR POWER |
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0.07 |
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0.02 |
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PULSE TRAIN SHOWN |
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t1 |
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0.05 |
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READ TIME AT t1 |
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t |
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0.01 |
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TJ(pk) - TC = P(pk) qJC(t) |
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2 |
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0.03 |
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DUTY CYCLE, D = t1/t2 |
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0.02 |
SINGLE PULSE |
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r(t), |
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0.01 |
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0.02 |
0.03 |
0.05 |
0.1 |
0.2 |
0.3 |
0.5 |
1 |
2 |
3 |
5 |
10 |
20 |
30 |
50 |
100 |
200 |
300 |
500 |
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0.01 |
1 k |
t, TIME (ms)
Figure 1. Thermal Response
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20 |
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(AMP) |
10 |
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500 ms |
100 ms |
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5 |
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1 ms |
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CURRENT |
3 |
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dc |
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5 ms |
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2 |
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1 |
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, COLLECTOR |
0.5 |
THERMAL LIMIT @ TC = 25°C |
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0.3 |
WIRE BOND LIMIT |
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0.1 |
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C |
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I |
0.05 |
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0.02 |
3 |
5 |
7 |
10 |
20 |
30 |
50 |
70 |
100 |
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1 |
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 2. Maximum Forward Bias
Safe Operating Area
There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC - VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figure 2 is based on TJ(pk) = 150_C; TC is variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided TJ(pk) v 150_C. TJ(pk) may be calculated from the data in Figure 1. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the limitations imposed by second breakdown.
PD, POWER DISSIPATION (WATTS)
TA TC 2.5 25
2 20
1.5 15
1 10
0.5 5
00
25
TC
TA
SURFACE
MOUNT
50 |
75 |
100 |
125 |
150 |
T, TEMPERATURE (°C)
Figure 3. Power Derating
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3