NCP3163, NCV3163
3.4 A, Step−Up/Down/
Inverting 50−300 kHz
Switching Regulator
The NCP3163 Series is a performance enhancement to the popular MC33163 and MC34163 monolithic DC−DC converters. These devices consist of an internal temperature compensated reference, comparator, controlled duty cycle oscillator with an active current limit circuit, driver and high current output switch. This controller was specifically designed to be incorporated in step−down, step−up, or voltage−inverting applications with a minimum number of external components. The NCP3163 comes in an exposed pad package which can greatly increase the power dissipation of the built in power switch.
Features
•Output Switch Current in Excess of 3.0 A
•3.4 A Peak Switch Current
•Frequency is Adjustable from 50 kHz to 300 kHz
•Operation from 2.5 V to 40 V Input
•Externally Adjustable Operating Frequency
•Precision 2% Reference for Accurate Output Voltage Control
•Driver with Bootstrap Capability for Increased Efficiency
•Cycle−by−Cycle Current Limiting
•Internal Thermal Shutdown Protection
•Low Voltage Indicator Output for Direct Microprocessor Interface
•Exposed Pad Power Package
•Low Standby Current
•NCV Prefix for Automotive and Other Applications Requiring Site and Control Changes
•These are Pb−Free Devices
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Current |
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8 |
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Limit |
9 |
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+ |
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Vin |
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7 |
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10 |
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VCC |
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Cin |
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Oscillator |
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Q |
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4 |
Thermal |
S |
13 |
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VCC |
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3 |
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14 |
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15 |
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1 |
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LVI |
VCC |
Vout |
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(Bottom View) |
+ |
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CO |
Figure 1. Typical Buck Application Circuit
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MARKING |
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DIAGRAMS |
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1 |
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NCx3163yPW |
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SOIC−16W |
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AWLYYWWG |
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EXPOSED PAD |
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PW SUFFIX |
1 |
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CASE 751AG |
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18 |
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18 |
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18−LEAD DFN |
NCP3163y |
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AWLYYWW G |
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1 |
MN SUFFIX |
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CASE 505 |
G |
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NCx3163x |
= |
Specific Device Code |
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x = P or V |
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y = blank or B |
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A |
= |
Assembly Location |
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WL |
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Wafer Lot |
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YY |
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Year |
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WW |
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Work Week |
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G or G |
= Pb−Free Package |
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 18 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please download the
ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
♥ Semiconductor Components Industries, LLC, 2007 |
1 |
Publication Order Number: |
January, 2007 − Rev. 4 |
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NCP3163/D |
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NCP3163, NCV3163 |
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IPKsense |
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0.25 V |
Current |
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8 |
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Limit |
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9 |
Driver Collector |
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RSC |
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+ |
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VCC |
7 |
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10 |
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VCC |
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Switch Collector |
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Timing Capacitor |
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6 |
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Q1 |
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Oscillator |
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CT |
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Q2 |
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Shutdown |
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R |
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RDT |
5 |
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12 |
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Q |
60 |
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4 |
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Thermal |
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S |
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13 |
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Gnd |
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Latch |
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VCC |
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Voltage Feedback 1 |
3 |
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14 |
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45 k |
2.0 mA |
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Switch Emitter |
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Voltage Feedback 2 |
2 |
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Feedback |
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15 |
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Comparator |
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− |
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LVI Output |
1 |
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1.25 V 15 k |
7.0 V |
16 |
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+ |
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Bootstrap Input |
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− |
1.125 V |
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LVI |
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VCC |
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(Bottom View) |
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= Sink Only |
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Positive True Logic |
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Figure 2. Representative Block Diagram |
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PIN FUNCTION DESCRIPTION
SOIC16 |
DFN18 |
PIN NAME |
DESCRIPTION |
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1 |
15 |
LVI Output |
This pin will sink current when FB1 and FB2 are less than the LVI threshold (Vth). |
2 |
16 |
Voltage Feedback 2 |
Connecting this pin to a resistor divider off of the output will regulate the application |
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according to the Vout design equation in Figure 22. |
3 |
17 |
Voltage Feedback 1 |
Connecting this pin directly to the output will regulate the device to 5.05 V. |
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4 |
18 |
GND |
Ground pin for all internal circuits and power switch. |
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6 |
1 |
Timing Capacitor |
Connect a capacitor to this pin to set the frequency. The addition of a parallel resis- |
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tor will decrease the maximum duty cycle and increase the frequency. |
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7 |
3 |
VCC |
Power pin for the IC. |
8 |
4 |
Ipk Sense |
When (VCC−VIPKsense) > 250 mV the circuit resets the output driver on a pulse by |
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pulse basis. |
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9 |
5 |
Drive Collector |
Voltage driver collector |
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10,11 |
6,7,8,9 |
Switch Collector |
Internal switch transistor collector |
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14,15 |
10,11,12,13 |
Switch Emitter |
Internal switch transistor emitter |
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16 |
14 |
Bootstrap Input |
Connect this pin to VCC for operation at low VCC levels. For some topologies, a |
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series resistor and capacitor can be utilized to improve the converter efficiency. |
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5,12,13 |
2 |
No Connect |
These pins have no connection. |
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Exposed |
Exposed |
Exposed Pad |
The exposed pad beneath the package must be connected to GND (pin 4). Addi- |
Pad |
Pad |
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tionally, using proper layout techniques, the exposed pad can greatly enhance the |
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power dissipation capabilities of the NCP3163. |
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2
NCP3163, NCV3163
MAXIMUM RATINGS (Note 1)
Rating |
Symbol |
Value |
Unit |
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Power Supply Voltage |
VCC |
0 to +40 |
V |
Switch Collector Voltage Range |
VCSW |
−1.0 to +40 |
V |
Switch Emitter Voltage Range |
VESW |
−2.0 to +40 |
V |
Switch Collector to Emitter Voltage |
VCESW |
+40 |
V |
Switch Current |
ISW |
3.4 |
A |
Driver Collector Voltage (Pin 8) |
VCC |
−1.0 to +40 |
V |
Driver Collector Current (Pin 8) |
ICC |
150 |
mA |
Bootstrap Input Current Range |
IBST |
−100 to +100 |
mA |
Current Sense Input Voltage Range |
VIPKSNS |
(VCC − 7.0) to (VCC + 1.0) |
V |
Feedback and Timing Capacitor Input Voltage Range |
Vin |
−1.0 to +7.0 |
V |
Low Voltage Indicator Output Voltage Range |
VCLVI |
−1.0 to +40 |
V |
Low Voltage Indicator Output Sink Current |
ICLVI |
10 |
mA |
Power Dissipation and Thermal Characteristics |
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Thermal Characteristics |
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°C/W |
Thermal Resistance, Junction−to−Case |
RqJC |
15 |
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Thermal Resistance, Junction−to−Air |
RqJA |
56 |
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Storage Temperature Range |
Tstg |
−65 to +150 |
°C |
Maximum Junction Temperature |
TJmax |
+150 |
°C |
Operating Ambient Temperature (Note 3) |
TA |
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°C |
NCP3163PW |
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0 to +70 |
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NCP3163BPW |
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−40 to +85 |
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NCV3163PW |
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−40 to +125 |
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Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
1.This device series contains ESD protection and exceeds the following tests: Human Body Model 1500 V per MIL−STD−883, Method 3015.
Machine Model Method 150 V.
2.This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78.
3.Maximum package power dissipation limits must be observed. Maximum Junction Temperature must not be exceeded.
4.The pins which are not defined may not be loaded by external signals.
PIN CONNECTIONS
1 |
16 |
Bootstrap Input |
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LVI Output |
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2 |
15 |
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Timing Capacitor |
1 |
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18 |
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Voltage Feedback 2 |
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Switch |
N/C |
2 |
GND |
17 |
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3 |
14 |
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Emitter |
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Voltage Feedback 1 |
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VCC |
3 |
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16 |
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13 |
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4 |
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Ipk Sense |
4 |
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15 |
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GND |
12 |
N/C |
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5 |
Driver Collector |
5 |
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14 |
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N/C |
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11 |
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Switch Collector |
6 |
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13 |
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6 |
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Timing Capacitor |
10 |
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Switch Collector |
7 |
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12 |
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7 |
Switch Collector |
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EP Flag |
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VCC |
9 |
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Switch Collector |
8 |
11 |
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8 |
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Switch Collector |
9 |
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10 |
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Ipk Sense |
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Driver Collector |
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(Top View) |
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GND
Voltage Feedback 1
Voltage Feedback 2
LVI Output
Bootstrap Input
Switch Emitter
Switch Emitter
Switch Emitter
Switch Emitter
Note: Pin 18 must be tied to EP Flag on PCB
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3
NCP3163, NCV3163
ELECTRICAL CHARACTERISTICS (VCC = 15 V, Pin 16 = VCC, CT = 270 pF, RT = 15 kW, for typical values TA = 25°C, for min/max values TA is the operating ambient temperature range that applies (Note 7), unless otherwise noted.)
Characteristic |
Symbol |
Min |
Typ |
Max |
Unit |
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OSCILLATOR |
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Frequency |
fOSC |
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kHz |
TA = 25°C, VCC = 15 V |
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225 |
250 |
275 |
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Total Variation over VCC = 2.5 V to 40 V and Temperature |
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212 |
250 |
288 |
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Charge Current |
Ichg |
− |
225 |
− |
mA |
Discharge Current |
Idischg |
− |
25 |
− |
mA |
Charge to Discharge Current Ratio |
Ichg/Idischg |
8.0 |
9.0 |
10.5 |
− |
Sawtooth Peak Voltage |
VOSC(P) |
− |
1.25 |
− |
V |
Sawtooth Valley Voltage |
VOSC(V) |
− |
0.55 |
− |
V |
FEEDBACK COMPARATOR 1 |
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Threshold Voltage |
Vth(FB1) |
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V |
TA = 25°C |
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4.9 |
5.05 |
5.2 |
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Total Variation over VCC = 2.5 V to 40 V and Temperature |
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4.85 |
− |
5.25 |
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Threshold Voltage |
REGline(FB1) |
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%/V |
Line Regulation (VCC = 2.5 V to 40 V, TA = 25°C) |
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0.008 |
0.03 |
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Input Bias Current (VFB1 = 5.05 V) |
IIB(FB1) |
− |
100 |
200 |
mA |
FEEDBACK COMPARATOR 2 |
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Threshold Voltage |
Vth(FB2) |
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V |
TA = 25°C, VCC = 15 V |
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1.225 |
1.25 |
1.275 |
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Total Variation over VCC = 2.5 V to 40 V and Temperature |
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1.213 |
− |
1.287 |
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Threshold Voltage |
REGline(FB1) |
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%/V |
Line Regulation (VCC = 2.5 V to 40 V, TA = 25°C) |
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0.008 |
0.03 |
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Input Bias Current (VFB2 = 1.25 V) |
IIB(FB2) |
− 0.4 |
− |
0.4 |
mA |
CURRENT LIMIT COMPARATOR |
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Threshold Voltage |
Vth(Sense) |
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mV |
TA = 25°C |
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250 |
− |
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Total Variation over VCC = 2.5 V to 40 V, and Temperature |
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225 |
− |
270 |
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Input Bias Current (VIpk (Sense) = 15 V) |
IIB(Sense) |
− |
1.0 |
20 |
mA |
DRIVER AND OUTPUT SWITCH (Note 6) |
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Saturation Voltage (ISW = 2.5 A, Pins 14, 15 grounded) |
VCE(sat) |
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V |
NCP3163 − Non−Darlington (RPin 9 = 110 W to VCC, ISW/IDRV ≈ 20) |
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− |
0.6 |
1.0 |
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NCV3163 − Non−Darlington (RPin 9 = 110 W to VCC, ISW/IDRV ≈ 20) |
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− |
0.6 |
1.2 |
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Darlington Connection (Pins 9, 10, 11 connected) |
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− |
1.0 |
1.4 |
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Collector Off−State Leakage Current (VCE = 40 V) |
IC(off) |
− |
0.02 |
100 |
mA |
Bootstrap Input Current Source (VBS = VCC + 5.0 V) |
Isource(DRV) |
0.5 |
2.0 |
4.0 |
mA |
Bootstrap Input Zener Clamp Voltage (IZ = 25 mA) |
VZ |
VCC + 6.0 |
VCC + 7.0 |
VCC + 9.0 |
V |
LOW VOLTAGE INDICATOR |
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Input Threshold (VFB2 Increasing) |
Vth |
1.07 |
1.125 |
1.18 |
V |
Input Hysteresis (VFB2 Decreasing) |
VH |
− |
15 |
− |
mV |
Output Sink Saturation Voltage (Isink = 2.0 mA) |
VOL(LVI) |
− |
0.15 |
0.4 |
V |
Output Off−State Leakage Current (VOH = 15 V) |
IOH |
− |
0.01 |
5.0 |
mA |
TOTAL DEVICE |
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Standby Supply Current (VCC = 2.5 V to 40 V, Pin 8 = VCC, |
ICC |
− |
6.0 |
10 |
mA |
Pins 6, 14, 15 = GND, remaining pins open) |
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5.Maximum package power dissipation limits must be observed.
6.Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
7. Tlow = |
0°C for NCP3163 |
Thigh = |
+ 70°C for NCP3163 |
= |
− 40°C for NCP3163B |
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+ 85°C for NCP3163B |
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− 40°C for NCV3163 |
= |
+ 125°C for NCV3163 |
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4
NCP3163, NCV3163
f OSC, OSCILLATOR FREQUENCY CHANGE (%)
2.0
0
− 2.0
− 4.0
− 6.0 − 55
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VCC = 15 V |
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TA = 25°C |
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(kHz) |
250 |
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200 |
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FREQUENCY |
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Rt = 15 kW |
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150 |
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Rt = open |
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100 |
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0 |
100 |
200 |
300 |
400 |
500 |
600 |
700 |
CT, TIMER CAPACITANCE (pF)
Figure 3. Oscillator Frequency vs. Timer
Capacitance (CT)
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(%) |
4.0 |
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VCC = 15 V |
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CHANGE |
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VCC = 15 V |
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CT = 620 pF |
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2.0 |
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CT = 230 pF |
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FREQUENCY |
0 |
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RT = 20 kW |
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− 4.0 |
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OSCILLATOR, |
− 2.0 |
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− 6.0 |
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− 8.0 |
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OSC |
− 10 |
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− 25 |
0 |
25 |
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75 |
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125 |
− 50 |
− 25 |
0 |
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TA, AMBIENT TEMPERATURE (°C) |
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f |
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TEMPERATURE (°C) |
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Figure 4. Oscillator Frequency Change vs. Temperature when only CT is connected to Pin 6
Figure 5. Oscillator Frequency Change vs. Temperature when CT and RT are connected to Pin 6
IIB, INPUT BIAS CURRENT (A)μ
140
VCC = 15 V VFB1 = 5.05 V
120
100
80
60 |
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− 55 |
− 25 |
0 |
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TA, AMBIENT TEMPERATURE (°C)
Figure 6. Feedback Comparator 1 Input Bias
Current vs. Temperature
Vth(FB2), COMPARATOR 2 THRESHOLD VOLTAGE (mV)
1300 |
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1280 |
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VCC = 15 V |
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Vth Max = 1275 mV |
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1260 |
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Vth Typ = 1250 mV |
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1240 |
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1220 |
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Vth Min = 1225 mV |
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− 55 |
− 25 |
0 |
25 |
50 |
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100 |
125 |
TA, AMBIENT TEMPERATURE (°C)
Figure 7. Feedback Comparator 2 Threshold
Voltage vs. Temperature
http://onsemi.com
5
NCP3163, NCV3163
I source (DRV), BOOTSTRAP INPUT CURRENT SOURCE (mA
2.8
VCC = 15 V
Pin 16 = VCC + 5.0 V
2.4
2.0
1.6
1.2 |
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− 55 |
− 25 |
0 |
25 |
50 |
75 |
100 |
125 |
TA, AMBIENT TEMPERATURE (°C)
Figure 8. Bootstrap Input Current
Source vs. Temperature
VZ, BOOTSTRAP INPUT ZENER CLAMP VOLTAGE (V
7.6
IZ = 25 mA
7.4
7.2
7.0
6.8 |
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− 55 |
− 25 |
0 |
25 |
50 |
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100 |
125 |
TA, AMBIENT TEMPERATURE (°C)
Figure 9. Bootstrap Input Zener Clamp
Voltage vs. Temperature
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0 |
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(V) |
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VCC |
Darlington Configuration |
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Emitter Sourcing Current to GND |
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SATURATION |
− 0.4 |
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Pins 7, 8, 10, 11 = VCC |
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Pins 4, 5, 12, 13 = GND |
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− 0.8 |
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TA = 25°C, (Note 2) |
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SOURCE, |
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−1.2 |
Bootstrapped, Pin 16 = VCC + 5.0 V |
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(sat) |
−1.6 |
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CE |
Non−Bootstrapped, Pin 16 = VCC |
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V |
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− 2.0
0 |
0.8 |
1.6 |
2.4 |
3.2 |
IE, EMITTER CURRENT (A)
Figure 10. Output Switch Source Saturation
vs. Emitter Current
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1.2 |
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(V) |
1.0 |
Darlington, Pins 9, 10, 11 Connected |
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SATURATION |
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0.8 |
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Grounded Emitter Configuration |
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0.6 |
Collector Sinking Current From VCC |
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,SINK |
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Pins 7, 8 = VCC = 15 V |
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0.4 |
Pins 4, 5, 12, 13, 14, 15 = GND |
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CE (sat) |
TA = 25°C, (Note 2) |
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0.2 |
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Saturated Switch, RPin9 = 110 W to VCC |
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V |
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0 |
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GND |
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0 |
0.8 |
1.6 |
2.4 |
3.2 |
IC, COLLECTOR CURRENT (A)
Figure 11. Output Switch Sink Saturation
vs. Collector Current
VE, EMITTER VOLTAGE (V)
0
GND
IC = 10 mA
− 0.4
− 0.8
IC = 10 mA
− 1.2
VCC = 15 V
− 1.6 Pins 7, 8, 9, 10, 16 = VCC Pins 4, 6 = GND
Pin 14 Driven Negative
− 2.0 |
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− 55 |
− 25 |
0 |
25 |
50 |
75 |
100 |
125 |
TA, AMBIENT TEMPERATURE (°C)
Figure 12. Output Switch Negative Emitter
Voltage vs. Temperature
(V) |
0.5 |
VCC = 5 V |
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VOLTAGE |
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TA = 25°C |
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0.4 |
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SATURATION |
0.3 |
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0.2 |
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, OUTPUT |
0.1 |
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(LVI) |
0 |
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OL |
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0 |
2.0 |
4.0 |
6.0 |
8.0 |
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V |
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Isink, OUTPUT SINK CURRENT (mA)
Figure 13. Low Voltage Indicator Output Sink Saturation Voltage vs. Sink Current
http://onsemi.com
6