ON Semiconductor NCS21871, NCV21871, NCS21872, NCV21872, NCS21874 User manual

45 mV Offset, 0.4 mV/5C,

Zero-Drift Operational

Amplifier

NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874

The NCS21871, NCS21872 and NCS21874 family of zero−drift op amps feature offset voltage as low as 45 mV over the 1.8 V to 5.5 V supply voltage range. The zero−drift architecture reduces the offset drift to as low as 0.4 mV/°C and enables high precision measurements over both time and temperature. This family has low power consumption over a wide dynamic range and is available in space saving packages. These features make it well suited for signal conditioning circuits in portable, industrial, automotive, medical and consumer markets.

Features

•Gain−Bandwidth Product: 270 kHz to 350 kHz

•Low Supply Current: 17 mA (typ at 3.3 V)

•Low Offset Voltage: 45 mV max

•Low Offset Drift: 0.4 mV/°C max

•Wide Supply Range: 1.8 V to 5.5 V

•Wide Temperature Range: −40°C to +125°C

•Rail−to−Rail Input and Output

•Available in Single, Dual and Quad Packages

•NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable

Applications

•Automotive

•Battery Powered/ Portable Application

•Sensor Signal Conditioning

•Low Voltage Current Sensing

•Filter Circuits

•Bridge Circuits

•Medical Instrumentation

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	5	5
		1
	1
	SOT23−5	SC70−5
	SN SUFFIX	SQ SUFFIX
	CASE 483	CASE 419A

1
UDFN8	MSOP−8
MU SUFFIX	DM SUFFIX
CASE 517AW	CASE 846A−02
8	14
1	1
SOIC−8	SOIC−14
D SUFFIX	D SUFFIX
CASE 751	CASE 751A
14
1
TSSOP−14 WB	ECP5
DT SUFFIX	FCT SUFFIX
CASE 948G	CASE 971BE

DEVICE MARKING INFORMATION

See general marking information in the device marking section on page 2 of this data sheet.

ORDERING INFORMATION

See detailed ordering and shipping information on page 3 of this data sheet.

♥ Semiconductor Components Industries, LLC, 2019	1	Publication Order Number:
April, 2021 − Rev. 2		NCS21871/D

NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874

DEVICE MARKING INFORMATION

Single Channel Configuration

NCS21871, NCV21871

7AAYWG

7CMG

XXX

AYW

G

G

G

ECP5

TSOP−5/SOT23−5

SC70−5

CASE 483

CASE 419A

CASE 971BE

Dual Channel Configuration

NCS21872, NCV21872

8	8

2187

21872

72

AYWG

ALYW

YM

1

G

1

G

1

UDFN8, 2x2, 0.5P

Micro8/MSOP8

SOIC−8

CASE 517AW

CASE 846A−02

CASE 751

Quad Channel Configuration

NCS21874, NCV21874

14

14

N874

N874G

ALYWG

AWLYWW

G

1

1

SOIC−14

TSSOP−14 WB

CASE 751A

CASE 948G

N874 = Specific Device Code

N874 = Specific Device Code

A

= Assembly Location

A

= Assembly Location

Y

= Year

L

= Wafer Lot

W

= Work Week

Y

= Year

M

= Date Code

W

= Work Week

G or G = Pb−Free Package

G

= Pb−Free Package

(Note: Microdot may be in either location)

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NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874

PIN CONNECTIONS

OUT	1	5	VDD
VSS	2
IN+	3	4	IN−
	SOT23−5 / TSOP−5

Single Channel Configuration

NCS21871, NCV21871

IN+	1	5	VDD
VSS	2
IN−	3	4	OUT
SC70−5 / SC−88−5 / SOT−353−5

OUT C3 C1 IN−

VSS B2

VDD A3 A1 IN+

ECP5 (Top View)

Dual Channel Configuration

NCS21872, NCV21872

OUT 1	1			8	VDD
IN− 1	2	−		7	OUT 2
IN+ 1	3	+	−	6	IN− 2
VSS	4		+	5	IN+ 2
	UDFN8* / Micro8 / SOIC−8

*The exposed pad of the UDFN8 package can be floated or connected to VSS.

Quad Channel Configuration

NCS21874, NCV21874

OUT 1	1			14	OUT 4
IN− 1	2	−	−	13	IN− 4
IN+ 1	3	+	+	12	IN+ 4
VDD	4			11	VSS
IN+ 2	5	+	+	10	IN+ 3
IN− 2	6	−	−	9	IN− 3
OUT 2	7			8	OUT 3
			SOIC−14, TSSOP−14

ORDERING INFORMATION

Temperature	Channels	Package	Device Part Number	Shipping †
COMMERCIAL AND INDUSTRIAL
−40°C to 125°C	Single	SOT23*5 / TSOP*5	NCS21871SN2T1G	3000 / Tape & Reel
		SC70*5 / SC*88*5 /	NCS21871SQ3T2G
		SOT*353*5
		ECP5	NCS21871FCTTAG*
	Dual	MICRO*8	NCS21872DMR2G	4000 / Tape & Reel
		SOIC−8	NCS21872DR2G	3000 / Tape & Reel
		UDFN−8	NCS21872MUTBG*
	Quad	SOIC−14	NCS21874DR2G	2500 / Tape & Reel
		TSSOP−14	NCS21874DTBR2G
AUTOMOTIVE
−40°C to 125°C	Single	SOT23*5 / TSOP*5	NCV21871SN2T1G	3000 / Tape & Reel
		SC70*5 / SC*88*5 /	NCV21871SQ3T2G
		SOT*353*5
	Dual	MICRO*8	NCV21872DMR2G	4000 / Tape & Reel
		SOIC−8	NCV21872DR2G	3000 / Tape & Reel
	Quad	SOIC−14	NCV21874DR2G	2500 / Tape & Reel
		TSSOP−14	NCV21874DTBR2G

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*In Development. Contact local sales office for more information.

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NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874

ABSOLUTE MAXIMUM RATINGS

Over operating free−air temperature, unless otherwise stated.

Parameter	Rating	Unit
Supply Voltage	6	V
INPUT AND OUTPUT PINS
Input Voltage (Note 1)	(VSS) − 0.3 to (VDD) + 0.3	V
Input Current (Note 1)	±10	mA
Output Short Circuit Current (Note 2)	Continuous
TEMPERATURE
Operating Temperature Range	−40 to +125	°C
Storage Temperature Range	−65 to +150	°C
Junction Temperature	+150	°C
ESD RATINGS (Note 3)
Human Body Model (HBM)	±4000	V
Charged Device Model (CDM)	±2000	V
OTHER RATINGS
Latch−up Current (Note 4)	100	mA
MSL	Level 1

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

1.Input terminals are diode−clamped to the power−supply rails. Input signals that can swing more than 0.3 V beyond the supply rails should be current limited to 10 mA or less

2.Short−circuit to ground.

3.This device series incorporates ESD protection and is tested by the following methods:

ESD Human Body Model tested per JEDEC standard JS−001 (AEC−Q100−002)

ESD Charged Device Model tested per JEDEC standard JESD22−C101 (AEC−Q100−011)

4. Latch−up Current tested per JEDEC standard: JESD78.

THERMAL INFORMATION (Note 5)

Parameter	Symbol	Package	Value	Unit
Thermal Resistance,	qJA	SOT23−5 / TSOP5	290	°C/W
Junction to Ambient
		SC70−5 / SC−88−5 / SOT−353−5	290
		ECP5	157
		Micro8 / MSOP8	298
		SOIC−8	250
		UDFN8	228
		SOIC−14	216
		TSSOP−14	155

5.As mounted on an 80x80x1.5 mm FR4 PCB with 650 mm2 and 2 oz (0.07 mm) thick copper heat spreader. Following JEDEC JESD/EIA 51.1,

51.2, 51.3 test guidelines

RECOMMENDED OPERATING CONDITIONS

Parameter	Symbol	Range	Unit
Supply Voltage (VDD − VSS)	VS	1.8 to 5.5	V
Specified Operating Temperature Range	TA	−40 to 125	°C
Input Common Mode Voltage Range	VCM	VSS−0.1 to VDD+0.1	V

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.

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NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874

ELECTRICAL CHARACTERISTICS: VS = 1.8 V to 5.5 V

At TA = +25°C, RL = 10 kW connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.

Boldface limits apply over the specified operating temperature range, guaranteed by characterization and/or design.

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

INPUT CHARACTERISTICS

Offset Voltage

VOS

VS = +5 V

6

45

mV

Offset Voltage Drift vs Temp

DVOS/DT

VS = 5 V

0.1

0.4

mV/°C

Offset Voltage Drift vs Supply

DVOS/DVS

TA = +25°C

0.4

8

mV/V

Full temperature range

12.6

Input Bias Current

IIB

TA = +25°C

±60

±400

pA

(Note 6)

Full temperature range

+400

Input Offset Current

IOS

TA = +25°C

±50

±800

pA

(Note 6)

Common Mode Rejection Ratio

CMRR

VS = 1.8 V

111

dB

(Note 7)

VS = 3.3 V

118

VS = 5.0 V

102

123

VS = 5.5 V

127

Input Capacitance

CIN

Differential

4.1

pF

Common Mode

7.9

OUTPUT CHARACTERISTICS

Open Loop Voltage Gain

AVOL

VSS + 100 mV < VO < VDD − 100 mV

106

145

dB

(Note 6)

Open Loop Output Impedance

Zout−OL

See Figure 18

W

Output Voltage High,

VOH

TA = +25°C

10

80

mV

Referenced to VDD

Full temperature range

80

Output Voltage Low,

VOL

TA = +25°C

10

80

mV

Referenced to VSS

Full temperature range

80

IO

Sinking Current

11

mA

Sourcing Current

5.0

Capacitive Load Drive

CL

See Figure 14

NOISE PERFORMANCE

Voltage Noise Density

eN

fIN = 1 kHz

62

nV / √

Hz

Voltage Noise

eP−P

fIN = 0.1 Hz to 10 Hz

1.1

mVPP

fIN = 0.01 Hz to 1 Hz

0.5

Current Noise Density

iN

fIN = 10 Hz

350

fA / √

Hz

Channel Separation

NCS21872, NCS21874

135

dB

DYNAMIC PERFORMANCE

Gain Bandwidth Product

GBWP

CL = 100 pF

NCS21871, NCS21874

350

kHz

NCS21872

270

Gain Margin

AM

CL = 100 pF

18

dB

Phase Margin

fM

CL = 100 pF

55

°

Slew Rate

SR

G = 1, VDD = 5.5 V

0.1

V/ms

G = 1, VDD = 1.8 V

0.05

6.Guaranteed by characterization and/or design

7.Specified over the full common mode range: VSS − 0.1 < VCM < VDD + 0.1

8.No load, per channel

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NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874

ELECTRICAL CHARACTERISTICS: VS = 1.8 V to 5.5 V

At TA = +25°C, RL = 10 kW connected to midsupply, VCM = VOUT = midsupply, unless otherwise noted.

Boldface limits apply over the specified operating temperature range, guaranteed by characterization and/or design.

Parameter	Symbol	Conditions	Min	Typ	Max	Unit
POWER SUPPLY
Power Supply Rejection Ratio	PSRR	TA = +25°C	106	130		dB
		Full temperature range	98
Turn−on Time	tON	VS = 5 V		100		ms
Quiescent Current	IQ	1.8 V ≤ VS ≤ 3.3 V		20	40	mA
(Note 8)
					40
		3.3 V < VS ≤ 5.5 V		28	45
					45

6.Guaranteed by characterization and/or design

7.Specified over the full common mode range: VSS − 0.1 < VCM < VDD + 0.1

8.No load, per channel

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions.

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NCS21871, NCV21871, NCS21872, NCV21872, NCS21874, NCV21874

					TYPICAL CHARACTERISTICS
	120						120			120
	100						105			110
										100				TA = 25°C
				Phase Margin
	80						90	<![if ! IE]> <![endif]>MARGINPHASE		90
<![if ! IE]> <![endif]>GAIN(dB)									<![if ! IE]> <![endif]>CMRR(dB)
	20						45			80
	60	Gain					75			70
	40						60			60
										50
		CL = 100 pF						<![if ! IE]> <![endif]>)°(		40
	0						30			30
		RL = 10 kW
										20
	−20	°					15
		TA = 25 C								10
	−40						0			0
	10	100	1k	10k	100k	1M				10	100	1k	10k	100k	1M
			FREQUENCY (Hz)									FREQUENCY (Hz)

Figure 1. Open Loop Gain and Phase Margin

vs. Frequency

	120
					TA = 25°C
	100
<![if ! IE]> <![endif]>(dB)	80			+PSRR
	60
<![if ! IE]> <![endif]>PSRR			−PSRR
	40
	20
	0
	10	100	1k	10k	100k	1M

FREQUENCY (Hz)

Figure 3. PSRR vs. Frequency

Figure 2. CMRR vs. Frequency

	3							TA = −40 °C
	2							TA = 25 °C
			V					TA = 125		°
										C
<![if ! IE]> <![endif]>(V)			OH
							VDD = 2.75 V
	1						VSS = −2.75 V
<![if ! IE]> <![endif]>VOLTAGE
	0
<![if ! IE]> <![endif]>OUTPUT
	−1						VOL
	−2
	−3
	0	2	4	6	8	10	12	14	16	18
				OUTPUT CURRENT (mA)

Figure 4. Output Voltage Swing vs. Output Current at VS = 5.5 V

<![if ! IE]>

<![endif]>OUTPUT VOLTAGE (V)

1		TA = −40 °C
0.8
	VOH	TA = 25 °C
0.6		TA = 125 °C
0.4		VDD = 0.9 V
		VSS = −0.9 V
0.2

0

−0.2

−0.4 VOL

−0.6

−0.8

−1

0	2	4	6	8	10
	OUTPUT CURRENT (mA)

Figure 5. Output Voltage Swing vs. Output Current at VS = 1.8 V

		200
		150	TA = 25°C
	<![if ! IE]> <![endif]>(pA)		VS = 1.8 V
		100
	<![if ! IE]> <![endif]>CURRENT
		0
		50	IIB+
	<![if ! IE]> <![endif]>BIAS		IIB−
		−50
	<![if ! IE]> <![endif]>INPUT
		−100
		−150

−200 −0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

COMMON MODE VOLTAGE (V)

Figure 6. Input Bias Current vs. Common Mode Voltage

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