Semiconductor
This version:Apr.1999
MSM5116400D
4,194,304-Word ´ 4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE
DESCRIPTION
The MSM5116400D is a 4,194,304-word ´ 4-bit dynamic RAM fabricated in Oki’s silicon-gate CMOS technology. The MSM5116400D achieves high integration, high-speed operation, and low-power consumption because Oki manufactures the device in a quadruple-layer polysilicon/double-layer metal CMOS process. The MSM5116400D is available in a 26/24-pin plastic SOJ, 26/24-pin plastic TSOP.
FEATURES
·4,194,304-word ´ 4-bit configuration
·Single 5V power supply, ±10% tolerance
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Input |
: TTL compatible, low input capacitance |
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Output |
: TTL compatible, 3-state |
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Refresh |
: 4096 cycles/64 ms |
·Fast page mode, read modify write capability
·CAS before RAS refresh, hidden refresh, RAS-only refresh capability
·Multi-bit test mode capability
·Package options:
(SOJ26/24-P-300-1.27) (Product : MSM5116400D-xxSJ)
(TSOPII26/24-P-300-1.27-K) (Product : MSM5116400D-xxTS-K)
xx : indicates speed rank.
PRODUCT FAMILY
Family |
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Access Time (Max.) |
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Cycle Time |
Power Dissipation |
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tRAC |
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tAA |
tCAC |
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tOEA |
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Operating (Max.) |
Standby (Max.) |
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MSM5116400D-50 |
50ns |
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25ns |
13ns |
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13ns |
90ns |
413mW |
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MSM5116400D-60 |
60ns |
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30ns |
15ns |
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15ns |
110ns |
385mW |
5.5mW |
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MSM5116400D-70 |
70ns |
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35ns |
20ns |
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20ns |
130ns |
358mW |
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1/14
MSM5116400D
PIN CONFIGRATION (TOP VIEW)
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VCC |
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VCC |
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1 |
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26 |
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VSS |
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1 |
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26 |
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VSS |
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DQ1 2 |
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DQ4 |
DQ1 2 |
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DQ4 |
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25 |
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25 |
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DQ2 3 |
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DQ3 |
DQ2 3 |
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DQ3 |
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24 |
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24 |
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4 |
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WE |
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23 |
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CAS |
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WE |
4 |
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23 |
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CAS |
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5 |
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RAS |
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22 |
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OE |
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RAS |
5 |
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22 |
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OE |
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A11 |
6 |
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A9 |
A11 |
6 |
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A9 |
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21 |
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21 |
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A10 |
8 |
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A8 |
A10 |
8 |
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A8 |
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19 |
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A0 |
9 |
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A7 |
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A0 |
9 |
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A7 |
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18 |
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18 |
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A1 |
10 |
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A6 |
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A1 |
10 |
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A6 |
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17 |
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A2 |
11 |
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A5 |
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A2 |
11 |
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A5 |
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16 |
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16 |
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A3 |
12 |
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A4 |
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A3 |
12 |
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A4 |
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15 |
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15 |
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VCC 13 |
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VSS |
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VCC 13 |
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VSS |
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14 |
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14 |
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26/24-Pin Plastic SOJ |
26/24-Pin Plastic TSOP |
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(K Type) |
Pin Name |
Function |
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A0–A11 |
Address Input |
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Row Address Strobe |
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RAS |
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Column Address Strobe |
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CAS |
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DQ1–DQ4 |
Data Input/Data Output |
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Output Enable |
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OE |
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Write Enable |
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WE |
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VCC |
Power Supply (5V) |
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VSS |
Ground (0V) |
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NC |
No Connection |
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2/14
MSM5116400D
BLOCK DIAGRAM
RAS |
Timing |
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Generator |
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Timing |
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CAS |
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Generator |
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Write |
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WE |
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Column |
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Clock |
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OE |
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10 |
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Generator |
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Address |
10 |
Column Decoders |
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Buffers |
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4 |
Output |
4 |
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Buffers |
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Internal |
Refresh |
Sense Amplifiers |
4 |
I/O |
4 |
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DQ1 - DQ4 |
A0 – A11 |
Selector |
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Address |
Control Clock |
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Input |
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Counter |
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4 |
4 |
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Buffers |
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12 |
Row |
12 |
Row |
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Address |
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Word |
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Memory |
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Buffers |
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Deco- |
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Drivers |
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Cells |
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VCC
On Chip
VBB Generator
VSS
3/14
MSM5116400D
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Parameter |
Symbol |
Rating |
Unit |
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Voltage on Any Pin Relative to VSS |
VT |
-0.5 to 7.0 |
V |
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Short Circuit Output Current |
IOS |
50 |
mA |
Power Dissipation |
PD* |
1 |
W |
Operating Temperature |
Topr |
0 to 70 |
°C |
Storage Temperature |
Tstg |
-55 to 150 |
°C |
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*: Ta = 25°C |
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Recommended Operating Conditions
(Ta = 0°C to 70°C)
Parameter |
Symbol |
Min. |
Typ. |
Max. |
Unit |
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Power Supply Voltage |
VCC |
4.5 |
5.0 |
5.5 |
V |
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VSS |
0 |
0 |
0 |
V |
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Input High Voltage |
VIH |
2.4 |
¾ |
VCC + 0.5*1 |
V |
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Input Low Voltage |
VIL |
-0.5*2 |
¾ |
0.8 |
V |
Notes: *1. The input voltage is VCC + 2.0V when the pulse width is less than 20ns (the pulse width is with respect to the point at which VCC is applied).
*2. The input voltage is VSS - 2.0V when the pulse width is less than 20ns (the pulse width respect to the point at which VSS is applied).
Capacitance
(VCC = 5.0V ± 10%, Ta = 25°C, f=1MHz)
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Parameter |
Symbol |
Typ. |
Max. |
Unit |
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Input Capacitance (A0 – A11) |
CIN1 |
¾ |
5 |
pF |
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Input Capacitance |
CIN2 |
¾ |
7 |
pF |
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(RAS, CAS, WE, OE) |
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Output Capacitance (DQ1 – DQ4) |
CI/O |
¾ |
7 |
pF |
4/14
MSM5116400D
DC Characteristics
(VCC = 5V ± 10%, Ta = 0°C to 70°C)
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MSM5116400 |
MSM5116400 |
MSM5116400 |
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Parameter |
Symbol |
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Condition |
D-50 |
D-60 |
D-70 |
Unit |
Note |
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Min. |
Max |
Min. |
Max |
Min. |
Max |
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Output High Voltage |
VOH |
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IOH = -5.0mA |
2.4 |
VCC |
2.4 |
VCC |
2.4 |
VCC |
V |
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Output Low Voltage |
VOL |
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IOL = 4.2mA |
0 |
0.4 |
0 |
0.4 |
0 |
0.4 |
V |
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Input Leakage |
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0V £ VI £ 6.5V ; |
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ILI |
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All other pins not |
-10 |
10 |
-10 |
10 |
-10 |
10 |
mA |
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Current |
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under test = 0V |
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Output Leakage |
ILO |
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DQ disable |
-10 |
10 |
-10 |
10 |
-10 |
10 |
mA |
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Current |
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0V £ VO £ VCC |
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Average Power |
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RAS, CAS cycling, |
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Supply Current |
ICC1 |
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¾ |
75 |
¾ |
70 |
¾ |
65 |
mA |
1,2 |
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tRC = Min. |
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(Operating) |
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= VIH |
¾ |
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¾ |
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¾ |
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Power Supply |
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RAS, |
CAS |
2 |
2 |
2 |
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Current |
ICC2 |
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³ |
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mA |
1 |
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RAS, |
CAS |
¾ |
0.5 |
¾ |
0.5 |
¾ |
0.5 |
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(Standby) |
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VCC – 0.2V |
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cycling, |
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Average Power |
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RAS |
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Supply Current |
ICC3 |
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CAS |
= VIH, |
¾ |
75 |
¾ |
70 |
¾ |
65 |
mA |
1,2 |
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(RAS |
-only Refresh) |
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tRC = Min. |
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= VIH, |
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Power Supply |
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RAS |
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Current |
ICC5 |
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¾ |
2 |
¾ |
2 |
¾ |
2 |
mA |
1 |
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CAS |
= VIL, |
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(Standby) |
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DQ = enable |
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Average Power |
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= cycling, |
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Supply Current |
ICC6 |
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RAS |
¾ |
75 |
¾ |
70 |
¾ |
65 |
mA |
1,2 |
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(CAS before RAS |
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CAS before RAS |
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Refresh) |
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= VIL, |
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Average Power |
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RAS |
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Supply Current |
ICC7 |
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cycling, |
¾ |
70 |
¾ |
65 |
¾ |
60 |
mA |
1,3 |
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CAS |
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(Fast Page Mode) |
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tPC = Min. |
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Notes: 1. ICC Max. is specified as ICC for output open condition.
2.The address can be changed once or less while RAS = VIL.
3.The address can be changed once or less while CAS = VIH.
5/14