AMD Advanced Micro Devices AM29F010B-90DWI1, AM29F010B-90DWE1, AM29F010B-90DWC1, AM29F010B, AM29F010B-90DTC1 Datasheet

SUPPLEMENT

Am29F010 Known Good Die

1 Megabit (128 K x 8-Bit)

CMOS 5.0 Volt-only, Uniform Sector Flash Memory—Die Revision 1

DISTINCTIVE CHARACTERISTICS

■Single power supply operation

—5.0 V ± 10% for read, erase, and program operations

—Simplifies system-level power requirements

■High performance

—90 or 120 ns maximum access time

■Low power consumption

—30 mA max active read current

—50 mA max program/erase current

—<25 μA typical standby current

■Flexible sector architecture

—Eight uniform sectors

—Any combination of sectors can be erased

—Supports full chip erase

■Sector protection

—Hardware-based feature that disables/reenables program and erase operations in any combination of sectors

—Sector protection/unprotection can be implemented using standard PROM programming equipment

■Embedded Algorithms

—Embedded Erase algorithm automatically pre-programs and erases the chip or any combination of designated sector

—Embedded Program algorithm automatically programs and verifies data at specified address

■Minimum 100,000 program/erase cycles guaranteed

■Compatible with JEDEC standards

—Pinout and software compatible with

single-power-supply flash

—Superior inadvertent write protection

■Data Polling and Toggle Bits

—Provides a software method of detecting program or erase cycle completion

■Tested to datasheet specifications at temperature

■Quality and reliability levels equivalent to standard packaged components

1/13/98	Publication# 21116 Rev: B Amendment/0
	Issue Date: January 1998

S U P P L E M E N T

GENERAL DESCRIPTION

The Am29F010 in Known Good Die (KGD) form is a 1 Mbit, 5.0 Volt-only Flash memory. AMD defines KGD as standard product in die form, tested for functionality and speed. AMD KGD products have the same reliability and quality as AMD products in packaged form.

Am29F010 Features

The Am29F010 device is organized as eight uniform sectors of 16 Kbytes each for flexible erase capability. This device is designed to be programmed in-system with the standard system 5.0 Volt VCC supply. A power supply providing 12.0 Volt VPP is not required for program or erase operations.

The Am29F010 in KGD form offers access times of 90 ns and 120 ns, allowing high speed microprocessors to operate without wait states. To eliminate bus contention the device has separate chip enable (CE#), write enable (WE#) and output enable (OE) controls.

The device requires only a single 5.0 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations.

The device is entirely command set compatible with the

JEDEC single-power-supply Flash standard. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state machine that controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from other Flash or EPROM devices.

Device programming occurs by executing the program command sequence. This invokes the Embedded

Program algorithm—an internal algorithm that automatically times the program pulse widths and verifies proper cell margin.

Device erasure occurs by executing the erase command sequence. This invokes the Embedded Erase algorithm—an internal algorithm that automatically preprograms the array (if it is not already programmed) before executing the erase operation. During erase, the device automatically times the erase pulse widths and verifies proper cell margin.

The host system can detect whether a program or erase operation is complete by reading the DQ7 (Data# Polling) and DQ6 (toggle) status bits. After a program or erase cycle has been completed, the device is ready to read array data or accept another command.

The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. The device is erased when shipped from the factory.

The hardware data protection measures include a low VCC detector automatically inhibits write operations during power transitions. The hardware sector protection feature disables both program and erase operations in any combination of the sectors of memory, and is implemented using standard EPROM programmers.

The system can place the device into the standby mode. Power consumption is greatly reduced in this mode.

ELECTRICAL SPECIFICATIONS

Refer to the Am29F010 data sheet, publication number 16736, for full electrical specifications for the Am29F010 in KGD form.

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Am29F010 Known Good Die

1/13/98

S U P P L E M E N T

PRODUCT SELECTOR GUIDE

Family Part Number					Am29F010 KGD
Speed Option (VCC = 5.0 V ± 10%)				-90				-120
Max Access Time, tACC (ns)				90				120
Max CE# Access, tCE (ns)				90				120
Max OE# Access, tOE (ns)				35				50
DIE PHOTOGRAPH
Orientation relative to
top left corner of
Gel-Pak									Orientation relative to
									leading edge of tape
									and reel

DIE PAD LOCATIONS

7

6

5

4

3

2

1

30

29

28 27

26

25

8

AMD logo location

9				24
10	11 12 13 14 15 16 17	18 19	20 21 22	23

1/13/98 Am29F010 Known Good Die 3