AMD Advanced Micro Devices AM29LV800BT90RDW5I1, AM29LV800BT90RDW5C1, AM29LV800BT90RDT5I1, AM29LV800BT90RDT5C1, AM29LV800BT90RDP5I1 Datasheet

SUPPLEMENT

Am29LV800B Known Good Die

8 Megabit (1 M x 8-Bit/512 K x 16-Bit)

CMOS 3.0 Volt-only, Boot Sector Flash Memory—Die Revision 1

DISTINCTIVE CHARACTERISTICS

■Single power supply operation

—2.7 to 3.6 V for read, program, and erase operations

—Ideal for battery-powered applications

■Manufactured on 0.35 μm process technology

■High performance

—90 or 120 ns access time

■Low power consumption (typical values at 5 MHz)

—200 nA Automatic Sleep mode current

—200 nA standby mode current

—7 mA read current

—15 mA program/erase current

■Flexible sector architecture

—One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and fifteen 64 Kbyte sectors (byte mode)

—One 8 Kword, two 4 Kword, one 16 Kword, and fifteen 32 Kword sectors (word mode)

—Supports full chip erase

—Sector Protection features:

A hardware method of locking a sector to prevent any program or erase operations within that sector

Sectors can be locked in-system or via programming equipment

Temporary Sector Unprotect feature allows code changes in previously locked sectors

■Unlock Bypass Program Command

—Reduces overall programming time when issuing multiple program command sequences

■Top or bottom boot block configurations available

■Embedded Algorithms

—Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors

—Embedded Program algorithm automatically writes and verifies data at specified addresses

■Minimum 1,000,000 write cycle guarantee per sector

■Compatibility with JEDEC standards

—Pinout and software compatible with singlepower supply Flash

—Superior inadvertent write protection

■Data# Polling and toggle bits

—Provides a software method of detecting program or erase operation completion

■Ready/Busy# pin (RY/BY#)

—Provides a hardware method of detecting program or erase cycle completion

■Erase Suspend/Erase Resume

—Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation

■Hardware reset pin (RESET#)

—Hardware method to reset the device to reading array data

Publication# 21356 Rev: B Amendment/+1

Issue Date: March 1998

S U P P L E M E N T

GENERAL DESCRIPTION

The Am29LV800B in Known Good Die (KGD) form is an 8 Mbit, 3.0 volt-only Flash memory. AMD defines KGD as standard product in die form, tested for functionality and speed. AMD KGD products have the same reliability and quality as AMD products in packaged form.

Am29LV800B Features

The Am29LV800B is an 8 Mbit, 3.0 volt-only Flash memory organized as 1,048,576 bytes or 524,288 words. The word-wide data (x16) appears on DQ15– DQ0; the byte-wide (x8) data appears on DQ7–DQ0. To eliminate bus contention the device has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls.

The device requires only a single 3.0 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations. No VPP is required for program or erase operations. The device can also be programmed in standard EPROM programmers.

The device is entirely command set compatible with the

JEDEC single-power-supply Flash standard. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine that controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from other Flash or EPROM devices.

Device programming occurs by executing the program command sequence. This initiates the Embedded Program algorithm—an internal algorithm that automatically times the program pulse widths and verifies proper cell margin. The Unlock Bypass mode facilitates faster programming times by requiring only two write cycles to program data instead of four.

Device erasure occurs by executing the erase command sequence. This initiates the Embedded Erase algorithm—an internal algorithm that automatically preprograms the array (if it is not already programmed) before executing the erase operation. During erase, the device automatically times the erase pulse widths and verifies proper cell margin.

The host system can detect whether a program or erase operation is complete by observing the RY/BY# pin, or by reading the DQ7 (Data# Polling) and DQ6 (toggle) status bits. After a program or erase cycle has been completed, the device is ready to read array data or accept another command.

The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. The device is fully erased when shipped from the factory.

Hardware data protection measures include a low VCC detector that automatically inhibits write operations during power transitions. The hardware sector protection feature disables both program and erase operations in any combination of the sectors of memory. This can be achieved in-system or via programming equipment.

The Erase Suspend feature enables the user to put erase on hold for any period of time to read data from, or program data to, any sector that is not selected for erasure. True background erase can thus be achieved.

The hardware RESET# pin terminates any operation in progress and resets the internal state machine to reading array data. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the system microprocessor to read the boot-up firmware from the Flash memory.

The device offers two power-saving features. When addresses have been stable for a specified amount of time, the device enters the automatic sleep mode. The system can also place the device into the standby mode. Power consumption is greatly reduced in both these modes.

AMD’s Flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effectiveness. The device electrically erases all bits within a sector simultaneously via Fowler-Nordheim tunneling. The data is programmed using hot electron injection.

ELECTRICAL SPECIFICATIONS

Refer to the Am29LV800B data sheet, publication number 21490, for full electrical specifications on the Am29LV800B in KGD form.

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S U P P L E M E N T

PRODUCT SELECTOR GUIDE

Family Part Number						Am29LV800B KGD
Speed Option (VCC = 2.7 – 3.6 V)					-90			-120
Max Access Time, tACC (ns)					90			120
Max CE# Access, tCE (ns)					90			120
Max OE# Access, tOE (ns)					35			50
DIE PHOTOGRAPH
						Orientation relative
						to leading edge of
						tape and reel
Orientation relative
to top left corner of
Gel-Pak

Am29LV800B Known Good Die

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