AMD Advanced Micro Devices AM27C512-90PI, AM27C512-90PC, AM27C512-120PC, AM27C512-120JI, AM27C512-120JC Datasheet

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AMD Advanced Micro Devices AM27C512-90PI, AM27C512-90PC, AM27C512-120PC, AM27C512-120JI, AM27C512-120JC Datasheet

FINAL

Am27C512

512 Kilobit (64 K x 8-Bit) CMOS EPROM

DISTINCTIVE CHARACTERISTICS

Fast access time

Speed options as fast as 55 ns

Low power consumption

20 µA typical CMOS standby current

JEDEC-approved pinout

Single +5 V power supply

±10% power supply tolerance standard

100% Flashrite™ programming

Typical programming time of 8 seconds

Latch-up protected to 100 mA from –1 V to VCC + 1 V

High noise immunity

Versatile features for simple interfacing

Both CMOS and TTL input/output compatibility

Two line control functions

Standard 28-pin DIP, PDIP, and 32-pin PLCC packages

GENERAL DESCRIPTION

The Am27C512 is a 512-Kbit, ultraviolet erasable programmable read-only memory. It is organized as 64K words by 8 bits per word, operates from a single +5 V supply, has a static standby mode, and features fast single address location programming. Products are available in windowed ceramic DIP packages, as well as plastic one time programmable (OTP) PDIP and PLCC packages.

Data can be typically accessed in less than 55 ns, allowing high-performance microprocessors to operate without any WAIT states. The device offers separate Output Enable (OE#) and Chip Enable (CE#) controls,

thus eliminating bus contention in a multiple bus microprocessor system.

AMD’s CMOS process technology provides high speed, low power, and high noise immunity. Typical power consumption is only 80 mW in active mode, and 100 µW in standby mode.

All signals are TTL levels, including programming signals. Bit locations may be programmed singly, in blocks, or at random. The device supports AMD’s Flashrite programming algorithm (100 µs pulses), resulting in a typical programming time of 8 seconds.

BLOCK DIAGRAM

VCC

VSS

OE#/VPP

CE#

A0–A15

Address

Inputs

Output Enable

Chip Enable

and

Prog Logic

Y

Decoder

X

Decoder

Data Outputs

DQ0–DQ7

Output

Buffers

Y

Gating

524,288 Bit Cell Matrix

08140I-1

Publication# 08140 Rev: I Amendment/0

Issue Date: May 1998

PRODUCT SELECTOR GUIDE

Family Part Number

 

 

 

Am27C512

 

 

 

 

 

 

 

 

 

 

 

 

Speed Options

VCC = 5.0 V ± 5%

-55

 

 

 

 

 

-255

 

 

 

 

 

 

 

 

VCC = 5.0 V ± 10%

-55

-70

-90

-120

-150

-200

 

 

 

 

 

 

 

 

 

 

 

 

Max Access Time (ns)

55

70

90

120

150

200

250

 

 

 

 

 

 

 

 

CE# (E#) Access (ns)

55

70

90

120

150

200

250

 

 

 

 

 

 

 

 

OE# (G#) Access (ns)

35

40

40

50

50

50

50

 

 

 

 

 

 

 

 

 

CONNECTION DIAGRAMS

Top View

DIP

A15

 

1

28

VCC

A12

 

 

 

 

 

2

27

A14

A7

 

 

 

 

 

3

26

A13

A6

 

 

 

A8

 

4

25

A5

 

 

 

A9

 

5

24

A4

 

 

 

A11

 

6

23

A3

 

 

 

OE# (G#)/VPP

 

7

22

A2

 

 

 

A10

 

8

21

A1

 

 

 

CE# (E#)

 

9

20

A0

 

 

 

DQ7

 

10

19

DQ0

 

 

 

DQ6

 

11

18

DQ1

 

 

 

DQ5

 

12

17

DQ2

 

 

 

DQ4

 

13

16

VSS

 

 

 

DQ3

 

14

15

08140I-2

Notes:

1.JEDEC nomenclature is in parenthesis.

2.Don’t use (DU) for PLCC.

PLCC

 

 

 

 

A7

A12

A15

DU

V

A14

A13

 

 

 

 

 

 

 

 

 

 

 

 

 

CC

 

 

 

 

 

 

 

 

 

3

2

1

32 31 30

 

 

 

 

4

 

A6

5

 

 

 

 

 

 

 

 

 

 

 

 

 

29

A8

A5

6

 

 

 

 

 

 

 

 

 

 

 

 

 

28

A9

A4

7

 

 

 

 

 

 

 

 

 

 

 

 

 

27

A11

A3

8

 

 

 

 

 

 

 

 

 

 

 

 

 

26

NC

A2

9

 

 

 

 

 

 

 

 

 

 

 

 

 

25

OE# (G#)/VPP

A1

10

 

 

 

 

 

 

 

 

 

 

 

 

24

A10

A0

11

 

 

 

 

 

 

 

 

 

 

 

 

23

CE# (E#)

NC

12

 

 

 

 

 

 

 

 

 

 

 

 

22

DQ7

DQ0

13

 

 

 

 

 

 

 

 

 

 

 

 

21

DQ6

 

14 15 16 17 18 19 20

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ1

DQ2

SS

DU

DQ3

DQ4

DQ5

 

 

 

 

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

08140I-3

PIN DESIGNATIONS

LOGIC SYMBOL

 

 

 

A0–A15

=

Address Inputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CE# (E#)

=

Chip Enable Input

16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ0–DQ7

=

Data Input/Outputs

 

 

 

 

A0–A15

 

8

 

 

 

 

 

 

 

 

 

 

OE# (G#)/VPP =

Output Enable Input

 

 

 

 

 

 

 

 

 

 

DQ0–DQ7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Program Voltage Input

 

 

 

 

 

 

 

 

 

 

 

 

 

CE# (E#)

 

 

 

VCC

=

VCC Supply Voltage

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VSS

=

Ground

 

 

 

 

OE# (G#)/VPP

 

 

 

NC

=

No Internal Connection

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

08140I-4

2

Am27C512

ORDERING INFORMATION

UV EPROM Products

AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following:

AM27C512

-55

D

C

B

OPTIONAL PROCESSING

Blank = Standard Processing

B = Burn-In

TEMPERATURE RANGE

C = Commercial (0°C to +70°C)

I = Industrial (–40°C to +85°C)

E = Extended (–55°C to +125°C)

PACKAGE TYPE

D = 28-Pin Ceramic DIP (CDV028)

SPEED OPTION

See Product Selector Guide and Valid Combinations

DEVICE NUMBER/DESCRIPTION

Am27C512

512 Kilobit (65 K x 8-Bit) CMOS UV EPROM

Valid Combinations

AM27C512-55

DC

VCC = 5.0 V ± 5%

 

AM27C512-55

DC, DCB

VCC = 5.0 V ± 10%

 

AM27C512-70

DC, DCB, DI, DIB

 

AM27C512-90

 

 

 

AM27C512-120

 

 

 

AM27C512-150

DC, DCB, DI, DIB, DE, DEB

 

 

AM27C512-200

 

 

 

AM27C512-255

DC, DCB, DI, DIB

VCC = 5.0 V ± 5%

 

Valid Combinations

Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations.

Am27C512

3

ORDERING INFORMATION

OTP EPROM Products

AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following:

AM27C512

-70

P

C

OPTIONAL PROCESSING

Blank = Standard Processing

TEMPERATURE RANGE

C = Commercial (0°C to +70°C)

I = Industrial (–40°C to +85°C)

PACKAGE TYPE

P = 28-Pin Plastic DIP (PD 028)

J = 32-Pin Plastic Leaded Chip Carrier (PL 032)

SPEED OPTION

See Product Selector Guide and Valid Combinations

DEVICE NUMBER/DESCRIPTION

Am27C512

512 Kilobit (65 K x 8-Bit) CMOS OTP EPROM

Valid Combinations

AM27C512-55

 

VCC = 5.0 V ± 5%

JC, PC

AM27C512-55

 

VCC = 5.0 V ± 5%

 

AM27C512-70

 

 

 

AM27C512-90

 

 

 

AM27C512-120

 

 

JC, PC, JI, PI

AM27C512-150

 

 

 

AM27C512-200

 

 

 

AM27C512-255

 

VCC = 5.0 V ± 5%

 

Valid Combinations

Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations.

4

Am27C512

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