ON Semiconductor MJF122, MJF127 Service Manual

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MJF122, MJF127

Complementary Power

Darlingtons

For Isolated Package Applications

Designed for generalpurpose amplifiers and switching applications, where the mounting surface of the device is required to be electrically isolated from the heatsink or chassis.

Features

Electrically Similar to the Popular TIP122 and TIP127

100 VCEO(sus)

5.0 A Rated Collector Current

No Isolating Washers Required

Reduced System Cost

High DC Current Gain 2000 (Min) @ IC = 3 Adc

UL Recognized, File #E69369, to 3500 VRMS Isolation

PbFree Packages are Available*

MAXIMUM RATINGS

Rating

Symbol

Value

Unit

 

 

 

 

Collector−Emitter Voltage

VCEO

100

Vdc

Collector−Base Voltage

VCB

100

Vdc

Emitter−Base Voltage

VEB

5

Vdc

RMS Isolation Voltage (Note 1)

VISOL

4500

VRMS

(t = 0.3 sec, R.H. 30%, TA = 25°C)

 

 

 

Per Figure 14

 

 

 

 

 

 

 

Collector Current − Continuous

IC

5

Adc

Peak

 

8

 

 

 

 

 

Base Current

IB

0.12

Adc

Total Power Dissipation (Note 2)

PD

 

 

@ TC = 25_C

 

30

W

Derate above 25_C

 

0.24

_

 

 

W/ C

Total Power Dissipation @ TA = 25_C

PD

2

W

Derate above 25_C

 

0.016

_

 

 

W/ C

Operating and Storage Junction Temperat-

TJ, Tstg

−65 to

IC

ure Range

 

+150

 

 

 

 

 

THERMAL CHARACTERISTICS

Characteristic

Symbol

Max

Unit

Thermal Resistance, Junction−to−Ambient

RqJA

62.5

_C/W

Thermal Resistance, Junction−to−Case

RqJC

4.1

_C/W

(Note 2)

 

 

 

Lead Temperature for Soldering Purpose

TL

260

_C

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.

1.Proper strike and creepage distance must be provided.

2.Measurement made with thermocouple contacting the bottom insulated mounting surface (in a location beneath the die), the device mounted on a heatsink with thermal grease and a mounting torque of 6 in. lbs.

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COMPLEMENTARY SILICON POWER DARLINGTONS 5.0 A, 100 V, 30 W

 

 

NPN

 

PNP

 

 

COLLECTOR 2

COLLECTOR 2

 

BASE

 

BASE

 

 

1

 

1

 

 

 

EMITTER 3

EMITTER 3

 

 

MJF122

 

MJF127

 

 

MARKING

 

 

 

DIAGRAM

 

 

 

 

 

MJF12xG

 

 

TO−220

AYWW

 

 

 

 

 

CASE 221D−02

 

 

 

STYLE 2

 

1

2 3

x

= 2 or 7

 

 

G

= Pb−Free Package

 

 

A

= Assembly Location

 

 

Y

= Year

 

 

 

WW

= Work Week

 

ORDERING INFORMATION

 

Device

Package

Shipping

MJF122

 

TO−220

50 Units / Rail

MJF122G

 

TO−220

50 Units / Rail

 

 

(Pb−Free)

 

MJF127

 

TO−220

50 Units / Rail

MJF127G

 

TO−220

50 Units / Rail

 

 

(Pb−Free)

 

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.

*For additional information on our Pb−Free strategy and soldering details, please download the

ON Semiconductor Soldering and Mounting

Techniques Reference Manual, SOLDERRM/D.

Semiconductor Components Industries, LLC, 2008

1

Publication Order Number:

September, 2008 − Rev. 7

 

MJF122/D

MJF122, MJF127

ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)

Characteristic

 

Symbol

Min

Max

Unit

 

 

 

 

 

 

 

 

OFF CHARACTERISTICS

 

 

 

 

 

 

 

 

 

 

 

 

 

Collector−Emitter Sustaining Voltage (Note 3)

 

VCEO(sus)

100

Vdc

 

(IC = 100 mAdc, IB = 0)

 

 

 

 

 

 

Collector Cutoff Current

 

ICEO

10

mAdc

 

(VCE = 50 Vdc, IB = 0)

 

 

 

 

 

 

Collector Cutoff Current

 

ICBO

10

mAdc

 

(VCB = 100 Vdc, IE = 0)

 

 

 

 

 

 

Emitter Cutoff Current (VBE = 5 Vdc, IC = 0)

 

IEBO

2

mAdc

 

ON CHARACTERISTICS (Note 3)

 

 

 

 

 

 

 

 

 

 

 

 

 

DC Current Gain (IC = 0.5 Adc, VCE = 3 Vdc)

 

hFE

1000

 

DC Current Gain (IC = 3 Adc, VCE = 3 Vdc)

 

 

2000

 

 

Collector−Emitter Saturation Voltage (IC = 3 Adc, IB = 12 mAdc)

 

VCE(sat)

2

Vdc

 

Collector−Emitter Saturation Voltage (IC = 5 Adc, IB = 20 mAdc)

 

 

3.5

 

 

Base−Emitter On Voltage (IC = 3 Adc, VCE = 3 Vdc)

 

VBE(on)

2.5

Vdc

 

DYNAMIC CHARACTERISTICS

 

 

 

 

 

 

 

 

 

 

 

 

Small−Signal Current Gain (IC = 3 Adc, VCE = 4 Vdc, f = 1 MHz)

 

hfe

4

 

Output Capacitance

MJF127

Cob

300

pF

 

(VCB = 10 Vdc, IE = 0, f = 0.1 MHz)

MJF122

 

200

 

 

3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.

RB & RC VARIED TO OBTAIN DESIRED CURRENT LEVELS

 

 

VCC

D1, MUST BE FAST RECOVERY TYPES, e.g.,

 

 

 

 

- 30 V

Ç1N5825 USED ABOVE IB 100 mA

RC

 

 

 

 

ÇMSD6100 USED BELOW IB 100 mA

 

SCOPE

TUT

 

 

 

 

 

 

 

 

 

V2

 

RB

 

 

APPROX.

 

 

 

 

+8 V

 

 

 

 

0

51

D1

É8 k

É120

V1

 

 

 

 

 

 

 

 

 

APPROX.

 

 

 

 

 

 

 

 

+ 4 V

 

 

 

 

 

 

 

-12 V

 

 

 

 

 

 

 

 

 

25 ms

 

 

 

 

 

tr, tf 10 ns

FOR td AND tr, D1 IS DISCONNECTED

DUTY CYCLE = 1%

AND V2 = 0

 

 

 

 

 

FOR NPN TEST CIRCUIT REVERSE ALL POLARITIES.

 

5

 

 

 

 

 

 

 

 

 

 

 

3

 

ts

 

 

 

 

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

(ÇÉs)μ

1

 

 

 

 

tf

 

 

 

 

 

0.7

 

 

 

 

 

 

 

 

 

 

t, TIME

0.5

 

 

 

 

 

 

 

 

 

 

0.3

 

 

 

 

t

 

td @ VBE(off) = 0 V

 

 

 

 

 

 

r

 

 

0.2

 

 

 

 

 

 

 

 

 

 

VCC = 30 V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.1

IC/IB = 250

 

 

PNP

 

 

 

 

 

 

IB1 = IB2

 

 

 

 

 

 

 

 

0.07

°

 

 

NPN

 

 

 

 

 

 

0.05

TJ = 25 C

 

 

 

 

 

 

 

 

 

 

0.1

0.2

0.3

0.5

0.7

1

2

3

5

7

10

IC, COLLECTOR CURRENT (AMP)

Figure 1. Switching Times Test Circuit

Figure 2. Typical Switching Times

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2

ON Semiconductor MJF122, MJF127 Service Manual

 

 

 

 

MJF122, MJF127

 

 

 

TA

TC

 

 

 

 

 

 

 

 

 

4

80

 

 

 

 

 

 

 

 

(WATTS)

3

60

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DISSIPATION

 

 

 

 

 

TC

 

 

 

 

2

40

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

, POWER

1

20

 

 

 

TA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

P

 

 

 

 

 

 

 

 

 

 

 

 

0

 

40

60

80

100

120

140

160

 

 

0

20

T, TEMPERATURE (°C)

Figure 3. Maximum Power Derating

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RESISTANCE (NORMALIZED)

0.5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

r(t), TRANSIENT THERMAL

0.3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.1

 

 

 

 

SINGLE PULSE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.05

 

 

 

 

RqJC(t) = r(t) RqJC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TJ(pk) - TC

= P(pk)

RqJC(t)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.03

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.02

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.01

 

 

 

1

2

 

5

 

 

 

 

 

 

 

 

 

 

 

 

10K

 

 

0.1

0.2

0.3

0.5

3

10

20

30

50

100

200

300

500

1K

2K

3K

5K

t, TIME (ms)

Figure 4. Thermal Response

 

10

 

 

 

 

 

 

 

 

(AMPS)

 

 

 

 

 

 

 

 

100 ms

5

 

 

 

 

 

 

 

 

3

TJ = 150°C

 

 

 

 

 

1Éms

 

CURRENT

 

 

 

 

 

 

 

2

 

 

 

 

5 ms

 

 

 

 

 

 

 

c

 

 

 

1

 

 

 

 

 

 

 

 

COLLECTOR

 

 

 

 

 

 

 

 

0.5

 

CURRENT LIMIT

 

 

 

 

 

SECONDARY BREAKDOWN

 

 

 

0.3

 

 

 

 

 

LIMIT

 

 

 

 

 

 

,

 

 

 

 

 

 

 

 

 

C

0.2

 

THERMAL LIMIT @

 

 

 

 

I

 

 

 

 

 

 

 

 

TC = 25°C (SINGLE PULSE)

 

 

 

 

0.1

2

3

5

10

20

30

50

100

 

1

 

 

VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)

 

Figure 5. Maximum Forward Bias

Safe Operating Area

There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.

The data of Figure 5 is based on TJ(pk) = 150_C; TC is variable depending on conditions. Secondary breakdown

pulse limits are valid for duty cycles to 10% provided TJ(pk) < 150_C. TJ(pk) may be calculated from the data in Figure 4. At high case temperatures, thermal limitations will reduce

the power that can be handled to values less than the limitations imposed by secondary breakdown.

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