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INTEGRATED CIRCUITS
Standard Card IC
MF1 IC S50
Functional Specification
Product Specification |
July 1998 |
Revision 4.0 |
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Philips
Semiconductors
Contents |
Rev. 4.0 |
1998-07-24 |
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Contents |
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1 General Description ....................................................................................................... |
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1.1 |
Features of the MIFAREâ System.......................................................................................... |
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1.2 |
MF1 IC S50 Card IC: ............................................................................................................ |
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2 Functional Description .................................................................................................. |
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2.1 |
Block Description .................................................................................................................. |
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2.2 |
Antenna: ................................................................................................................................ |
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2.3 Communication scheme RWD ↔ Card .................................................................................. |
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2.4 |
Data Integrity......................................................................................................................... |
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2.5 |
Security ................................................................................................................................. |
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2.6 |
Memory Organisation and Access Conditions........................................................................ |
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2.6.1 Sector Trailer (Block 3): ................................................................................................. |
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2.6.2 Manufacturer Code (Block 0 of Sector 0) ....................................................................... |
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2.6.3 Data Block (Block 0 to 3 except "Block 0").................................................................... |
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2.6.4 Key management and Multi-functionality......................................................................... |
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2.7 |
Memory contents after IC test ............................................................................................... |
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2.7.1 Block 0 (manufacturer block):......................................................................................... |
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2.7.2 Data Blocks: ................................................................................................................... |
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2.7.3 Sector Trailers: ............................................................................................................... |
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3 Release Notes .............................................................................................................. |
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3.1 |
Serial Numbers...................................................................................................................... |
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3.2 Answer to SELECT command (ATS Code) .......................................................................... |
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MIFAREâ is a registered trademark of Philips Electronics N.V.
M01040.doc/RM |
Page 2 of 18 |
General Description |
Rev. 4.0 |
1998-07-24 |
1 General Description
The contactless MIFAREâ 1 S50 smart card IC has been especially tailored to meet the requirements of a payment card which can be used for ticketing systems in public transport and comparable applications. MIFAREâ 1 S50 IC is a true multi-application smart card IC with the functionality of a processor realised with hardwired logic.
Special emphasis has been placed on user convenience, speed, reliability, security against fraud and cost effectiveness.
User convenience and speed
A transaction between the card (card IC) and the reader defined by the system integrator or the service provider takes place when the card holder approximates the card to the reader. The permissible distance between antenna (target) and card is up to 100 mm free air. On the one hand, this enables users to carry out the transaction fast and conveniently. On the other, card holders decide in a distinct action whether they want a transaction to happen or not.
Philips has developed a high speed RF communication interface with 106 Kbaud data rate for MIFARE® . Due to this high speed a complete ticketing transaction can be handled in less than 0.1 seconds. Thus, the MIFAREâ card user needs not to stop at the reader target (antenna) leading to a high throughput at gates and reduced boarding times onto busses.
Additional user comfort is added, since MIFAREâ cards typically have the size of a credit card and do not have to be taken out of the wallet during the transaction, even if there are coins in the wallet.
Anticollision
Basically, if more than one card enters the operating field, which is very likely to happen, the fast anticollision algorithm prevents that data transmitted between the different cards and the target is being confused. Cards can be selected individually. An ongoing transaction with a selected card is not corrupted by cards remaining in the field or cards moved into or out of the field. Possible data corruption caused by more than one card in the field or fraud are avoided.
For example, if MIFAREâ card users have more than one MIFAREâ card in their wallet, the anticollision algorithm enables the system to select the appropriate card for the transaction.
Security
Mutual challenge and response authentication, data ciphering and message authentication checks protect the system from any kind of fraud and make it attractive for electronic purse applications. These mechanisms are carried out very fast and add only little to transaction time. Serial numbers which can not be altered guarantee uniqueness of the cards.
Multi-functionality
The multifunctional memory structure of MIFAREâ 1 S50 cards IC allows the use of the card in multi-application systems. The different applications are securely separated by user definable key sets and access conditions.
Reliability
High reliability of the system is achieved by using solid state components without any moving mechanical parts. The MIFAREâ cards are passive, i.e. they are working without battery. Further, the extremely simple construction of a card which consist only of a coil with few turns and a chip embedded in plastic does its share to accomplish this. In addition,
the contactless technology avoids that contacts become worn out and reduces risk and cost of vandalism.
M01040.doc/RM |
Page 3 of 18 |
General Description Rev. 4.0 1998-07-24
1.1 Features of the MIFAREâ System
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Operating frequency: |
13.56 MHz |
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High speed: |
Baudrate 106 kBaud |
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Anticollision: |
The ability to handle more than one card in the field at the same |
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time. |
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Operating distance: |
up to 100mm (depending on antenna geometry) |
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to allow convenient and fast transaction |
∙Half duplex communication protocol using handshake
∙Data integrity via contactless communication link by
∙Anticollision
∙16 Bit CRC per block
∙16 Bit Parity per block (one per Byte)
∙Bit count checking
∙Bit coding to distinguish between "1", "0", and no information
∙Channel monitoring (Protocol sequence and bit stream analysis)
∙Multi-Card-operation supporting:
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Anticollision: |
allows the handling of more than one card in the field at the same |
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time; |
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inhibits accidental read or write and data corruption due to more |
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than one card in the field |
∙ Dynamic read + write: |
during communication with one card other cards may enter or |
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leave the RF field |
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Fast anticollision protocol: |
an increase of only 1.0 ms of the total transaction time |
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for each additional card |
1.2 MF1 IC S50 Card IC:
∙ State of the art chip technology: |
high speed CMOS EEPROM process |
∙Single chip construction with no external components besides a simple coil
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is required for card. |
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No battery |
Contactless energy and data transmission |
Security
∙Mutual three pass authentication (ISO/IEC DIS9798-2)
∙Data encryption on RF-channel with replay attack protection
∙Individual key set per sector (per application) to support multi-application with key hierarchy
∙Unique card serial number
∙Transport key
M01040.doc/RM |
Page 4 of 18 |
General Description |
Rev. 4.0 |
1998-07-24 |
Multi-application memory
∙8 KBit EEPROM memory, no battery,
∙Organised in securely separated 16 sectors supporting multi-application use.
∙Each sector consists of 4 blocks.
∙A block is the smallest part to be addressed and consists of 16 bytes.
∙Each sector has its own secret file for a set of keys for systems using key hierarchies.
∙Access to memory zones are flexible user definable by a variety of access conditions.
∙Arithmetic capability: increase and decrease
∙Data retention of 10 years.
∙write endurance 100.000 cycles
Typical Transaction Time |
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∙ Identification of a card |
3 ms (Start-up, Answer to Request, Anticollision, Select) |
∙ Read Block (16 Bytes) |
2.5 ms (excl. Authentication) |
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4.5 ms (incl. Authentication) |
∙ Write Block + Control Read |
min 8.5 ms (excl. Authentication) |
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min 10.5 ms (incl. Authentication) |
∙ Typical Ticketing Transaction |
< 100 ms |
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Identification of card + |
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6 Blocks read (768 bit, 2 Sector Authentication) + |
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2 Blocks write (256 bit) with Backup Management |
∙Transaction possible with moving card
Delivery options
The MIFAREâ 1 standard card IC (MF1 IC S50) is available as:
Delivery Option |
Related ADDENDUM |
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Chip Card Module |
ADDENDUM MIFAREâ |
MF1MOA2S50 |
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Contactless Chip Card Module Specification |
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Die on 5“ Wafer |
ADDENDUM MIFAREâ |
Standard Card IC MF1ICS50 03 |
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Wafer Specification |
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Die on 6“ Wafer |
ADDENDUM MIFAREâ |
Standard Card IC MF1ICS50 04 |
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Wafer Specification |
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M01040.doc/RM |
Page 5 of 18 |
Functional Description |
Rev. 4.0 |
1998-07-24 |
2 Functional Description
2.1 Block Description
MIFARE MF1ICS50 CARD IC
RF-Interface |
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Clock |
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Data |
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Modulator |
Demodulator |
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Voltage |
POR |
Regulator |
E²POR |
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Energy |
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Digital Section |
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ATR |
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Control |
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Arithmetic |
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Unit |
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Collision |
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E²-Memory |
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Select |
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Inter |
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Application |
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Authentication |
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Crypto |
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& Access Control |
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Unit |
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The electronic unit of a card comprises just an antenna (coil) and the IC (MIFAREâ 1 MF1ICS50) and no further external components.
2.2 Antenna:
The card antenna consists of a few windings and thus, it is very suitable for integration into an ISO card. (refer to the document MIFAREâ Card IC Coil Design Guide).
M01040.doc/RM |
Page 6 of 18 |
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