NSC LP3981IMMX-3.3, LP3981IMMX-3.03, LP3981ILD-3.3, LP3981ILD-3.03, LP3981ILD-2.5 Datasheet

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March 2003

LP3981

Micropower, 300mA Ultra Low-Dropout CMOS Voltage

Regulator

General Description

The LP3981’s performance is optimized for battery powered systems to deliver ultra low noise, extremely low dropout voltage and low quiescent current. Regulator ground current increases only slightly in dropout, further prolonging the battery life.

Power supply rejection is better than 60 dB at low frequencies. This high power supply rejection is maintained down to lower input voltage levels common to battery operated circuits.

The device is ideal for mobile phone and similar battery powered wireless applications. It provides up to 300 mA, from a 2.5V to 6V input, consuming less than 1µA in disable mode.

The LP3981 is available in MSOP-8 package. For LP3981 in LLP-6 package, contact NSC sales offices. Performance is specified for −40˚C to +125˚C temperature range. The device available in the following output voltages; 2.5V, 2.7V, 2.8V, 2.83V, 3.0V, 3.03V and 3.3V as standard. Other output options can be made available, please contact your local NSC sales office.

Key Specifications

n2.5 to 6.0V input range

n300mA guaranteed output

n60dB PSRR at 1kHz

n1µA quiescent current when shut down

nFast Turn-On time: 120 µs (typ.) with CBYPASS = 0.01uF

n132mV typ dropout with 300mA load

n35µVrms output noise over 10Hz to 100kHz

n−40 to +125˚C junction temperature range for operation

n2.5V, 2.7V, 2.8V, 2.83V, 3.0V, 3.03V, and 3.3V outputs standard

Features

nSmall, space saving MSOP-8

nLow Thermal Resistance in LLP-6 package gives excellent power capability

nLogic controlled enable

nStable with ceramic and high quality tantalum capacitors

nFast turn-on

nThermal shutdown and short-circuit current limit

Applications

nCDMA cellular handsets

nWideband CDMA cellular handsets

nGSM cellular handsets

nPortable information appliances

nTiny 3.3V ± 5% to 2.5V, 300mA converter

Typical Application Circuit

20020302

Note: Pin Numbers in parenthesis indicate LLP-6 package.

Regulator Voltage CMOS Dropout-Low Ultra 300mA Micropower, LP3981

© 2003 National Semiconductor Corporation

DS200203

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NSC LP3981IMMX-3.3, LP3981IMMX-3.03, LP3981ILD-3.3, LP3981ILD-3.03, LP3981ILD-2.5 Datasheet

LP3981

Block Diagram

 

 

 

 

 

20020301

Pin Descriptions

 

 

 

 

 

 

 

 

 

 

Name

 

MSOP-8

LLP-6

Function

 

 

 

 

 

 

 

VEN

 

7

6

Enable Input Logic, Enable High

 

GND

 

5

4

Common Ground

 

 

 

 

 

 

 

VOUT

 

1

1

Output Voltage of the LDO

 

VIN

 

2

2

Input Voltage of the LDO

 

Bypass

 

6

5

Optional bypass capacitor for noise

 

 

 

 

 

reduction

 

 

 

 

 

 

 

VOUT-SENSE

 

4

3

Output. Voltage Sense Pin. Should

 

 

 

 

 

be connected to VOUT for proper

 

 

 

 

 

operation.

 

 

 

 

 

 

 

N.C

 

3, 8

 

 

 

 

 

 

 

 

Connection Diagrams

 

 

LLP-6 Package

 

MSOP-8 Package

 

 

 

20020370

20020307

Top View

See NS Package Number LDC06D

Top View

 

See NS Package Number MUA008AE

 

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Ordering Information

For LLP-6 Package

Output

Grade

LP3981 Supplied as 1000

LP3981 Supplied as 4500

Package Marking

Voltage (V)

Units, Tape and Reel

Units, Tape and Reel

 

 

 

 

 

 

 

2.5

STD

LP3981ILD-2.5

LP3981ILDX-2.5

LO1UB

 

 

 

 

 

2.7

STD

LP3981ILD-2.7

LP3981ILDX-2.7

LO1VB

 

 

 

 

 

2.8

STD

LP3981ILD-2.8

LP3981ILDX-2.8

LO1ZB

 

 

 

 

 

2.83

STD

LP3981ILD-2.83

LP3981ILDX-2.83

L01SB

 

 

 

 

 

3.0

STD

LP3981ILD-3.0

LP3981ILDX-3.0

L017B

 

 

 

 

 

3.03

STD

LP3981ILD-3.03

LP3981ILDX-3.03

LO1YB

 

 

 

 

 

3.3

STD

LP3981ILD -3.3

LP3981ILDX-3.3

LO1XB

 

 

 

 

 

For MSOP-8 Package

Output

Grade

LP3981 Supplied as 1000

LP3981 Supplied as 3500

Package Marking

Voltage (V)

Units, Tape and Reel

Units, Tape and Reel

 

 

 

 

 

 

 

2.5

STD

LP3981IMM-2.5

LP3981IMMX-2.5

LFKB

 

 

 

 

 

2.7

STD

LP3981IMM-2.7

LP3981IMMX-2.7

LFLB

 

 

 

 

 

2.8

STD

LP3981IMM-2.8

LP3981IMMX-2.8

LFTB

 

 

 

 

 

2.83

STD

LP3981IMM-2.83

LP3981IMMX-2.83

LDUB

 

 

 

 

 

3.0

STD

LP3981IMM-3.0

LP3981IMMX-3.0

LF3B

 

 

 

 

 

3.03

STD

LP3981IMM-3.03

LP3981IMMX-3.03

LFPB

 

 

 

 

 

3.3

STD

LP3981IMM-3.3

LP3981IMMX-3.3

LFNB

 

 

 

 

 

*Please contact factory regarding the availability of voltage options not listed here.

LP3981

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LP3981

Absolute Maximum Ratings (Notes 1,

2)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.

VIN, VEN

−0.3 to 6.5V

VOUT, VOUT-SENSE

−0.3 to VIN + 0.3,

 

Max 6.5V

Junction Temperature

150˚C

Storage Temperature

−65˚C to +150˚C

Lead Temp.

 

Pad Temp.

 

Power Dissipation (Note 3)

 

θJA (MSOP-8)

210˚C/W

θJA (LLP-6)

50˚C/W

Maximum Power Dissipation at 25˚C

 

MSOP-8

595mW

LLP-6

2.5W

ESD Rating(Note 4)

 

Human Body Model

2kV

Machine Model

200V

Operating Ratings (Notes 1, 2)

VIN

2.7 to 6V

VEN

0 to VIN

Junction Temperature

−40˚C to +125˚C

Maximum Power Dissipation (Note 5)

 

MSOP-8

476mW

LLP-6

2.0W

Electrical Characteristics

Unless otherwise specified: VEN = 1.2V, VIN = VOUT + 0.5V, CIN = 2.2 µF, CBP = 0.033 µF, IOUT = 1mA, COUT = 2.2 µF. Typical values and imits appearing in standard typeface are for TJ = 25˚C. Limits appearing in boldface type apply over the entire

junction temperature range for operation, −40˚C to +125˚C. (Notes 6, 7)

Symbol

Parameter

Conditions

Typ

 

Limit

Units

 

 

 

Min

 

Max

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Output Voltage

 

 

−2

 

2

% of

 

Tolerance

 

 

−3

 

3

VOUT(nom)

 

 

VIN = VOUT + 0.5V to 6.0V, TA <

0.005

−0.1

 

0.1

%/V

∆VOUT

Line Regulation Error

+85˚C

 

 

 

 

 

 

 

 

 

 

 

VIN = VOUT + 0.5V to 6.0V, TJ ≤125˚C

 

−0.2

 

0.2

%/V

 

Load Regulation Error

IOUT = 1 mA to 300 mA

0.0003

 

 

0.005

%/mA

 

(Note 8)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIN = VOUT(nom) + 1V,

50

 

 

 

 

 

 

f = 1 kHz,

 

 

 

 

 

PSRR

Power Supply Rejection Ratio

IOUT = 50 mA (Figure 2)

 

 

 

 

dB

(Note 10)

VIN = VOUT(nom) + 1V,

55

 

 

 

 

 

 

 

 

 

 

f = 10 kHz,

 

 

 

 

 

 

 

IOUT = 50 mA (Figure 2)

 

 

 

 

 

IQ

Quiescent Current

VEN = 1.2V, IOUT = 1 mA

70

 

 

120

 

 

 

VEN = 1.2V, IOUT = 1 to 300 mA,

170

 

 

210

µA

 

 

VOUT = 2.5V(Note 12)

 

 

 

 

 

 

 

 

 

 

 

 

 

VEN = 0.4V

0.003

 

 

1.5

 

 

 

IOUT = 1 mA

0.5

 

 

5

 

 

Dropout Voltage (Note 9)

IOUT = 200 mA

88

 

 

133

mV

 

 

IOUT = 300 mA

132

 

 

200

 

ISC

Short Circuit Current Limit

Output Grounded

600

 

 

 

mA

 

 

(Steady State)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

en

Output Noise Voltage

BW = 10 Hz to 100 kHz,

35

 

 

 

µVrms

 

 

CBP = 0.033µF

 

 

 

 

 

 

 

 

 

 

TSD

Thermal Shutdown Temperature

 

160

 

 

 

˚C

 

 

 

 

 

 

 

Thermal Shutdown Hysteresis

 

20

 

 

 

˚C

 

 

 

 

 

 

 

 

 

 

 

 

 

IOUT(PK)

Peak Output Current

VOUT ≥ VOUT (nom) - 5%

455

300

 

 

 

IEN

Maximum Input Current at VEN

VEN = 0 and VIN

0.001

 

 

 

µA

VIL

Logic Low Input threshold

VIN = 2.7 to 6.0V

 

 

 

0.4

V

VIH

Logic High Input threshold

VIN = 2.7 to 6.0V

 

1.4

 

 

V

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