Control IC for Switched-Mode Power Supplies |
TDA 4605-3 |
using MOS-Transistor |
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Bipolar IC |
Features
●Fold-back characteristics provides overload protection for external components
●Burst operation under secondary short-circuit condition
implemented |
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● Protection against open or a short of the control loop |
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● Switch-off if line voltage is too low (undervoltage switch-off) |
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● Line voltage depending compensation of fold-back point |
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● Soft-start for quiet start-up without noise generated by the |
P-DIP-8-1 |
transformer |
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●Chip-over temperature protection implemented (thermal shutdown)
●On-chip ringing suppression circuit against parasitic oscillations of the transformer
●AGC-voltage reduction at low load
Type |
Ordering Code |
Package |
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TDA 4605-3 |
Q67000-A5066 |
P-DIP-8-1 |
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The IC TDA 4605-3 controls the MOS-power transistor and performs all necessary control and protection functions in free running flyback converters. Because of the fact that a wide load range is achieved, this IC is applicable for consumer as well as industrial power supplies.
The serial circuit and primary winding of the flyback transformer are connected in series to the input voltage. During the switch-on period of the transistor, energy is stored in the transformer. During the switch-off period the energy is fed to the load via the secondary winding. By varying switch-on time of the power transistor, the IC controls each portion of energy transferred to the secondary side such that the output voltage remains nearly independent of load variations. The required control information is taken from the input voltage during the switch-on period and from a regulation winding during the switch-off period. A new cycle will start if the transformer has transferred the stored energy completely into the load.
Semiconductor Group |
74 |
06.94 |
TDA 4605-3
In the different load ranges the switched-mode power supply (SMPS) behaves as follows:
No load operation
The power supply is operating in the burst mode at typical 20 to 40 kHz. The output voltage can be a little bit higher or lower than the nominal value depending of the design of the transformer and the resistors of the control voltage divider.
Nominal operation
The switching frequency is reduced with increasing load and decreasing AC-voltage. The output voltage is only dependent on the load.
Overload point
Maximal output power is available at this point of the output characteristic.
Overload
The energy transferred per operation cycle is limited at the top. Therefore the output voltages declines by secondary overloading.
Semiconductor Group |
75 |
TDA 4605-3
Pin Definitions and Functions
Pin No. |
Function |
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1 |
Information Input Concerning Secondary Voltage. By comparing the |
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regulating voltage - obtained trom the regulating winding of the transformer - with |
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the internal reference voltage, the output impulse width on pin 5 is adjusted to the |
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load of the secondary side (normal, overload, short-circuit, no load). |
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2 |
Information Input Regarding the Primary Current. The primary current rise in |
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the primary winding is simulated at pin 2 as a voltage rise by means of external |
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RC-element. When a voltage level is reached thats derived from the regulating |
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voltage at pin 1, the output impulse at pin 5 is terminated. The RC-element serves |
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to set the maximum power at the overload point set. |
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3 |
Input for Primary Voltage Monitoring: In the normal operation V3 is moving |
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between the thresholds V3H and V3L (V3H > V3 > V3L). |
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V3 < V3L: SMPS is switched OFF (line voltage too low). |
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V3 > V3H : Compensation of the overload point regulation (controlled by pin 2) |
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starts at V3H : V3L = 1.7. |
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4 |
Ground |
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5 |
Output: Push-pull output provides ± 1 A for rapid charge and discharge of the |
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gate capacitance of the power MOS-transistor. |
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6 |
Supply Voltage Input: A stable internal reference voltage VREF is derived from |
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the supply voltage also the switching thresholds V6A , V6E , V6 max and V6 min for |
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the supply voltage detector. If V6 > V6E then VREF is switched on and swiched off |
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when V6 < V6A . In addition the logic is only enable for V6 min < V6 < V6 max. |
7 |
Input for Soft-Start. Start-up will begin with short pulses by connecting a |
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capacitor from pin 7 to ground. |
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8 |
Input for the Oscillation Feedback. After starting oscillation, every zero |
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transition of the feedback voltage (falling edge) through zero (falling edge) |
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triggers an output pulse at pin 5. The trigger threshold is at + 50 mV typical. |
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Semiconductor Group |
76 |
TDA 4605-3 |
Block Diagram
Semiconductor Group |
77 |
TDA 4605-3
Circuit Description
Application Circuit
The application circuit shows a flyback converter for video recorders with an output power rating of 70 W. The circuit is designed as a wide-range power supply for AC-line voltages of 180 to 264 V. The AC-input voltage is rectified by the bridge rectifier GR1 and smoothed by C1 . The NTC limits the rush-in current.
In the period before the switch-on threshold is reached the IC is suppled via resistor R 1 ; during the start-up phase it uses the energy stored in C2 , under steady state conditions the IC receives its supply voltage from transformer winding n1 via diode D1. The switching transistor T1 is a BUZ 90. The parallel connected capacitor C3 and the inductance of primary winding n 2 determine the system resonance frequency. The R 2-C4-D2 circuitry limits overshoot peaks, and R 3 protects the gate of T1 against static charges.
During the conductive phase of the power transistor T1 the current rise in the primary winding depends on the winding inductance and the mains voltage. The network consisting of R 4-C5 is used to create a model of the sawtooth shaped rise of the collector current. The resulting control voltage is fed into pin 2 of the IC. The RC-time constant given by R 4-C5 must be designed that way that driving the transistor core into saturation is avoided.
The ratio of the voltage divider R 10/R 11 is fixing a voltage level threshold. Below this threshold the switching power supply shall stop operation because of the low mains voltage. The control voltage present at pin 3 also determines the correction current for the fold-back point. This current added to the current flowing through R 4 and represents an additional charge to C5 in order to reduce the turnon phase of T1. This is done to stabilize the fold-back point even under higher mains voltages.
Regulation of the switched-mode power supplies via pin 1. The control voltage of winding n1 during the off period of T1 is rectified by D3, smoothed by C6 and stepped down at an adjustable ratio by R 5 , R 6 and R 7 . The R 8-C7 network suppresses parasitic overshoots (transformer oscillation). The peak voltage at pin 2, and thus the primary peak current, is adjusted by the IC so that the voltage applied across the control winding, and hence the output voltages, are at the desired level.
When the transformer has supplied its energy to the load, the control voltage passes through zero. The IC detects the zero crossing via series resistors R 9 connected to pin 8. But zero crossings are also produced by transformer oscillation after T1 has turned off if output is short-circuited. Therefore the IC ignores zero crossings occurring within a specified period of time after T1 turn-off.
The capacitor C8 connected to pin 7 causes the power supply to be started with shorter pulses to keep the operating frequency outside the audible range during start-up.
On the secondary side, five output voltages are produced across winding n3 to n7 rectified by D4 to D8 and smoothed by C9 to C13 . Resistors R 12 , R 14 and R 19 to R 21 are used as bleeder resistors. Fusable resistors R 15 to R 18 protect the rectifiers against short circuits in the output circuits, which are designed to supply only small loads.
Semiconductor Group |
78 |
TDA 4605-3
Block Diagram
Pin 1
The regulating voltage forwarded to this pin is compared with a stable internal reference voltage VR in the regulating and overload amplifier. The output of this stage is fed to the stop comparator. If the control voltage is rather small at pin 1 an additional current is added by means of current source which is controlled according the level at pin 7. This additional current is virtually reducing the control voltage present at pin 1.
Pin 2
A voltage proportional to the drain current of the switching transistor is generated there by the external RC-combination in conjunction with the primary current transducer. The output of this transducer is controlled by the logic and referenced to the internal stable voltage V2B . If the voltage V2 exceeds the output voltage of the regulations amplifier, the logic is reset by the stop comparator and consequently the output of pin 5 is switched to low potential. Further inputs for the logic stage are the output for the start impulse generator with the stable reference potential VST and the supply voltage motor.
Pin 3
The down divided primary voltage applied there stabilizes the overload point. In addition the logic is disabled in the event of low voltage by comparison with the internal stable voltage VV in the primary voltage monitor block.
Pin 4
Ground
Pin 5
In the output stage the output signals produced by the logic are shifted to a level suitable for MOSpower transistors.
Pin 6
From the supply voltage V6 are derived a stable internal references VREF and the switching
threshold V6A , V6E , V6 max and V6 min for the supply voltage monitor. All references values (VR , V2B , VST) are derived from VREF . If V6 > VVE , the VREF is switched on and switched off when V6 < V 6A . In addition, the logic is released only for V6 min < V6 < V6 max .
Pin 7
The output of the overload amplifier is connected to pin 7. A load on this output causes a reduction in maximal impulse duration. This function can be used to implement a soft start, when pin 7 is connected to ground by a capacitor.
Semiconductor Group |
79 |
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