IP4220CZ6
Dual USB 2.0 integrated ESD protection to IEC 61000-4-2 level 4
Rev. 04 — 12 September 2005 |
Product data sheet |
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1.Product profile
The IP4220CZ6 is designed to protect I/O lines sensitive to capacitive load, such as USB 2.0, ethernet, DVI etc. from damage due to ElectroStatic Discharge (ESD). It incorporates four pairs of ultra-low capacitance rail-to-rail diodes plus an additional Zener diode to provide protection to signal and supply components from ESD voltages as high as ±8 kV contact discharge. Protection is supply voltage independent due to the rail-to-rail diodes being connected to the Zener diode. The IP4220CZ6 integrates four pairs of ultra-low capacitance rail-to-rail ESD protection diodes in a miniature 6-lead SOT457 package.
ESD IEC 61000-4-2 level 4, ±8 kV contact discharge compliant protection
Four pairs of ultra-low input capacitance (1 pF typ.) ESD rail-to-rail protection diodes
Low voltage clamping due to integrated Zener diode
Small 6 lead SO6 (SOT457) package
IEC 61000-4-5 15A Lightning (8/20 μs)
General-purpose downstream ESD protection for high frequency analog signal ports and high-speed serial data transmission ports in:
Cellular and PCS mobile handsets
PC-/notebook USB 2.0/IEEE1394 ports
DVI interfaces
Cordless telephones
Wireless data (WAN/LAN) systems
PDAs
HDMI
Philips Semiconductors |
IP4220CZ6 |
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Dual USB 2.0 integrated ESD protection |
Table 1: |
Pinning |
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Pin |
Description |
Simplified outline |
Symbol |
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1 |
ESD protection I/O 1 |
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2 |
GND |
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6 |
5 |
4 |
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3 |
ESD protection I/O 2 |
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4 |
ESD protection I/O 3 |
6 |
5 |
4 |
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5 |
Supply voltage VP |
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6 |
ESD protection I/O 4 |
1 |
2 |
3 |
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1 |
2 |
3 |
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001aac379 |
Table 2: Ordering information
Type number |
Package |
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Name |
Description |
Version |
IP4220CZ6 |
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plastic surface mounted package; 6 leads |
SOT457 |
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Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol |
Parameter |
Conditions |
Min |
Max |
Unit |
VI/O |
I/O DC input voltage |
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0 |
5.5 |
V |
Vesd |
electrostatic discharge; |
IEC 61000-4-2, level 4, contact |
−8 |
+8 |
kV |
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all pins |
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Tstg |
storage temperature |
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−55 |
+125 |
°C |
Table 4: |
Operating conditions |
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Symbol |
Parameter |
Conditions |
Min |
Typ |
Max |
Unit |
Tamb |
ambient temperature |
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−40 |
- |
+85 |
°C |
IP4220CZ6_4 |
© Koninklijke Philips Electronics N.V. 2005. All rights reserved. |
Product data sheet |
Rev. 04 — 12 September 2005 |
2 of 10 |
Philips Semiconductors |
IP4220CZ6 |
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Dual USB 2.0 integrated ESD protection |
Table 5: Characteristics
Tcase = 25 °C; unless otherwise specified.
Symbol |
Parameter |
Conditions |
Min |
Typ |
Max |
Unit |
CI/O(n) |
pin capacitance to |
VI/O(n) = 0 V; |
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1.0 |
- |
pF |
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ground, pins 1, 3, 4 and 6 |
f = 1 MHz; |
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VP = +3.0 V |
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IL(n) |
diode reverse leakage |
VI/O(n) = +3.0 V |
- |
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100 |
nA |
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current, pins 1, 3, 4 and 6 |
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to ground |
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Cd(Zener) |
Zener diode capacitance |
VI/O(n) = 0 V; |
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40 |
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pF |
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to ground, pin 5 to pin 2 |
f = 1 MHz; |
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VP = +3.0 V |
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VBR(Zener) |
Zener diode breakdown |
I = 1 mA |
6 |
- |
9 |
V |
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voltage, pin 5 to pin 2 |
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VF |
forward voltage |
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0.7 |
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V |
The IP4220CZ6 is optimized to protect, for example, two USB 2.0 ports from ESD. Each device is capable of protecting both USB data lines and the VBUS supply. A typical application is shown in Figure 1.
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VBUS |
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D+ |
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D− |
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GND |
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IP4220CZ6 |
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4 |
3 |
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USB 2.0 |
5 |
2 |
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IEEE1394 |
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CONTROLLER |
6 |
1 |
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VBUS |
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D+ |
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D− |
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GND |
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001aac380 |
Fig 1. Typical application of IP4220CZ6
IP4220CZ6_4 |
© Koninklijke Philips Electronics N.V. 2005. All rights reserved. |
Product data sheet |
Rev. 04 — 12 September 2005 |
3 of 10 |