CTLST CAT93C8634UI-45TE13, CAT93C8634UI-42TE13, CAT93C8634UI-30TE13, CAT93C8633UA-28TE13, CAT93C8633UA-25TE13 Datasheet

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CTLST CAT93C8634UI-45TE13, CAT93C8634UI-42TE13, CAT93C8634UI-30TE13, CAT93C8633UA-28TE13, CAT93C8633UA-25TE13 Datasheet

Advanced Information

CAT93CXXXX (1K-16K)

Supervisory Circuits with Microwire Serial CMOS E2PROM, Precision Reset Controller and Watchdog Timer

FEATURES

Watchdog Timer

Programmable Reset Threshold

Built-in Inadvertent Write Protection —V CC Lock Out

High Speed Operation: 3MHz

Low Power CMOS Technology

x 16 or x 8 Selectable Serial Memory

Self-Timed Write Cycle with Auto-Clear

Sequential Read

Fast Nonvolatile Write Cycle: 3ms Max

Active High or Low Reset Outputs —Precision Power Supply Voltage Monitoring —5V, 3.3V and 3V options

Hardware and Software Write Protection

Power-Up Inadvertant Write Protection

1,000,000 Program/Erase Cycles

100 Year Data Retention

Commercial, Industrial, and Automotive Temperature Ranges

2.7-6.0 Volt Operation

16 Byte Page Mode

DESCRIPTION

The CAT93CXXXX is a single chip solution to three popular functions of EEPROM memory, precision reset controller and watchdog timer. The serial EEPROM memory of the 93CXXXX can be configured either by 16bits or by 8-bits. Each register can be written (or read) by using the DI (or DO pin).

The reset function of the 93CXXXX protects the system

during brown out and power up/down conditions. During system failure the watchdog timer feature protects the microcontroller with a reset signal. Catalyst's advanced CMOS technology substantially reduces device power requirements. The 93CXXXX is available in 8-pin DIP, 8- pin TSSOP or 8-pin SOIC packages. It is designed to endure 1,000,000 program/erase cycles and has a data retention of 100 years.

PIN CONFIGURATION

BLOCK DIAGRAM

93CX61X

 

 

93CX62X

 

 

93CX63X

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CS

1

8

VCC

CS

 

 

1

8

 

VCC

CS

 

 

 

1

8

 

 

 

VCC

SK

2

7

RESET(RESET) SK

 

 

2

7

 

RESET(RESET)

SK

 

 

 

2

7

 

 

 

RESET

DI

3

6

ORG

DI

 

 

3

6

 

WDI

DI

 

 

3

6

 

 

 

RESET

 

 

 

 

 

 

 

 

DO

4

5

GND

DO

 

 

4

5

 

GND

DO

 

 

 

4

5

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PIN FUNCTIONS

Pin Name

Function

 

 

CS

Chip Select

 

 

RESET/RESET

Reset I/O

 

 

SK

Clock Input

 

 

DI

Serial Data Input

 

 

DO

Serial Data Output

 

 

VCC

+2.7 to 6.0V Power Supply

 

 

GND

Ground

 

 

ORG

Memory Organization

 

 

Note: When the ORG pin is connected to VCC, the X16 organiza tion is selected. When it is connected to ground, the X8 pin is selected. If the ORG pin is left unconnected, then an internal pullup device will select the X16 organization.

ORG

DI

CS

SK

VCC

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MEMORY ARRAY

 

 

ADDRESS

 

 

 

DECODER

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DATA

REGISTER

OUTPUT

BUFFER

MODE DECODE

LOGIC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CLOCK

 

 

 

 

 

DO

 

 

 

 

 

GENERATOR

 

 

 

 

 

 

 

 

 

RESET Controller

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

High

 

 

 

 

WATCHDOG

Precision

 

 

 

 

 

 

 

 

 

 

 

 

Vcc Monitor

 

 

 

 

 

 

 

 

WDI RESET/RESET

© 1998 by Catalyst Semiconductor, Inc.

9-85

Characteristics subject to change without notice

CAT93CXXXX

Advanced Information

ABSOLUTE MAXIMUM RATINGS*

COMMENT

Temperature Under Bias....................

–55°C to +125°C

Storage Temperature........................

–65°C to +150°C

Voltage on Any Pin with

 

 

Respect to Ground(1) ..............

–2.0V to +VCC + 2.0V

VCC with Respect to Ground..................

 

–2.0V to +7.0V

Package Power Dissipation

 

 

Capability (Ta = 25°C)1.0W.................................

 

1.0W

Lead Soldering Temperature (10 secs)

...............300°C

Output Short Circuit Current(2) ..........................

 

100mA

D.C. OPERATING CHARACTERISTICS

VCC = +2.7V to +6.0V, unless otherwise specified.

Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.

 

 

 

Limits

 

 

 

 

 

 

 

 

 

 

Symbol

Parameter

Min.

Typ.

Max.

Units

Test Conditions

 

 

 

 

 

 

 

ICC1

Power Supply Current

 

 

3

mA

fSK = 1MHz

 

(Write)

 

 

 

 

VCC = 5.0V

 

 

 

 

 

 

 

ICC2

Power Supply Current

 

 

1

mA

fSK = 1MHz

 

(Read)

 

 

 

 

VCC = 5.0V

 

 

 

 

 

 

 

ISB1

Power Supply Current

 

 

10

μA

CS = 0V

 

(Standby) (x8 Mode)

 

 

 

 

ORG=GND

 

 

 

 

 

 

 

ISB2

Power Supply Current

 

 

0

μA

CS=0V

 

(Standby) (x16Mode)

 

 

 

 

ORG=Float or VCC

 

 

 

 

 

 

 

ILI

Input Leakage Current

 

 

1

μA

VIN = 0V to VCC

 

 

 

 

 

 

 

ILO

Output Leakage Current

 

 

1

μA

VOUT = 0V to VCC,

 

(Including ORG pin)

 

 

 

 

CS = 0V

 

 

 

 

 

 

 

VIL1

Input Low Voltage

-0.1

 

0.8

V

4.5VVCC<5.5V

 

 

 

 

 

 

 

VIH1

Input High Voltage

2

 

VCC+1

V

 

VOL1

Output Low Voltage

 

 

0.4

V

4.5VVCC<5.5V

 

 

 

 

 

 

 

VOH1

Output High Voltage

2.4

 

 

 

IOL = 2.1mA

 

 

 

 

 

V

IOH = -400μA

 

 

 

 

 

 

 

Note:

(1)The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC voltage on output pins is VCC +0.5V, which may overshoot to VCC + 2.0V for periods of less than 20ns.

(2)Output shorted for no more than one second. No more than one output shorted at a time.

Stock No. 21084-01 2/98

9-86

 

Advanced Information CAT93CXXXX

RELIABILITY CHARACTERISTICS

Symbol

 

Parameter

 

Min.

 

Max.

 

Units

 

 

Reference Test Method

 

 

 

 

 

 

 

 

 

 

NEND(1)

 

Endurance

 

1,000,000

 

 

Cycles/Byte

 

MIL-STD-883, Test Method 1033

TDR(1)

 

Data Retention

 

100

 

 

 

Years

 

 

MIL-STD-883, Test Method 1008

VZAP(1)

 

ESD Susceptibility

 

2000

 

 

 

Volts

 

 

MIL-STD-883, Test Method 3015

ILTH(1)(3)

 

Latch-up

 

100

 

 

 

mA

 

 

JEDEC Standard 17

A.C. CHARACTERISTICS

 

 

 

 

 

 

 

 

 

 

 

VCC=2.7V to 6.0V unless otherwise specified.

 

 

 

 

 

 

 

 

 

 

Output Load is 1 TTL Gate and 100pF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Limits

 

 

 

 

 

 

 

 

 

 

 

VCC =

VCC =

 

 

 

 

 

 

 

 

 

 

 

2.7V -6V

4.5V-5.5V

 

 

Test

 

 

SYMBOL

 

PARAMETER

 

Min.

Max.

Min.

Max.

UNITS

Conditions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tCSS

 

CS Setup Time

 

250

 

 

50

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tCSH

 

CS Hold Time

 

0

 

 

0

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tDIS

 

DI Setup Time

 

250

 

 

50

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tDIH

 

DI Hold Time

 

250

 

 

50

 

 

ns

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tPD1

 

Output Delay to 1

 

 

0.5

 

 

0.1

 

μs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tPD0

 

Output Delay to 0

 

 

0.5

 

 

0.1

 

μs

CL = 100pF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tHZ(1)

 

Output Delay to High-Z

 

 

500

 

 

100

 

ns

 

 

 

 

 

 

 

 

 

 

tEW

 

Program/Erase Pulse Width

 

5

 

 

5

 

ms

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tCSMIN

 

Minimum CS Low Time

 

0.5

 

 

0.1

 

 

μs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tSKHI

 

Minimum SK High Time

0.5

 

 

0.1

 

 

μs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tSKLOW

 

Minimum SK Low Time

 

0.5

 

 

0.1

 

 

μs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tSV

 

Output Delay to Status Valid

 

0.5

 

 

0.1

 

μs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SKMAX

 

Maximum Clock Frequency

DC

1000

DC

3000

 

KHZ

 

 

 

Power-Up Timing(1)(2)

Symbol

Parameter

 

 

Max.

Units

 

 

 

 

 

 

 

 

tPUR

Power-up to Read Operation

 

 

1

 

ms

tPUW

Power-up to Write Operation

 

 

1

 

ms

CAPACITANCE TA = 25°C, f = 1.0 MHz, VCC = 5V

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

 

Test

Max.

Units

 

Conditions

 

 

 

 

 

 

 

 

CI/O(1)

 

Input/Output Capacitance

8

 

pF

 

VI/O = 0V

CIN(1)

 

Input Capacitance

6

 

pF

 

VIN = 0V

Note:

(1)This parameter is tested initially and after a design or process change that affects the parameter.

(2)tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated.

(3)Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to VCC +1V.

9-87

Stock No. 21084-01 2/98

 

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