CTLST CAT28C17AK-20T, CAT28C17AJI-20T, CAT28C17AJA-20T, CAT28C17AJ-20T, CAT28C17API-20T Datasheet

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CAT28C17A

16K-Bit CMOS PARALLEL E2PROM

FEATURES

■Fast Read Access Times: 200 ns

■Low Power CMOS Dissipation:

–Active: 25 mA Max. –Standby: 100μA Max.

■Simple Write Operation:

–On-Chip Address and Data Latches –Self-Timed Write Cycle with Auto-Clear

■Fast Write Cycle Time: 10ms Max

■End of Write Detection:

–DATA Polling –RDY/BSY Pin

■Hardware Write Protection

■CMOS and TTL Compatible I/O

■10,000 Program/Erase Cycles

■10 Year Data Retention

■Commercial,Industrial and Automotive Temperature Ranges

DESCRIPTION

The CAT28C17A is a fast, low power, 5V-only CMOS parallel E2PROM organized as 2K x 8-bits. It requires a simple interface for in-system programming. On-chip address and data latches, self-timed write cycle with auto-clear and VCC power up/down write protection eliminate additional timing and protection hardware. DATA Polling and a RDY/BSY pin signal the start and end of the self-timed write cycle. Additionally, the CAT28C17A features hardware write protection.

The CAT28C17A is manufactured using Catalyst’s advanced CMOS floating gate technology. It is designed to endure 10,000 program/erase cycles and has a data retention of 10 years. The device is available in JEDEC approved 28-pin DIP and SOIC or 32-pin PLCC packages.

BLOCK DIAGRAM
A4–A10	ADDR. BUFFER	ROW	2,048 x 8
A4–A10	& LATCHES	DECODER	E2PROM
			ARRAY
VCC	INADVERTENT	HIGH VOLTAGE
VCC	WRITE	GENERATOR
	PROTECTION
CE	CONTROL
OE	CONTROL
WE	LOGIC
WE			I/O BUFFERS
			I/O BUFFERS
	TIMER	DATA POLLING
	TIMER	& RDY/BUSY
		& RDY/BUSY	I/O0–I/O7
			I/O0–I/O7
A0–A3	ADDR. BUFFER	COLUMN
A0–A3	& LATCHES	COLUMN
	& LATCHES	DECODER
		DECODER
RDY/BUSY

5091 FHD F02

© 1998 by Catalyst Semiconductor, Inc.	Doc. No. 25034-00 2/98
Characteristics subject to change without notice	1

CAT28C17A

PIN CONFIGURATION

DIP Package (P)				SOIC Package (J,K)
RDY/BUSY	1	28	VCC
				RDY/BUSY	1	28	VCC




NC	2	27	WE	NC	2	27	WE

A7	3	26	NC	A7	3	26	NC





A6	4	25	A8	A6	4	25	A8



A5	5	24	A9	A5	5	24	A9



A4	6	23	NC	A4	6	23	NC



A3	7	22	OE	A3	7	22	OE



A2	8	21	A10	A2	8	21	A10



A1	9	20	CE	A1	9	20	CE



A0	10	19	I/O7	A0	10	19	I/O7



I/O0	11	18	I/O6	I/O0	11	18	I/O6



I/O1	12	17	I/O5	I/O1	12	17	I/O5



I/O2	13	16	I/O4	I/O2	13	16	I/O4



VSS	14	15	I/O3	VSS	14	15	I/O3

PLCC Package (N)

	A	NC	RDY/BUSY	NC	V	WE	NC
	7				CC
	4	3	2	1	32 31 30
A6	5						29	A8
A5	6						28	A9
A4	7						27	NC
A3	8						26	NC
A2	9		TOP VIEW				25	OE
A1	10						24	A10
A0	11						23	CE
NC	12						22	I/O7
I/O0	13						21	I/O6

14 15 16 17 18 19 20

PIN FUNCTIONS

Pin Name

Function

I/O

A0–A10

Address Inputs

5091 FHD F01

I/O0–I/O7

Data Inputs/Outputs

RDY/BUSY

Ready/BUSY Status

Chip Enable

Output Enable

Write Enable

VCC

5V Supply

VSS

Ground

No Connect

MODE SELECTION

Mode

I/O

Power

Read

DOUT

ACTIVE

Byte Write

Controlled)

DIN

ACTIVE

(WE

Byte Write

Controlled)

DIN

ACTIVE

(CE

Standby, and Write Inhibit

High-Z

STANDBY

Read and Write Inhibit

High-Z

ACTIVE

CAPACITANCE TA = 25°C, f = 1.0 MHz, VCC = 5V

Symbol

Test

Max.

Units

Conditions

CI/O(1)

Input/Output Capacitance

VI/O = 0V

CIN(1)

Input Capacitance

VIN = 0V

Note:

(1) This parameter is tested initially and after a design or process change that affects the parameter.

Doc. No. 25034-00 2/98	2

CAT28C17A

ABSOLUTE MAXIMUM RATINGS*

*COMMENT

Temperature Under Bias .................	–55°C to +125°C
Storage Temperature .......................	–65°C to +150°C
Voltage on Any Pin with
Respect to Ground(2) ...........	–2.0V to +VCC + 2.0V
VCC with Respect to Ground ...............		–2.0V to +7.0V
Package Power Dissipation
Capability (Ta = 25°C)...................................		1.0W
Lead Soldering Temperature (10 secs)		............ 300°C
Output Short Circuit Current(3) ........................		100 mA

RELIABILITY CHARACTERISTICS

Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.

Symbol	Parameter	Min.	Max.	Units	Test Method

NEND(1)	Endurance	10,000		Cycles/Byte	MIL-STD-883, Test Method 1033
TDR(1)	Data Retention	10		Years	MIL-STD-883, Test Method 1008
VZAP(1)	ESD Susceptibility	2000		Volts	MIL-STD-883, Test Method 3015
ILTH(1)(4)	Latch-Up	100		mA	JEDEC Standard 17

D.C. OPERATING CHARACTERISTICS

VCC = 5V ±10%, unless otherwise specified.

			Limits

Symbol	Parameter	Min.	Typ.	Max.	Units			Test Conditions

ICC	VCC Current (Operating, TTL)			35	mA			=		= VIL,
ICC	VCC Current (Operating, TTL)			35	mA		CE	=	OE	= VIL,
						f = 1/tRC min, All I/O’s Open

ICCC(5)	VCC Current (Operating, CMOS)			25	mA			=		= VILC,
ICCC(5)	VCC Current (Operating, CMOS)			25	mA		CE	=	OE	= VILC,
						f = 1/tRC min, All I/O’s Open

ISB	VCC Current (Standby, TTL)			1	mA			= VIH, All I/O’s Open
ISB	VCC Current (Standby, TTL)			1	mA		CE	= VIH, All I/O’s Open

ISBC(6)	VCC Current (Standby, CMOS)			100	μA			= VIHC,
ISBC(6)	VCC Current (Standby, CMOS)			100	μA		CE	= VIHC,
						All I/O’s Open

ILI	Input Leakage Current	–10		10	μA	VIN = GND to VCC

ILO	Output Leakage Current	–10		10	μA	VOUT = GND to VCC,
						CE		= VIH

VIH(6)	High Level Input Voltage	2		VCC +0.3	V
VIL(5)	Low Level Input Voltage	–0.3		0.8	V
VOH	High Level Output Voltage	2.4			V	IOH = –400μA

VOL	Low Level Output Voltage			0.4	V	IOL = 2.1mA

VWI	Write Inhibit Voltage	3.0			V

Note:

(1)This parameter is tested initially and after a design or process change that affects the parameter.

(2)The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20 ns.

(3)Output shorted for no more than one second. No more than one output shorted at a time.

(4)Latch-up protection is provided for stresses up to 100mA on address and data pins from –1V to VCC +1V.

(5)VILC = –0.3V to +0.3V.

(6)VIHC = VCC –0.3V to VCC +0.3V.

3	Doc. No. 25034-00 2/98

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