CAT64LC10/20/40
1K/2K/4K-Bit SPI Serial E2PROM
FEATURES
■SPI Bus Compatible
■Low Power CMOS Technology
■2.5V to 6.0V Operation
■Self-Timed Write Cycle with Auto-Clear
■Hardware Reset Pin
■Hardware and Software Write Protection
■Commercial, Industrial and Automotive Temperature Ranges
■Power-Up Inadvertant Write Protection
■RDY/BSY Pin for End-of-Write Indication
■1,000,000 Program/Erase Cycles
■100 Year Data Retention
DESCRIPTION
The CAT64LC10/20/40 is a 1K/2K/4K-bit Serial E2PROM which is configured as 64/128/256 registers by 16 bits. Each register can be written (or read) serially by using the DI (or DO) pin. The CAT64LC10/20/40 is manufactured using Catalyst’s advanced CMOS E2PROM float-
ing gate technology. It is designed to endure 1,000,000 program/erase cycles and has a data retention of 100 years. The device is available in 8-pin DIP or SOIC packages.
PIN CONFIGURATION
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DIP Package (P) |
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SOIC Package (J) |
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SOIC Package (S) |
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1 |
8 |
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1 |
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CS |
VCC |
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RDY/BUSY |
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RESET |
CS |
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VCC |
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2 |
7 |
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7 |
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SK |
RDY/BUSY |
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VCC |
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GND |
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SK |
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RDY/BUSY |
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3 |
6 |
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6 |
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6 |
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DI |
RESET |
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CS |
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DO |
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DI |
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RESET |
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DO |
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GND |
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SK |
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5 |
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DI |
DO |
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4 |
5 |
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GND |
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5064 FHD F01 |
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PIN FUNCTIONS |
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BLOCK DIAGRAM |
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VCC |
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GND |
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Pin Name |
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Function |
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Chip Select |
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CS |
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SK |
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Clock Input |
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MEMORY ARRAY |
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ADDRESS |
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DI |
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Serial Data Input |
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64/128/256 x 16 |
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DECODER |
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DO |
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Serial Data Output |
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VCC |
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+2.5V to +6.0V Power Supply |
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DATA |
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GND |
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Ground |
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DI |
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REGISTER |
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OUTPUT |
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RESET |
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Reset |
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BUFFER |
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RDY/BUSY |
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Ready/BUSY Status |
RESET |
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MODE DECODE |
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LOGIC |
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CS |
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SK |
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CLOCK |
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DO RDY/BUSY |
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GENERATOR |
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64LC10/20/40 F02 |
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© 1998 by Catalyst Semiconductor, Inc. |
1 |
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Doc. No. 25057-00 3/98 SPI-1 |
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Characteristics subject to change without notice |
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CAT64LC10/20/40
ABSOLUTE MAXIMUM RATINGS* |
*COMMENT |
Temperature Under Bias ................. |
–55°C to +125°C |
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Storage Temperature ....................... |
–65°C to +150°C |
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Voltage on any Pin with |
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Respect to Ground(1) ............ |
–2.0V to +VCC +2.0V |
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VCC with Respect to Ground ............... |
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–2.0V to +7.0V |
Package Power Dissipation |
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Capability (Ta = 25°C) ................................... |
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1.0W |
Lead Soldering Temperature (10 secs) |
............ 300°C |
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Output Short Circuit Current(2) ........................ |
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100 mA |
RELIABILITY CHARACTERISTICS
Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability.
Symbol |
Parameter |
Min. |
Max. |
Units |
Reference Test Method |
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NEND(3) |
Endurance |
1,000,000 |
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Cycles/Byte |
MIL-STD-883, Test Method 1033 |
TDR(3) |
Data Retention |
100 |
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Years |
MIL-STD-883, Test Method 1008 |
VZAP(3) |
ESD Susceptibility |
2000 |
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Volts |
MIL-STD-883, Test Method 3015 |
ILTH(3)(4) |
Latch-Up |
100 |
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mA |
JEDEC Standard 17 |
CAPACITANCE (TA = 25°C, f= 1.0 MHz, VCC =6.0V)
Symbol |
Test |
Max. |
Units |
Conditions |
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CI/O(3) |
Input/Output Capacitance (DO, RDY/BSY) |
8 |
pF |
VI/O = 0V |
CIN(3) |
Input Capacitance (CS, SK, DI, RESET) |
6 |
pF |
VIN = 0V |
Note:
(1)The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20 ns.
(2)Output shorted for no more than one second. No more than one output shorted at a time.
(3)This parameter is tested initially and after a design or process change that affects the parameter.
(4)Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to VCC +1V.
Doc. No. 25057-00 3/98 SPI-1 |
2 |
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CAT64LC10/20/40
D.C. OPERATING CHARACTERISTICS
VCC = +2.5V to +6.0V, unless otherwise specified.
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Limits |
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Sym. |
Parameter |
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Min. |
Typ. |
Max. |
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Test Conditions |
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ICC |
Operating Current |
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2.5V |
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0.4 |
mA |
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fSK = 250 kHz |
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EWEN, EWDS, READ |
6.0V |
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1 |
mA |
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fSK = 1 MHz |
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ICCP |
Program Current |
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2.5V |
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2 |
mA |
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6.0V |
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3 |
mA |
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ISB(1) |
Standby Current |
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0 |
μA |
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VIN = GND or VCC |
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CS |
= VCC |
ILI |
Input Leakage Current |
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2 |
μA |
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VIN = GND to VCC |
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ILO |
Output Leakage Current |
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10 |
μA |
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VOUT = GND to VCC |
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VIL |
Low Level Input Voltage, DI |
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–0.1 |
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VCC x 0.3 |
V |
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VIH |
High Level Input Voltage, DI |
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VCC x 0.7 |
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VCC + 0.5 |
V |
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VIL |
Low Level Input Voltage, |
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–0.1 |
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VCC x 0.2 |
V |
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CS, SK, RESET |
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VIH |
High Level Input Voltage, |
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VCC x 0.8 |
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VCC + 0.5 |
V |
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CS, SK, RESET |
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VOH(2) |
High Level Output Voltage |
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2.5V |
VCC – 0.3 |
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IOH = –10μA |
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6.0V |
VCC – 0.3 |
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V |
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IOH = –10μA |
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2.4 |
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IOH = –400μA |
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VOL(2) |
Low Level Output Voltage |
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2.5V |
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0.4 |
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IOL = 10μA |
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6.0V |
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0.4 |
V |
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IOL = 2.1mA |
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Note:
(1)Standby Current (ISB) = 0μA (<900nA)
(2)VOH and VOL spec applies to READY/BUSY pin also
3 |
Doc. No. 25057-00 3/98 SPI-1 |