Fairchild Semiconductor NM27C512QE90, NM27C512QE150, NM27C512QE120, NM27C512N150, NM27C512QE250 Datasheet

July 1998

NM27C512

524,288-Bit (64K x 8) High Performance CMOS EPROM

General Description

The NM27C512 is a high performance 512K UV Erasable Electrically Programmable Read Only Memory (EPROM). It is manufactured using Fairchild’s proprietary CMOS AMG™ EPROM technology for an excellent combination of speed and economy while providing excellent reliability.

The NM27C512 provides microprocessor-based systems storage capacity for portions of operating system and application software. Its 90 ns access time provides no wait-state operation with high-performance CPUs. The NM27C512 offers a single chip solution for the code storage requirements of 100% firmwarebased equipment. Frequently-used software routines are quickly executed from EPROM storage, greatly enhancing system utility.

The NM27C512 is configured in the standard JEDEC EPROM pinout which provides an easy upgrade path for systems which are currently using standard EPROMs.

The NM27C512 is one member of a high density EPROM Family which range in densities up to 4 Megabit.

Features

■High performance CMOS

—90 ns access time

■Fast turn-off for microprocessor compatibility

■Manufacturers identification code

■JEDEC standard pin configuration

—28-pin PDIP package

—32-pin chip carrier

—28-pin CERDIP package

Block Diagram

VCC

Data Outputs O0 - O7

GND

VPP

OE

Output Enable and

Chip Enable Logic

Output

CE/PGM

Buffers

Y Decoder

.

.

524,288-Bit

Cell Matrix

A0 - A15

Address

Inputs

.

X Decoder

. . . . .

.

DS010834-1

AMG is a trademark of WSI, Inc.

EPROM CMOS Performance High 8) x (64K Bit-524,288 NM27C512

© 1998 Fairchild Semiconductor Corporation

1

www.fairchildsemi.com

Connection Diagrams

27C080

27C040

27C020

27C010

27C256

DIP

27C256

27C010

27C020

27C040

27C080

A19

XX/VPP

XX/VPP

XX/VPP

NM27C512

VCC

VCC

VCC

VCC

A16

A16

A16

A16

A18

A18

VPP

XX/PGM

XX/PGM

A15

A15

A15

A15

A15

1

28

VCC

VCC

XX

A17

A17

A17

A12

A12

A12

A12

A12

A12

2

27

A14

A14

A14

A14

A14

A14

A7

A7

A7

A7

A7

A7

3

26

A13

A13

A13

A13

A13

A13

A6

A6

A6

A6

A6

A6

4

25

A8

A8

A8

A8

A8

A8

A5

A5

A5

A5

A5

A5

5

24

A9

A9

A9

A9

A9

A9

A4

A4

A4

A4

A4

A4

6

23

A11

A11

A11

A11

A11

A11

A3

A3

A3

A3

A3

VPP

A3

7

22

OE/VPP

OE/

OE

OE

OE

OE

A2

A2

A2

A2

A2

A2

8

21

A10

A10

A10

A10

A10

A10

A1

A1

A1

A1

A1

A1

9

20

CE/PGM

CE/PGM

CE

CE

CE/PGM

CE/PGM

A0

A0

A0

A0

A0

A0

10

19

O7

O7

O7

O7

O7

O7

O0

O0

O0

O0

O0

O0

11

18

O6

O6

O6

O6

O6

O6

O1

O1

O1

O1

O1

O1

12

17

O5

O5

O5

O5

O5

O5

O2

O2

O2

O2

O2

O2

13

16

O4

O4

O4

O4

O4

O4

GND

GND

GND

GND

GND

GND

14

15

O3

O3

O3

O3

O3

O3

DS010834-2

Compatible EPROM pin configurations are shown in the blocks adjacement to the NM27C512 pins.

Commercial Temp Range (0°C to +70°C)

Parameter/Order Number	Access Time (ns)
NM27C512 Q, N, V 90	90
NM27C512 Q, N, V 120	120
NM27C512 Q, N, V 150	150

Industrial Temp Range (-40°C to +85°C)

Parameter/Order Number	Access Time (ns)
NM27C512 QE, NE, VE 120	120
NM27C512 QE, NE, VE 150	150

Q = Quartz-Windowed Ceramic DIP Package

N = Plastic DIP Package

V = PLCC Package

•All packages conform to the JEDEC standard.

•All versions are guaranteed to function for slower speeds.

Pin Names

	A0–A15					Addresses
						Chip Enable/Program
	CE/PGM
						Output Enable
		OE
	O0–O7					Outputs
		NC				Don’t Care (During Read)

PLCC

		A7		A12		A15		NC		VCC A14			A13
	4			3		2		1		32 31			30
A6		5											29				A8
A5		6											28				A9
A4		7											27				A11
A3		8											26				NC
A2		9											25				OE/VPP
A1		10											24				A10
													23
A0		11															CE/PGM
NC		12											22				O7
O0		13											21				O8
	14 15					16 17				18 19			20
		O1		O2		GND		NC		O3 O4			O5

DS010834-3

EPROM CMOS Performance High 8) x (64K Bit-524,288 NM27C512

2	www.fairchildsemi.com

Absolute Maximum Ratings (Note 1)

Storage Temperature	-65°C to +150°C
All Input Voltages Except A9 with
Respect to Ground	-0.6V to +7V
VPP and A9 with Respect to Ground	-0.7V to +14V
VCC Supply Voltage with
Respect to Ground	-0.6V to +7V

ESD Protection
(MIL Std. 883, Method 3015.2)					>2000V
All Output Voltages with
Respect to Ground			VCC + 1.0V to GND -0.6V
Operating Range
Range		Temperature		VCC	Tolerance
Commercial		0°C to +70°C		+5V	±10%
Industrial		-40°C to +85°C		+5V	±10%

Read Operation

DC Electrical Characteristics

Symbol	Parameter					Test Conditions		Min	Max	Units
VIL	Input Low Level							-0.5	0.8	V
VIH	Input High Level							2.0	VCC +1	V
VOL	Output Low Voltage	IOL = 2.1 mA							0.4	V
VOH	Output High Voltage	IOH = -2.5 mA						3.5		V
ISB1	VCC Standby Current (CMOS)					= VCC ±0.3V			100	μA
			CE
ISB2	VCC Standby Current								1	mA
			CE			= VIH
ICC1	VCC Active Current	CE = OE = VIL					f = 5 MHz		40	mA
ICC2	VCC Active Current
				CE	= GND, f = 5 MHz
	CMOS Inputs	Inputs = VCC or GND, I/O = 0 mA							35	mA
		C, E Temp Ranges
IPP	VPP Supply Current	VPP = VCC							10	μA
VPP	VPP Read Voltage							VCC - 0.7	VCC	V
ILI	Input Load Current	VIN = 5.5V or GND						-1	1	μA
ILO	Output Leakage Current	VOUT = 5.5V or GND						-10	10	μA

AC Electrical Characteristics

Symbol			Parameter						90			120			150		Units
								Min		Max	Min		Max	Min		Max
tACC	Address to Output Delay									90			120			150	ns
tCE	CE to Output Delay									90			120			150
tOE			to Output Delay							40			50			50
		OE
tDF	Output Disable to									35			25			45
	Output Float
tOH	Output Hold from Addresses,				or			0			0			0
				CE		OE,
	Whichever Occurred First

EPROM CMOS Performance High 8) x (64K Bit-524,288 NM27C512

3	www.fairchildsemi.com