Fairchild Semiconductor NM27C240NE120, NM27C240VE150, NM27C240VE120, NM27C240V150, NM27C240QE150 Datasheet

...

0 (0)

July 1998

NM27C240

4,194,304-Bit (256k x 16) High Performance CMOS EPROM

General Description

The NM27C240 is a high performance Electrically Programmable UV erasable ROM (EPROM). It contains 4,194,304 bits configured as 256k x 16 bits. It is offered in both erasable versions for prototyping and early production applications as well as nonerasable, plastic packaged versions that are ideal for high volume and automated assembly applications.

The NM27C240 operates from a single 5V ±10% supply in the read mode.

The NM27C240 is offered in both DIP and surface mount packages. The DIP package is a 40-pin dual-in-line ceramic with a quartz window to allow erasing. The surface mount package is a 44-pin PLCC that is offered in OTP.

This EPROM is manufactured using Fairchild’s proprietary AMG™ EPROM technology for an excellent combination of speed and economy while providing excellent reliability.

Features

■High performance CMOS

—100 ns access time

■Fast turn-off for microprocessor compatibility

■Simplified upgrade path

—VPP and PGM are “Don’t Care” during normal read operation

■Compatible with 27240 and 27C240 EPROMs

■JEDEC standard pin configuration

—40-pin DIP package

—44-pin PLCC package

■Manufacturer’s identification code

■Fast programming algorithm

Block Diagram

Vcc		Data Outputs O0 - O15
GND
Vpp
OE	Output Enable
OE	Chip Enable, and	Output
	Chip Enable, and	Output
CE/PGM	Program Logic	Buffers
	Y
	Decoder
A0 - A17		4,194,304-Bit
A0 - A17		Cell Matrix
Address	X
Inputs	X
	Decoder

DS011949-1

AMG™ is a trademark of WSI, Inc.

EPROM CMOS Performance High 16) x (256k Bit-4,194,304 NM27C240

www.fairchildsemi.com

Connection Diagrams

27C280			27C220		27C210
		A18	XXVPP		XXVPP

	CE/PGM			CE		CE
		O15	O15		O15
		O14	O14		O14
		O13	O13		O13
		O12	O12		O12
		O11	O11		O11
		O10	O10		O10
		O9	O9		O9
		O8	O8		O8
		GND	GND		GND
		O7	O7		O7
		O6	O6		O6
		O5	O5		O5
		O4	O4		O4
		O3	O3		O3
		O2	O2		O2
		O1	O1		O1
		O0	O0		O0

		OE/VPP		OE		OE

DIP PIN CONFIGURATIONS

DIP

NM27C240


XX/VPP						1	40	VCC


						2
CE/PGM							39	A17


		O15				3	38	A16


		O14				4	37	A15


		O13				5	36	A14


		O12				6	35	A13


		O11				7	34	A12


		O10				8	33	A11

			O9			9	32	A10


			O8		10		31	A9


	GND					11	30	GND


			O7			12	29	A8


			O6			13	28	A7


			O5			14	27	A6


			O4			15	26	A5


			O3			16	25	A4


			O2			17	24	A3


			O1			18	23	A2


			O0			19	22	A1


				OE		20	21	A0

Note: Compatible EPROM pin configurations are shown in the blocks adjacent to the NM27C240 pins.

27C210	27C220		27C280
VCC		VCC	VCC

XX/PGM	PGM		A17
NC		A16	A16
A15		A15	A15
A14		A14	A14
A13		A13	A13
A12		A12	A12
A11		A11	A11
A10		A10	A10
A9		A9	A9
GND	GND		GND
A8		A8	A8
A7		A7	A7
A6		A6	A6
A5		A5	A5
A4		A4	A4
A3		A3	A3
A2		A2	A2
A1		A1	A1
A0		A0	A0

DS011949-2

Commercial Temperature Range

(0°C to +70°C) VCC = 5V ±10%

Parameter/Order Number	Access Time (ns)

NM27C240 Q, V, N 100	100

NM27C240 Q, V, N 120	120

NM27C240 Q, V, N 150	150

Note: Surface mount PLCC package available for commercial and extended temperature ranges only.

Package types: NM27C240 Q, V, N XXX

Q = Quartz-Windowed Ceramic DIP Package

V = PLCC Package

N = Plastic DIP Package

•All packages conform to JEDEC standard.

•All versions are guaranteed to function in slower applications.

Pin Names

A0–A15		Addresses

		Chip Enable/Program
CE/PGM		Chip Enable/Program

		Output Enable
	OE	Output Enable

O0–O15		Outputs

XX		Don’t Care (During Read)

NC		No Connect

Extended Temperature Range

(-40° to +85°C) VCC = 5V ±10%

Parameter/Order Number								Access Time (ns)

NM27C240 QE, VE, NE 120									120

NM27C240 QE, VE, NE 150									150

PLCC Pin Configuration
		O	O O		CE/PGM XX/V NC V A A A A
	7	13	14 15			PP	CC 17 16 15 14		39


O12		6	5	4	3	2	4443424140
O12						1			A13
O11		8				1	38		A12
O11		8					38		A12
O10		9					37		A11
O9		10					36		A10
O8		11					35		A9
GND		12					34		GND
NC		13					33		NC
O7		14					32		A8
O6		15					31		A7
O5		16					30		A6
O4	17	1819202122232425262728							A5
	17								29
		3	2 1 0			OE NC	0 1 2 3 4
		O O O O					A A A A A
		O O O O					A A A A A

DS011949-3

Top View

EPROM CMOS Performance High 16) x (256k Bit-4,194,304 NM27C240

2	www.fairchildsemi.com

Absolute Maximum Ratings (Note 1)

Storage Temperature	-65°C to +150°C
All Input Voltages except A9 with
Respect to Ground (Note 10)	-0.6V to +7V
VPP and A9 with
Respect to Ground	-0.6V to +14V
VCC Supply Voltage with
Respect to Ground	-0.6V to +7V
ESD Protection	>2000V
All Output Voltages with Respect
to Ground (Note 10)	VCC + 1.0V to GND - 0.6V

Operating Range

Range	Temperature	VCC	Tolerance
Commercial	0°C to +70°C	+5V	±10%

Industrial	-40V°C to +85°C	+5V	±10%

DC Read Characteristics Over Operating Range with VPP = VCC

Symbol

Parameter

Conditions

Min

Max

Units

VIL

Input Low Level

-0.5

0.8

VIH

Input High Level

2.0

VCC +1

VOL

Output Low Voltage

IOL = 2.1 mA

0.4

VOH

Output High Voltage

IOH = -2.5 mA

3.5

ISB1

VCC Standby Current (CMOS)

= VCC ±0.3V

100

μA

ISB2

VCC Standby Current (TTL)

= VIH

ICC

VCC Active Current

= VIL, I/O = 0 mA

f=5 MHz

IPP

VPP Supply Current

VPP = VCC

μA

ILI

Input Load Current

VIN = 5.5V or GND

-1

μA

ILO

Output Leakage Current

VOUT = 5.5V or GND

-10

μA

AC Read Characteristics Over Operating Range with VPP = VCC

Symbol

Parameter

100

120

150

Units

Min

Max

Min

Max

Min

Max

tACC

Address to Output Delay

100

120

150

tCE

to Output Delay

100

120

150

tOE

to Output Delay

tDF (Note 2)

Output Disable to Output Float

tOH (Note 2)

Output Hold from Addresses

OE , Whichever Occurred First

Capacitance TA = +25˚C, f = 1 MHz (Note 2)

Symbol

Parameter

Conditions

Typ

Max

Units

CIN

Input Capacitance

VIN = 0V

COUT

Output Capacitance

VOUT = 0V

EPROM CMOS Performance High 16) x (256k Bit-4,194,304 NM27C240

3	www.fairchildsemi.com

+ 7 hidden pages