February 2000
NM24C16/17 – 16K-Bit Standard 2-Wire Bus
Interface Serial EEPROM
General Description
The NM24C16/17 devices are 16,384 bits of CMOS non-volatile electrically erasable memory. These devices conform to all specifications in the Standard IIC 2-wire protocol and are designed to minimize device pin count, and simplify PC board layout requirements.
The upper half (upper 8Kbit) of the memory of the NM24C17 can be write protected by connecting the WP pin to VCC. This section of memory then becomes unalterable unless WP is switched to VSS.
This communications protocol uses CLOCK (SCL) and DATA I/O (SDA) lines to synchronously clock data between the master (for example a microprocessor) and the slave EEPROM device(s). The Standard IIC protocol allows for a maximum of 16K of EEPROM memory which is supported by the Fairchild family in 2K, 4K, 8K, and 16K devices, allowing the user to configure the memory as the application requires with any combination of EEPROMs. In order to implement higher EEPROM memory densities on the IIC bus, the Extended IIC protocol must be used. (Refer to the NM24C32 or NM24C65 datasheets for more information.)
Fairchild EEPROMs are designed and tested for applications requiring high endurance, high reliability and low power consumption.
Features
■Extended operating voltage 2.7V – 5.5V
■400 KHz clock frequency (F) at 2.7V - 5.5V
■200 A active current typical
10 A standby current typical
1 A standby current typical (L)
0.1 A standby current typical (LZ)
■IIC compatible interface
–Provides bi-directional data transfer protocol
■Schmitt trigger inputs
■Sixteen byte page write mode
–Minimizes total write time per byte
■Self timed write cycle
Typical write cycle time of 6ms
■Hardware Write Protect for upper half (NM24C17 only)
■Endurance: 1,000,000 data changes
■Data retention greater than 40 years
■Packages available: 8-pin DIP, 8-pin SO, and 8-pin TSSOP
■Available in three temperature ranges
-Commercial: 0° to +70°C
-Extended (E): -40° to +85C
-Automotive (V): -40° to +125°C
Block Diagram
VCC |
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VSS |
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WP |
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H.V. GENERATION |
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TIMING &CONTROL |
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SDA |
START |
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STOP |
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LOGIC |
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CONTROL |
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LOGIC |
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SLAVE ADDRESS |
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E2PROM |
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SCL |
REGISTER |
XDEC |
ARRAY |
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WORD |
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ADDRESS |
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COUNTER |
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R/W |
YDEC |
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CK |
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DOUT |
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DIN |
DATA REGISTER |
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DS500072-1
© 1998 Fairchild Semiconductor Corporation |
1 |
www.fairchildsemi.com |
NM24C16/17 Rev. G
ROMEEP Serial Interface Bus Wire-2 Standard Bit-16K – NM24C16/17
Connection Diagrams
Dual-in-Line Package (N) and SO Package (M8) |
TSSOP Package (MT8) |
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NC |
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1 |
8 |
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VCC |
NC |
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1 |
8 |
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SCL |
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NC |
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2 |
7 |
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NC |
VCC |
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7 |
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SDA |
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NM24C16 |
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NM24C16 |
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NC |
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6 |
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SCL |
NC |
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3 |
6 |
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VSS |
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VSS |
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4 |
5 |
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SDA |
NC |
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4 |
5 |
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NC |
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DS500072-2 |
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DS500072-3 |
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See Package Number N08E, M08A and MTC08 |
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Pin Names
VSS |
Ground |
SDA |
Serial Data I/O |
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SCL |
Serial Clock Input |
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NC |
No Connection |
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VCC |
Power Supply |
Dual-in-Line Package (N) and SO Package (M8) |
TSSOP Package (MT8) |
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NC |
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1 |
8 |
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VCC |
WP |
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8 |
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SCL |
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NC |
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2 |
7 |
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WP |
VCC |
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7 |
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SDA |
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NM24C17 |
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NM24C17 |
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NC |
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6 |
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SCL |
NC |
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6 |
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VSS |
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VSS |
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4 |
5 |
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SDA |
NC |
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4 |
5 |
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NC |
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DS500072-4 |
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DS500072-5 |
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See Package Number N08E, M08A and MTC08 |
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Pin Names
NC |
No Connection |
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VSS |
Ground |
SDA |
Serial Data I/O |
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SCL |
Serial Clock input |
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WP |
Write Protect |
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VCC |
Power Supply |
NOTE: Pins designated as "NC" are typically unbonded pins. However some of them are bonded for special testing purposes. Hence if a signal is applied to these pins, care should be taken that the voltage applied on these pins does not exceed the VCC applied to the device. This will ensure proper operation.
ROMEEP Serial Interface Bus Wire-2 Standard Bit-16K – NM24C16/17
2 |
www.fairchildsemi.com |
NM24C16/17 Rev. G
Ordering Information |
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NM 24 |
C |
XX F T LZ |
E |
XXX |
Letter |
Description |
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Package |
N |
8-pin DIP |
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M8 |
8-pin SOIC |
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MT8 |
8-pin TSSOP |
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Temp. Range |
None |
0 to 70°C |
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V |
-40 to +125°C |
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E |
-40 to +85°C |
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Voltage Operating Range |
Blank |
4.5V to 5.5V |
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L |
2.7V to 5.5V |
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LZ |
2.7V to 5.5V and |
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<1 A Standby Current |
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Blank |
Normal Pin Out |
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T |
Rotated Die Pin Out |
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SCL Clock Frequency |
Blank |
100KHz |
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Density |
F |
400KHz |
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16 |
16K |
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17 |
16K with Write Protect |
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C |
CMOS Technology |
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Interface |
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24 |
IIC |
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NM |
Fairchild Non-Volatile |
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Memory |
ROMEEP Serial Interface Bus Wire-2 Standard Bit-16K – NM24C16/17
3 |
www.fairchildsemi.com |
NM24C16/17 Rev. G
Product Specifications
Absolute Maximum Ratings
Ambient Storage Temperature |
–65°C to +150°C |
All Input or Output Voltages |
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with Respect to Ground |
6.5V to –0.3V |
Lead Temperature |
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(Soldering, 10 seconds) |
+300°C |
ESD Rating |
2000V min. |
Operating Conditions
Ambient Operating Temperature |
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NM24C16/17 |
0°C to +70°C |
NM24C16E/17E |
-40°C to +85°C |
NM24C16V/17V |
-40°C to +125°C |
Positive Power Supply |
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NM24C16/17 |
4.5V to 5.5V |
NM24C16L/17L |
2.7V to 5.5V |
NM24C16LZ/17LZ |
2.7V to 5.5V |
DC Electrical Characteristics (2.7V to 5.5V)
Symbol |
Parameter |
Test Conditions |
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Limits |
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Units |
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Min |
Typ |
Max |
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(Note 1) |
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ICCA |
Active Power Supply Current |
fSCL = 400 KHz |
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0.2 |
1.0 |
mA |
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fSCL = 100 KHz |
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ISB |
Standby Current |
VIN = GND |
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VCC = 2.7V - 5.5V |
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10 |
50 |
A |
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or VCC |
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VCC = 2.7V - 5.5V (L) |
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1 |
10 |
A |
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VCC = 2.7V - 4.5V (LZ) |
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0.1 |
1 |
A |
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ILI |
Input Leakage Current |
VIN = GND to VCC |
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0.1 |
1 |
A |
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ILO |
Output Leakage Current |
VOUT = GND to VCC |
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0.1 |
1 |
A |
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VIL |
Input Low Voltage |
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–0.3 |
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VCC x 0.3 |
V |
VIH |
Input High Voltage |
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VCC x 0.7 |
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VCC + 0.5 |
V |
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VOL |
Output Low Voltage |
IOL = 3 mA |
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0.4 |
V |
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Capacitance TA = +25°C, f = 100/400 KHz, VCC = 5V (Note 2) |
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Symbol |
Test |
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Conditions |
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Max |
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Units |
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CI/O |
Input/Output Capacitance (SDA) |
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VI/O = 0V |
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pF |
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CIN |
Input Capacitance (A0, A1, A2, SCL) |
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VIN = 0V |
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pF |
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Note 1: Typical values are TA = 25°C and nominal supply voltage of 5V for 4.5V-5.5V operation and at 3V for 2.7V-4.5V operation.
Note 2: This parameter is periodically sampled and not 100% tested.
ROMEEP Serial Interface Bus Wire-2 Standard Bit-16K – NM24C16/17
4 |
www.fairchildsemi.com |
NM24C16/17 Rev. G
AC Test Conditions
Input Pulse Levels |
VCC x 0.1 to VCC x 0.9 |
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Input Rise and Fall Times |
10 ns |
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Input & Output Timing Levels |
VCC x 0.3 to VCC x 0.7 |
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Output Load |
1 TTL Gate and CL = 100 pF |
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AC Testing Input/Output Waveforms |
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0.9VCC |
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0.7VCC |
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0.1VCC |
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0.3VCC |
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DS500072-6 |
Read and Write Cycle Limits (Standard and Low VCC Range 2.7V - 5.5V)
Symbol |
Parameter |
100 KHz |
400 KHz |
Units |
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Min |
Max |
Min |
Max |
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fSCL |
SCL Clock Frequency |
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100 |
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400 |
KHz |
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TI |
Noise Suppression Time Constant at |
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SCL, SDA Inputs (Minimum VIN |
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100 |
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50 |
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Pulse width) |
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tAA |
SCL Low to SDA Data Out Valid |
0.3 |
3.5 |
0.1 |
0.9 |
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tBUF |
Time the Bus Must Be Free before |
4.7 |
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1.3 |
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a New Transmission Can Start |
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tHD:STA |
Start Condition Hold Time |
4.0 |
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0.6 |
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tLOW |
Clock Low Period |
4.7 |
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1.5 |
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tHIGH |
Clock High Period |
4.0 |
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0.6 |
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tSU:STA |
Start Condition Setup Time |
4.7 |
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0.6 |
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(for a Repeated Start Condition) |
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tHD:DAT |
Data in Hold Time |
20 |
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20 |
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tSU:DAT |
Data in Setup Time |
250 |
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100 |
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tR |
SDA and SCL Rise Time |
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1 |
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0.3 |
s |
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tF |
SDA and SCL Fall Time |
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300 |
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300 |
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tSU:STO |
Stop Condition Setup Time |
4.7 |
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0.6 |
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tDH |
Data Out Hold Time |
300 |
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50 |
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tWR |
Write Cycle Time - NM24C16/17 |
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10 |
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10 |
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(Note 3) |
- NM24C16/17L, NM24C16/17LZ |
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15 |
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Note 3: The write cycle time (tWR) is the time from a valid stop condition of a write sequence to the end of the internal erase/program cycle. During the write cycle, the NM24C16/17 bus interface circuits are disabled, SDA is allowed to remain high per the bus-level pull-up resistor, and the device does not respond to its slave address. Refer "Write Cycle Timing" diagram.
Bus Timing
tF |
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tR |
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tHIGH |
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tLOW |
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tLOW |
SCL |
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tSU:STA |
tHD:DAT |
tSU:STO |
tSU:DAT |
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tHD:STA |
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SDA |
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IN |
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tBUF |
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tAA |
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tDH |
SDA |
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OUT |
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DS500072-7
ROMEEP Serial Interface Bus Wire-2 Standard Bit-16K – NM24C16/17
5 |
www.fairchildsemi.com |
NM24C16/17 Rev. G