July 1998
NM27C020
2,097,152-Bit (256K x 8) UV Erasable CMOS EPROM
General Description
The NM27C020 is a high speed 2 Megabit CMOS UV-EPROM manufactured on Fairchild’s advanced sub-micron technology. Utilizing the AMG architecture, this advanced CMOS process delivers high speeds while consuming low power.
The NM27C020 provides microprocessor-based systems extensive storage capacity for large portions of operating systems and application software. Its 100ns access time provides no-wait-state operation with high-performance CPUs.
The NM27C020 offers a single chip solution for the code storage requirements of 100% firmware-based equipment. Frequentlyused software routines are quickly executed from EPROM storage, greatly enhancing system utility.
The NM27C020 is manufactured using Fairchild’s advanced CMOS AMG EPROM technology, and is one member of a high density Fairchild EPROM series family which range in densities up to 4Mb.
Features
■High performance CMOS
—100 ns access time
■Simplified upgrade path
—VPP and PGM are “Don’t Care” during normal read operation
■Manufacturers identification code
■JEDEC Standard Pin Configuration
—32-pin CERDIP package
—32-pin PLCC package
—32-pin PDIP package
Block Diagram
Data Outputs O0 - O7
VCC
GND
VPP
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OE |
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Output Enable, |
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PGM |
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Chip Enable, and |
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Output |
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Program Logic |
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CE |
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Buffers |
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Y Decoder |
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2,097,152-Bit |
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Cell Matrix |
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A0 - A17 |
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Address |
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Inputs |
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X Decoder |
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DS010835-1
EPROM CMOS Erasable UV 8) x (256K Bit-2,097,152 NM27C020
© 1998 Fairchild Semiconductor Corporation |
1 |
www.fairchildsemi.com |
Connection Diagrams
27C080 |
27C040 |
27C010 |
27C512 |
27C256 |
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A19 |
XX/VPP |
XX/VPP |
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XX/VPP |
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1 |
32 |
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VCC |
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A16 |
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A16 |
A16 |
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A16 |
2 |
31 |
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XX/PGM |
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A15 |
A15 |
A15 |
A15 |
VPP |
A15 |
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A17 |
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3 |
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A12 |
A12 |
A12 |
A12 |
A12 |
A12 |
4 |
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A14 |
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A7 |
A7 |
A7 |
A7 |
A7 |
A7 |
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A13 |
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A6 |
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A6 |
A6 |
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A6 |
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A8 |
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A5 |
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A5 |
A5 |
A5 |
A5 |
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A9 |
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A4 |
A4 |
A4 |
A4 |
A4 |
A4 |
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A11 |
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A3 |
A3 |
A3 |
A3 |
A3 |
A3 |
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OE |
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A2 |
A2 |
A2 |
A2 |
A2 |
A2 |
10 |
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A10 |
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A1 |
A1 |
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A1 |
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CE |
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A0 |
A0 |
A0 |
A0 |
A0 |
A0 |
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O7 |
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O0 |
O0 |
O0 |
O0 |
O0 |
O0 |
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O6 |
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O1 |
O1 |
O1 |
O1 |
O1 |
O1 |
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O5 |
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O2 |
O2 |
O2 |
O2 |
O2 |
O2 |
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O4 |
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GND |
GND |
GND |
GND |
GND |
GND |
16 |
17 |
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O3 |
Note: Compatible EPROM pin configurations are shown in the blocks adjacent to the NM27C020 pins.
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27C256 |
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27C512 |
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27C010 |
27C040 |
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27C080 |
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VCC |
VCC |
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VCC |
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XX/PGM |
A18 |
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A18 |
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VCC |
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VCC |
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XX |
A17 |
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A17 |
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A14 |
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A14 |
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A14 |
A14 |
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A14 |
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A13 |
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A13 |
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A13 |
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A13 |
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A8 |
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A8 |
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A8 |
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A8 |
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A9 |
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A9 |
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A9 |
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A9 |
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A11 |
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A11 |
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A11 |
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A11 |
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OE |
OE/VPP |
OE |
OE |
OE/VPP |
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A10 |
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A10 |
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A10 |
A10 |
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A10 |
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CE/PGM |
CE/PGM |
CE/PGM |
CE |
CE/PGM |
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O7 |
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O7 |
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O7 |
O7 |
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O7 |
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O6 |
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O6 |
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O6 |
O6 |
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O6 |
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O5 |
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O5 |
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O5 |
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O5 |
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O4 |
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O4 |
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O4 |
O4 |
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O4 |
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O3 |
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O3 |
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O3 |
O3 |
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O3 |
DS010835-10
Commercial Temperature Range (0°C to +70°C) VCC = 5V ±10%
Parameter/Order Number |
Access Time (ns) |
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NM27C020 Q, V, N 100 |
100 |
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NM27C020 Q, V, N 120 |
120 |
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NM27C020 Q, V, N 150 |
150 |
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All versions are guaranteed to function at slower speeds.
Extended Temperature Range (-40°C to +85°C) VCC = 5V ±10%
Parameter/Order Number |
Access Time (ns) |
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NM27C020 QE, VE, TE, NE 120 |
120 |
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NM27C020 QE, VE, TE, NE 150 |
150 |
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PLCC Pin Configuration
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A12 |
A15 |
A16 |
VPP |
VCC |
PGM |
A17 |
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4 |
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A7 |
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29 |
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A14 |
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A6 |
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28 |
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A13 |
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A5 |
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A8 |
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A4 |
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A9 |
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A3 |
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A11 |
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A2 |
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OE |
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A1 |
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A10 |
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A0 |
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CE |
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O0 |
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O7 |
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O1 |
O2 |
GND |
O3 |
O4 |
O5 |
O6 |
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DS010835-3 |
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Top View |
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Pin Names
A0 –A17 |
Addresses |
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CE |
Chip Enable |
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OE |
Output Enable |
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O0 –O7 |
Outputs |
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Program |
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PGM |
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XX |
Don’t Care (During Read) |
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EPROM CMOS Erasable UV 8) x (256K Bit-2,097,152 NM27C020
2 |
www.fairchildsemi.com |
Connection Diagrams (Continued)
Ordering Information
NM 27 C 020 Q E 150
Fairchild |
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Access Time |
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100 = 100 ns |
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Memory |
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120 = 120 ns |
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EPROM |
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150 = 150 ns |
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Operating Temp |
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CMOS |
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Blank = Commercial Temp. |
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E = Extended Temp. |
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Packaging |
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Q = Ceramic DIP |
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V = PLCC |
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N = PDIP |
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Memory Size |
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020 = 2 Mbit |
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DS010835-9 |
EPROM CMOS Erasable UV 8) x (256K Bit-2,097,152 NM27C020
3 |
www.fairchildsemi.com |
Absolute Maximum Ratings (Note 1) |
All Output Voltages with |
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Storage Temperature |
-65°C to +125°C |
Respect to Ground (Note 13) VCC + 10V to GND -0.6V |
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All Input Voltage Except A9 with |
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Respect to Ground (Note 13) |
-0.6V to +7V |
VPPand A9 with Respect to Ground |
-0.6V to +14V |
VCC Supply Voltage with |
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Respect to Ground |
-0.6V to +7V |
ESD Protection |
>2000V |
Operating Range
Range |
Temperature |
VCC |
Tolerance |
Commercial |
0°C to +70°C |
+5V |
±10 |
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Industrial |
-40°C to +85°C |
+5V |
±10% |
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DC Read Characteristics Over Operating Range with VPP = VCC
Symbol |
Parameter |
Test Conditions |
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Min |
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Max |
Units |
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VIL |
Input Low Level |
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-0.5 |
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0.8 |
V |
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VIH |
Input High Level |
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2.0 |
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VCC +1 |
V |
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VOL |
Output Low Voltage |
IOL = 2.1 mA |
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-0.4 |
V |
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VOH |
Output High Voltage |
IOH = -400 μA |
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3.5 |
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V |
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ISB1(Note 4) |
VCC Standby Current (CMOS) |
CE = VCC ± 0.3V |
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100 |
μA |
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ISB2 |
VCC Standby Current (TTL) |
CE = VIH |
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1 |
mA |
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ICC (Note 2) |
VCC Active Current |
CE, OE = VIL |
Commercial |
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30 |
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I/O = 0 mA, f = 5 MHz |
Industrial |
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30 |
mA |
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Inputs = VIH or VIL |
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IPP |
VPP Supply Current |
VPP = VCC |
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10 |
μA |
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VPP |
VPP Read Voltage |
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VCC - 0.4 |
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VCC |
V |
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ILI |
Input Load Current |
VIN = 5.5 or GND |
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-1 |
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1 |
μA |
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ILO |
Output Leakage Current |
VOUT = 5.5V or GND |
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-10 |
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10 |
μA |
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AC Read Characteristics Over Operating Range with VPP = VCC |
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Symbol |
Parameter |
100 |
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120 |
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150 |
Units |
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Min |
Max |
Min |
Max |
Min |
Max |
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tACC |
Address to Output Delay |
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100 |
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120 |
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150 |
ns |
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tCE |
CE to Output Delay |
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100 |
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120 |
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150 |
ns |
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tOE |
OE to Output Delay |
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40 |
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45 |
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50 |
ns |
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tDF (Note 3) |
Output Disable to Output Float |
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40 |
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45 |
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50 |
ns |
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tOH |
Output Hold from Addresses, CE |
0 |
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0 |
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0 |
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ns |
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or OE , Whichever Occurred First |
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Note 1: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect device reliability.
Note 2: The supply current is the sum of ICC and IPP. The maximum current value is with Outputs O0 to O7 unloaded.
Note 3: This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven-see timing diagram.
Note 4: CMOS inputs: VIL = GND 10.3V, VIH = VCC 10.3V.
EPROM CMOS Erasable UV 8) x (256K Bit-2,097,152 NM27C020
4 |
www.fairchildsemi.com |
AC Read Characteristics (Continued) |
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NM27C020 |
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ICC vs. Frequency |
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40 |
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30 |
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Bit-2,097,152 |
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20 |
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8) x (256K |
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10 |
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UV |
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0 |
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Erasable |
0 |
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1 |
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2 |
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3 |
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4 |
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5 |
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6 |
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7 |
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8 |
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DS010835-7 |
CMOS |
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Frequency (MHz) |
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ICC vs. Temperature |
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EPROM |
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31 |
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30 |
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29 |
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28 |
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27 |
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26 |
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-60 |
-50 |
-40 |
-30 |
-20 |
-10 |
0 |
10 |
20 |
30 |
40 |
50 |
60 |
70 |
80 |
90 |
100 |
110 |
120 |
130 |
140 |
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DS010835-8 |
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Temperature (IC) |
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5 |
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www.fairchildsemi.com |
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