June 1997
NDP7052 / NDB7052
N-Channel Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulses in the avalanche and commutation modes. These devices are particularly suited for low voltage applications such as automotive, DC/DC converters, PWM motor controls, and other battery powered circuits where fast switching, low in-line power loss, and resistance to transients are needed.
Features
75 A, 50 V. RDS(ON) = 0.01 Ω @ VGS= 10 V.
Critical DC electrical parameters specified at elevated temperature.
Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor.
175°C maximum junction temperature rating.
High density cell design for extremely low RDS(ON).
TO-220 and TO-263 (D2PAK) package for both through hole and surface mount applications.
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Absolute Maximum Ratings TC = 25°C unless otherwise noted |
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Symbol |
Parameter |
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NDP7052 |
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NDB7052 |
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Units |
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VDSS |
Drain-Source Voltage |
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50 |
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V |
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VDGR |
Drain-Gate Voltage (R |
< 1 MΩ) |
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50 |
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V |
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GS |
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VGSS |
Gate-Source Voltage - Continuous |
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±20 |
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V |
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- Nonrepetitive (tP < 50 µs) |
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±40 |
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ID |
Drain Current - Continuous |
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75 |
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A |
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- Pulsed |
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225 |
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PD |
Total Power Dissipation @ TC = 25°C |
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150 |
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W |
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Derate above 25°C |
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1 |
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W/°C |
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TJ,TSTG |
Operating and Storage Temperature Range |
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-65 to 175 |
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°C |
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THERMAL CHARACTERISTICS |
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RθJC |
Thermal Resistance, Junction-to-Case |
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1 |
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°C/W |
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Rθ JA |
Thermal Resistance, Junction-to-Ambient |
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62.5 |
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°C/W |
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© 1997 Fairchild Semiconductor Corporation |
NDP7052 Rev.B1 |
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Electrical Characteristics (TC = 25°C unless otherwise noted)
Symbol |
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Parameter |
Conditions |
Min |
Typ |
Max |
Units |
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DRAIN-SOURCE AVALANCHE RATINGS (Note) |
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WDSS |
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Single Pulse Drain-Source Avalanche Energy |
VDD = 25 V, ID = 75 A |
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550 |
mJ |
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IAR |
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Maximum Drain-Source Avalanche Current |
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75 |
A |
OFF CHARACTERISTICS |
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BVDSS |
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Drain-Source Breakdown Voltage |
VGS = 0 V, ID = 250 µA |
50 |
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V |
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BV |
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T |
J |
Breakdown Voltage Temp. Coefficient |
ID = 250 µA, Referenced to 25 o C |
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57 |
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mV/oC |
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DSS |
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IDSS |
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Zero Gate Voltage Drain Current |
VDS = 40 V, VGS = 0 V |
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10 |
µA |
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TJ = 125°C |
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1 |
mA |
IGSSF |
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Gate - Body Leakage, Forward |
VGS = 20 V, VDS = 0 V |
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100 |
nA |
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IGSSR |
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Gate - Body Leakage, Reverse |
VGS = -20 V, VDS = 0 V |
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-100 |
nA |
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ON CHARACTERISTICS (Note) |
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V |
/ |
T |
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Gate Threshold VoltageTemp. Coefficient |
ID = 250 µA, Referenced to 25 o C |
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-5.2 |
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mV/oC |
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GS(th) |
J |
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VGS(th) |
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Gate Threshold Voltage |
VDS = VGS, ID = 250 µA |
2 |
2.2 |
3 |
V |
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TJ = 125°C |
1.4 |
1.55 |
2.4 |
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RDS(ON) |
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Static Drain-Source On-Resistance |
VGS = 10 V, ID = 37.5 A |
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0.008 |
0.01 |
Ω |
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TJ = 125°C |
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0.011 |
0.018 |
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ID(on) |
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On-State Drain Current |
VGS = 10 V, VDS= 10 V |
60 |
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A |
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gFS |
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Forward Transconductance |
VDS = 10 V, ID = 37.5 A |
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52 |
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DYNAMIC CHARACTERISTICS |
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Ciss |
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Input Capacitance |
VDS = 25 V, VGS = 0 V, |
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3400 |
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pF |
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f = 1.0 MHz |
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Coss |
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Output Capacitance |
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1300 |
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pF |
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Crss |
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Reverse Transfer Capacitance |
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460 |
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pF |
SWITCHING CHARACTERISTICS (Note) |
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tD(on) |
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Turn - On Delay Time |
VDD = 30 V, ID = 75 A, |
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15 |
30 |
nS |
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tr |
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Turn - On Rise Time |
VGS = 10 V, RGEN = 5 Ω |
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147 |
250 |
nS |
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tD(off) |
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Turn - Off Delay Time |
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85 |
150 |
nS |
tf |
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Turn - Off Fall Time |
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165 |
300 |
nS |
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Qg |
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Total Gate Charge |
VDS = 24 V, |
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117 |
160 |
nC |
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Qgs |
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Gate-Source Charge |
ID = 37.5 A, VGS = 10 V |
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12 |
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nC |
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Qgd |
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Gate-Drain Charge |
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46 |
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nC |
DRAIN-SOURCE DIODE CHARACTERISTICS |
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IS |
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Maximum Continuos Drain-Source Diode Forward Current |
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75 |
A |
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ISM |
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Maximum Pulsed Drain-Source Diode Forward Current |
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225 |
A |
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VSD |
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Drain-Source Diode Forward Voltage |
VGS = 0 V, IS = 13 A (Note) |
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0.9 |
1.3 |
V |
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trr |
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Reverse Recovery Time |
VGS = 0 V, IF = 37.5 A, |
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75 |
150 |
ns |
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Irr |
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Reverse Recovery Current |
dIF/dt = 100 A/µs |
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4 |
10 |
A |
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Note: Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0%.
NDP7052 Rev.B1
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