Low Current, High Performance
NPN Silicon Bipolar Transistor
Technical Data
AT-32011
AT-32033
•High Performance Bipolar Transistor Optimized for Low Current, Low Voltage Operation
•900 MHz Performance:
AT-32011: 1 dB NF, 14 dB GA AT-32033: 1 dB NF, 12.5 dB GA
•Characterized for End-Of- Life Battery Use (2.7 V)
•SOT-23 and SOT-143 SMT Plastic Packages
•Tape-And-Reel Packaging Option Available[1]
EMITTER COLLECTOR
320
BASE EMITTER
SOT-143 (AT-32011)
COLLECTOR
320
BASE EMITTER
SOT-23 (AT-32033)
Hewlett Packard’s AT-32011 and AT-32033 are high performance NPN bipolar transistors that have been optimized for maximum ft at low voltage operation, making them ideal for use in battery powered applications in wireless markets. The AT-32033 uses the
3 lead SOT-23, while the AT-320 11 places the same die in the higher performance 4 lead SOT-143. Both packages are industry standard, and compatible with high volume surface mount assembly techniques.
The 3.2 micron emitter-to-emitter pitch and reduced parasitic design of these transistors yields extremely high performance products that can perform a multiplicity of tasks. The
20 emitter finger interdigitated geometry yields an easy to match to and extremely fast transistor with moderate power, low noise resistance, and low operating currents.
Note:
1. Refer to “Tape-and-Reel Packaging for Semiconductor Devices.”
Optimized performance at 2.7 V makes these devices ideal for use in 900 MHz, 1.8 GHz, and 2.4 GHz battery operated systems as an LNA, gain stage, buffer, oscillator, or active mixer. Typical amplifier designs at 900 MHz yield 1.2 dB noise figures with 12 dB or more associated gain at a 2.7 V, 2 mA bias, with noise performance being relatively insensitive to input match. High gain capability at 1 V, 1 mA makes these devices a good fit for 900 MHz pager applications. Voltage breakdowns are high enough for use at 5 volts.
The AT-3 series bipolar transistors are fabricated using an optimized version of Hewlett Packard’s
10 GHz tf, 30 GHz fMAX Self- Aligned-Transistor (SAT) process.
The die are nitride passivated for surface protection. Excellent device uniformity, performance and reliability are produced by the use of ion-implantation, selfalignment techniques, and gold metalization in the fabrication of these devices.
4-53 |
5965-8920E |
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Absolute |
Symbol |
Parameter |
Units |
Maximum[1] |
VEBO |
Emitter-Base Voltage |
V |
1.5 |
VCBO |
Collector-Base Voltage |
V |
11 |
VCEO |
Collector-Emitter Voltage |
V |
5.5 |
IC |
Collector Current |
mA |
32 |
PT |
Power Dissipation[2, 3] |
mW |
200 |
Tj |
Junction Temperature |
°C |
150 |
TSTG |
Storage Temperature |
°C |
-65to150 |
Thermal Resistance[2]:
θjc = 550 °C/W
Notes:
1.Operation of this device above any one of these parameters may cause permanent damage.
2.TMounting Surface = 25°C.
3.Derate at 1.82 mW/°C for TC > 40°C.
Electrical Specifications, TA = 25°C
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AT-32011 |
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AT-32033 |
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Symbol |
Parameters and Test Conditions |
Units |
Min. |
Typ. |
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Max. |
Min. |
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Typ. |
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Max. |
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NF |
Noise Figure |
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V |
= 2.7 V, I = 2 mA |
f = 0.9 GHz |
dB |
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1.0[1] |
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1.3[1] |
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1.0[2] |
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1.3[2] |
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CE |
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C |
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GA |
Associated Gain |
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V |
= 2.7 V, I |
C |
= 2 mA |
f = 0.9 GHz |
dB |
12.5[1] |
14[1] |
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11[2] |
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12.5[2] |
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CE |
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hFE |
Forward Current Transfer Ratio |
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VCE = 2.7 V,IC = 2 mA |
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70 |
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300 |
70 |
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300 |
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ICBO |
Collector Cutoff Current |
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μA |
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VCB = 3 V |
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0.2 |
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0.2 |
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IEBO |
Emitter Cutoff Current |
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μA |
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VEB = 1 V |
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1.5 |
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1.5 |
Notes:
1.Test circuit A, Figure 1. Numbers reflect device performance de-embedded from circuit losses. Input loss = 0.3 dB; output loss = 0.3 dB.
2.Test circuit B, Figure 1. Numbers reflect device performance de-embedded from circuit losses. Input loss = 0.3 dB; output loss = 0.3 dB.
1000 pF |
VBB |
W = 10 L = 1870
W = 30
L = 60
RF IN W = 10
CKT A: L = 380
CKT B: L = 380
TEST CIRCUIT
BOARD MATL = 0.062" FR-4 (ε = 4.8)
DIMENSIONS IN MILS
VCC |
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1000 pF |
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W = 10 L = 1870 |
CKT A: 25 Ω |
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W = 30 |
CKT B: 5 Ω |
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L = 60 |
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RF OUT
W = 10
CKT A: L = 105
CKT B: L = 850
CKT A: W = 30 L = 50 x 2 CKT B: W = 30 L = 60
NOT TO SCALE
Figure 1. Test Circuit for Noise Figure and Associated Gain.
This circuit is a compromise match between best noise figure, best gain, stability, and a practical synthesizable match.
4-54
Characterization Information, TA = 25°C
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AT-32011 |
AT-32033 |
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Symbol |
Parameters and Test Conditions |
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Units |
Typ. |
Typ. |
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P1dB |
Power at 1 dB Gain Compression (opt tuning) |
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VCE = 2.7 V, IC = 20 mA |
f = 0.9 GHz |
dBm |
13 |
13 |
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G1dB |
Gain at 1 dB Gain Compression (opt tuning) |
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VCE = 2.7 V, IC = 20 mA |
f = 0.9 GHz |
dB |
16.5 |
15 |
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IP3 |
Output Third Order Intercept Point (opt tuning) |
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VCE = 2.7 V, IC = 20 mA |
f=0.9GHz |
dBm |
24 |
24 |
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Gain in 50 Ω System |
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21 E |
VCE = 2.7 V, IC = 2 mA |
f=0.9GHz |
dB |
13 |
11.5 |
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2 |
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(dB) |
1.5 |
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FIGURE |
1 |
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1 mA |
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NOISE |
0.5 |
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2 mA |
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10 mA |
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5 mA |
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20 mA |
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0 |
0.5 |
1 |
1.5 |
2 |
2.5 |
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0 |
FREQUENCY (GHz)
Figure 2. AT-32011 and AT-32033 Minimum Noise Figure vs. Frequency and Current at VCE = 2.7 V.
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20 |
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20 |
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15 |
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(dB) |
15 |
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(dB) |
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10 |
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Ga |
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Ga |
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10 |
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1 mA |
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1 mA |
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2 mA |
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5 |
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2 mA |
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5 |
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5 mA |
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5 mA |
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10 mA |
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10 mA |
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20 mA |
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20 mA |
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0 |
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0 |
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0 |
0.5 |
1.0 |
1.5 |
2.0 |
2.5 |
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0.5 |
1.0 |
1.5 |
2.0 |
2.5 |
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FREQUENCY (GHz) |
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FREQUENCY (GHz) |
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Figure 3. AT-32011 Associated Gain at |
Figure 4. AT-32033 Associated Gain at |
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Optimum Noise Match vs. Frequency |
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Optimum Noise Match vs. Frequency |
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and Current at VCE |
= 2.7 V. |
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and Current at VCE |
= 2.7 V. |
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20 |
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20 |
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1dBP (dBm) |
15 |
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15 |
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10 |
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1dBG (dB) |
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5 |
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10 |
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2 mA |
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5 |
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2 mA |
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5 mA |
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5 mA |
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10 mA |
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10 mA |
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20 mA |
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20 mA |
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-5 |
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0.5 |
1.0 |
1.5 |
2.0 |
2.5 |
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0.5 |
1.0 |
1.5 |
2.0 |
2.5 |
0 |
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FREQUENCY (GHz) |
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FREQUENCY (GHz) |
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Figure 5. AT-32011 and AT-32033 |
Figure 6. AT-32011 1 dB Compressed |
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Power at 1 dB Gain Compression vs. |
Gain vs. Frequency and Current at |
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Frequency and Current at VCE |
= 2.7 V. |
VCE =2.7 V. |
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20 |
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(dB) |
15 |
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10 |
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G 1dB |
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5 |
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2 mA |
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5 mA |
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10 mA |
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20 mA |
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0 |
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0 |
0.5 |
1.0 |
1.5 |
2.0 |
2.5 |
FREQUENCY (GHz)
Figure 7. AT-32033 1 dB Compressed Gain vs. Frequency and Current at VCE =2.7 V.
4-55