Sony CXP86441, CXP86333, CXP86325, CXP86217, CXP86213 Datasheet

CXP86213/86217, CXP86325/86333

CXP86441/86449/86461

CMOS 8-bit Single Chip Microcomputer

Description
The CXP86213/86217, CXP86325/86333, CXP86441/	52 pin SDIP (Plastic)
86449/86461 are the CMOS 8-bit single chip micro-
computer integrating on a single chip an A/D
converter, serial interface, timer/counter, time-base
timer, on-screen display function, I2C bus interface,
PWM output, remote control reception circuit,
HSYNC counter, watchdog timer, 32kHz timer/counter
besides the basic configurations of 8-bit CPU, ROM,
RAM, I/O ports.
The CXP86213/86217, CXP86325/86333, CXP86441/
86449/86461 also provide a sleep function that
enables to lower the power consumption.

	Features		Structure
				Silicon gate CMOS IC
	• A wide instruction set (213 instructions) which
	covers various types of data
	— 16-bit operation/multiplication and division/
	Boolean bit operation instructions
	• Minimum instruction cycle	250ns at 16MHz operation (4.5 to 5.5V)
	• Incorporated ROM capacity	122µs at 32kHz operation (2.7 to 5.5V)
		12K bytes (CXP86213) 24K bytes (CXP86325) 40K bytes(CXP86441)
		16K bytes (CXP86217) 32K bytes (CXP86333) 48K bytes (CXP86449)
	• Incorporated RAM capacity			60K bytes (CXP86461)
		352 bytes (CXP86213/86217) 704 bytes (CXP86325/86333)
		1536 bytes (CXP86441/86449/86461)
	• Peripheral functions	(Excludes VRAM for on-screen display and sprite RAM)
	— A/D converter		8 bits, 6 channels, successive approximation method
			(Conversion time of 3.25µs at 16MHz)
	— Serial interface		8-bit clock sync type, 1 channel
	— Timer		8-bit timer
			8-bit timer/counter
			19-bit time-base timer
			32kHz timer/counter
	— On-screen display (OSD) function		12 × 16 dots, 128 character types (CXP86213/86217),
			256 character types (CXP86325/86333),
			384 character types (CXP86441/86449/86461)
			15 character colors, 2 lines × 24 characters,
			frame background 8 colors/ half blanking,
			background on full screen 15 colors/ half blanking
			edging/ shadowing/ rounding for every line,
			background with shadow for every character (CXP86441/86449/86461),
			double scanning,
			sprite OSD (CXP86441/86449/86461),
	— I 2C bus interface		12 × 16 dots, 1 screen, 8 colors for every dot
	— PWM output		8 bits, 6 channels
			14 bits, 1 channel
	— Remote control reception circuit		8-bit pulse measurement counter, 6-stage FIFO
	— HSYNC counter		2 channels
	— Watchdog timer
	• Interruption		13 factors, 13 vectors, multi-interruption possible
	• Standby mode		Sleep
	• Package		52-pin plastic SDIP
	• Piggyback/evaluator		CXP86490 64-pin ceramic PSDIP (Supports custom font)

Perchase of Sony's2IC components conveys a licence under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specifications as defined by Philips.

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

– 1 –

E96X17B86

CXP86213/86217, CXP86325/86333, CXP86441/86449/86461

PA0 to PA7

PB0 to PB7

PD0 to PD7

PE0 to PE1

PE2 to PE3

PE4 to PE6

PF0 to PF7

PG7

8

8

8

2

2

3

8

1

A TROP

B TROP

D TROP

E TROP

F TROP

G TROP

SS

V

MWP

DD

V

PM

TSR

LATX

LATXE

XT

XET

6

5MWP ot 0MWP

2

JDA

1LCS

0LCS

2TNI

1ADS

1TNI

RELLORTNOC TPURRETNI

0ADS

0TNI

2

2

A/D CONVERTER 6CH

REMOCON FIFO

SERIAL INTERFACE UNIT

8BIT TIMER/

COUNTER 0

8BIT TIMER 1

ON SCREEN

DISPLAY

HSYNC COUNTER 0

HSYNC COUNTER 1

6

Diagram

AN0 to AN5

RMC

SI

SO

SCK

EC

TO

XLC

EXLC

R G

B

I

YS

YM

HSYNC VSYNC

HS0

HS1

Block

– 2 –

CXP86213/86217, CXP86325/86333, CXP86441/86449/86461

Pin Assignment (Top View)

EC/PD7	1	52	PF0/PWM0
RMC/PD6	2	51	PF1/PWM1
HS1/PD5	3	50	PF2/PWM2
HS0/PD4	4	49	PF3/PWM3
SI/PD3	5	48	PF4/SCL0
SO/PD2	6	47	PF5/SCL1/PWM4
SCK/PD1	7	46	PF6/SDA0
INT2/PD0	8	45	PF7/SDA1/PWM5
HSYNC/PA7	9	44	PE0/TO/ADJ
VSYNC/PA6	10	43	PE1/PWM
RST	11	42	PE2/TEX/INT0
VSS	12	41	PE3/TX
XTAL	13	40	VSS
EXTAL	14	39	VDD
PA5/AN5	15	38	NC
PA4/AN4	16	37	EXLC
PA3/AN3	17	36	XLC
PA2/AN2	18	35	PE4/YM
PA1/AN1	19	34	PE5/YS
PA0/AN0	20	33	PE6/I
PB7	21	32	B
PB6	22	31	G
PB5	23	30	R
PB4	24	29	PB0
PB3	25	28	PB1
INT1/PG7	26	27	PB2

Note)

1.NC (Pin 38) is left open.

2.Vss (Pins 12 and 40) are both connected to GND.

– 3 –

CXP86213/86217, CXP86325/86333, CXP86441/86449/86461

Pin Description

Symbol

I/O

Description

PA0/AN0

I/O/

(Port A)

Analog inputs to A/D converter.

to

Analog input

8-bit I/O port.

(6 pins)

PA5/AN5

I/O can be set in a

PA6/VSYNC

I/O/Input

unit of single bits.

OSD display vertical sync signal input.

(8 pins)

PA7/HSYNC

I/O/Input

OSD display horizontal sync signal input.

(Port B)

PB0 to PB7

I/O

8-bit I/O port. I/O can be set in a unit of single bits.

(8 pins)

External interruption request input. Active at the

PD0/INT2

I/O/Input

falling edge.

I/O/I/O

Serial clock I/O.

PD1/SCK

(Port D)

PD2/SO

I/O/Output

8-bit I/O port. I/O

Serial data output.

can be set in a

PD3/SI

I/O/Input

Serial data input.

unit of single bits.

PD4/HS0

I/O/Input

Can drive 12mA

HSYNC counter (CH0) input.

synk current.

PD5/HS1

I/O/Input

HSYNC counter (CH1) input.

(8 pins)

PD6/RMC

I/O/Input

Remote control reception circuit input.

I/O/Input

External event input for timer/counter.

PD7/EC

PE0/TO/ADJ

I/O/Output/

Rectangular wave output

32kHz oscillation

Output

for 8-bit timer/counter.

frequency dividing output.

I/O/Output

14-bit PWM output.

PE1/PWM

(Port E)

Input/Input/

Bits 0 and 1 are I/O

Connects a crystal for

External interruption

PE2/TEX/INT0

port; I/O can be set

request input. Active at

Input

32kHz timer/counter

in a unit of single.

the falling edge.

clock oscillation. When

Bits 2 and 3 are

used as an event

PE3/TX

Input/Output

input port. Bits 4, 5

counter, input to TEX pin and leave TX pin open.

and 6 are output

port.

PE4/YM

Output/Output

(7 pins)

PE5/YS

Output/Output

PE6/I

Output/Output

OSD display 6-bit output.

B

Output

(6 pins)

G

Output

R

Output

– 4 –

						CXP86213/86217, CXP86325/86333, CXP86441/86449/86461
		Symbol			I/O			Description
	PF0/PWM0 to				Output/Output	(Port F)		8-bit PWM output.
	PF3/PWM3					8-bit output port.		(4 pins)
						Open drain output of
	PF4/SCL0				Output/I/O			I2C bus interface transfer clock I/O.
						large current (12mA)
								(2 pins)
	PF5/SCL1/				Output/I/O/	and N channel.					8-bit PWM output.
	PWM4				Output	Lower 4 bits are
						medium drive voltage
	PF6/SDA0				Output/I/O			I2C bus interface transfer data I/O.
						(12V); upper 4 bits are
								(2 pins)
	PF7/SDA1/				Output/I/O/	5V drive.					8-bit PWM output.
	PWM5				Output	(8 pins)
						(Port G)		External interruption request input.
	PG7/INT1				I/O/Input
						1-bit I/O port.		Active at the falling edge.
	EXTAL				Input	Connects a crystal for system clock oscillation. When a clock is
						supplied externally, input to EXTAL pin and input a reversed phase
	XTAL				Output
						clock to XTAL pin.
						System reset; active at Low level.
	RST				Input
	EXLC				Input	OSD display clock oscillation I/O. Oscillation frequency is determined
	XLC				Output	by the external L and C.
	NC					No connected.
	VDD					Positive power supply.
	Vss					GND. Connect two Vss pins to GND.

– 5 –

CXP86213/86217, CXP86325/86333, CXP86441/86449/86461

Input/Output Circuit Formats for Pins

Pin			Circuit format		When reset
	Port A
			Port A data
			Port A direction
PA0/AN0			“0” when reset
to
PA5/AN5	Data bus			IP	Hi-Z
	RD (Port A)			Input
				protection
	Port A function selection			circuit
	“0” when reset	Input multiplexer
	A/D converter
6 pins
	Port A		Port A data
			Port A direction
PA6/VSYNC			“0” when reset
PA7/HSYNC					Hi-Z
	Data bus		Schmitt input	IP
	RD (Port A)
	HSYNC, VSYNC			Input polarity
2 pins			“0” when reset
	Port B
	Port G		Ports B, G data
PB0 to PB7		Ports B, G direction
			“0” when reset
PG7/INT1
					Hi-Z
	Data bus			IP
	RD (Ports B, G)
9 pins	INT1		Schmitt input for PB0,
			PB1, PB2 and PG7
	Port F
	PWM0 to PWM3
PF0/PWM0	Port F function
to
	selection				Hi-Z
PF3/PWM3	“0” when reset
	Port F data
	“1” when reset		12V drive voltage
			Large current 12mA

4 pins

– 6 –

CXP86213/86217, CXP86325/86333, CXP86441/86449/86461

Pin			Circuit format		When reset
	Port D
			Port D data
PD0/INT2
PD3/SI			Port D direction
PD4/HS0			“0” when reset
PD5/HS1					Hi-Z
PD6/RMC
	Data bus		Schmitt input	IP
PD7/EC
	RD (Port D)
	INT2, SI, HS0,		Large current 12mA
6 pins	HS1, RMC, EC
	Port D
	SCK, SO
	SIO output enable
	Port D data
PD1/SCK
PD2/SO	Port D direction				Hi-Z
	“0” when reset		IP
			Schmitt input
	Data bus		only for PD1
	RD (Port D)
2 pins	SCK only		Large current 12mA
	Port E
		Internal reset signal
	Port E data	00
	“1” when reset		MPX
	TO	01
	ADJ16K 1	10		2	High level
	ADJ2K 1	11
PE0/TO/ADJ					(with the
	Port E function selection (Upper)				resistor of
					pull-up
	Port E function selection (Lower)		1 ADJ signals are frequency		transistor
	“00” when reset				ON when
	Port E direction		dividing outputs for 32kHz		reset)
			oscillation frequency	IP
	“1” when reset		adjustment. ADJ2K provides
			usage as buzzer output.
	Data bus
			2 Pull-up resistors approx. 150kΩ
1 pin	RD (Port E)

– 7 –