Sony CXP83516, CXP83513, CXP83512, CXP83509, CXP83508 Datasheet

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8-bit, 8-channel, successive approximation method (Conversion time of 12.4µs/10MHz)
Incorporated buffer RAM
(Auto transfer for 1 to 32 bytes), 1 channel
8-bit clock synchronized type (MSB/LSB first selectable), 1 channel 8-bit timer, 8-bit timer/counter, 19-bit time-base timer,
Sub timer/counter
Maximum 128 segment display possible (during 1/4 duty) 4 common output, 32 segment output
Display method static, 1/2, 1/3, 1/4 duty Bias method 1/2, 1/3 bias
8-bit pulse measuring counter, 6-stage FIFO
14 factors, 14 vectors, multi-interruption possible Sleep/stop
80-pin plastic QFP/LQFP
CXP83600 (CXP83508, 83512, 83516)
CXP83601 (CXP83509, 83513, 83517)
CXP83509/83513/83517 80 pin QFP (Plastic)

CXP83508/83512/83516

CXP83509/83513/83517

CMOS 8-bit Single Chip Microcomputer

Description

CXP83508/83512/83516

The CXP83508/83512/83516 and the CXP83509/

80 pin QFP (Plastic)

80 pin LQFP (Plastic)

83513/83517 are CMOS 8-bit single chip microcomputer

integrating on a single chip an A/D converter, serial

 

 

interface, timer/counter, time-base timer, sub timer/

 

 

counter, LCD controller/driver and remote control

 

 

reception circuit besides the basic configurations of 8-

 

 

bit CPU, ROM, RAM, and I/O port.

 

 

The CXP83508/83512/83516 and the CXP83509/

 

 

83513/83517 also provide a sleep/stop function that

 

 

enables lower power consumption.

 

 

Features

Wide-range instruction system (213 instructions) to cover various types of data.

— 16-bit arithmetic/multiplication and division/boolean bit operation instructions

Minimum instruction cycle 400ns at 10MHz operation (4.5 to 5.5V) 1µs at 4MHz operation (2.7 to 5.5V)

122µs at 32kHz operation (2.7 to 5.5V)

Incorporated ROM capacity

8K bytes (CXP83508, 83509)

12K bytes (CXP83512, 83513)

16K bytes (CXP83516, 83517)

Incorporated RAM capacity

608bytes (includes LCD display data area and serial interface RAM)

Peripheral functions

— A/D converter

— Serial interface

— Timer

— LCD controller/driver

— Remote control reception circuit

Interruption

Standby mode

Package

Piggy/evaluation chip

Structure

Silicon gate CMOS IC

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

– 1 –

E98133B96

CXP83508/83512/83516, CXP83509/83513/83517

PA0 to PA7

 

PB0 to PB7

PC0 to PC7

PD0 to PD7

PE0 to PE4

PE5 to PE6

PF0 to PF7

PH0

PI0 to PI1

8

 

8

8

8

 

5

2

8

1

2

A TROP

B TROP

C TROP

D TROP

E TROP

F TROP

H TROP

I TROP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ssV DDV TSR LATX LATXE XT XET

4TNI 3TNI NI2T NI1T 0TNI

CLOCK GENERATOR/

SYSTEM CONTROL

RAM

608 BYTES

SPC700

CPU CORE

ROM

8K/12K/16K BYTES

INRETRPUTCONLORTLER

A/D CONVERTER

LCD CONTROLLER/DRIVER

REMOCON FIFO

Block Diagram

8

32

4

 

 

 

 

AN0 to AN7

SEG0 to SEG31

COM0 to COM3

VL

VLC1

VLC2 VLC3

RMC

SUB TIMER/

COUNTER

PRESCALER/

TIME-BASE TIMER

3

2

BUFFER

RAM

 

SERIAL INTERFACE UNIT (CH1)

8-BIT TIMER/COUNTER 0

8-BIT TIMER 1

 

SERIAL INTERFACE UNIT (CH0)

 

CS0 SI0

SO0

SCK0

SI1 SO1 SCK1

EC

TO

ADJ

– 2 –

CXP83508/83512/83516, CXP83509/83513/83517

Pin Assignment (Top View) CXP83508/83512/83516 (QFP package)

2TN I/2E P

1TN I/1E P

CE/0 TNI /0E P

13G ES/ 7FP

03G ES/ 6FP

CN

XET /1IP

XT/0 IP

DD V

92G ES/ 5FP

82G ES/ 4FP

72G ES/ 3FP

62G ES/ 2FP

52G ES/ 1FP

42G ES/ 0FP

32G ES/ 7DP

 

80

79

78

77

76

75

74

73

72

71

70

69

68

67

66

65

 

PE3/INT3

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

64

PD6/SEG22

PE4/RMC

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

63

PD5/SEG21

PE5/TO

3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

62

PD4/SEG20

PE6/ADJ

4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

61

PD3/SEG19

PB0

5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

60

PD2/SEG18

PB1/CS0

6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

59

PD1/SEG17

PB2/SCK0

7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

58

PD0/SEG16

PB3/SI0

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

57

SEG15

PB4/SO0

9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

56

SEG14

PB5/SCK1

10

 

 

 

 

 

 

 

 

 

 

 

 

 

 

55

SEG13

PB6/SI1

11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

54

SEG12

PB7/SO1

12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

53

SEG11

PC0

13

 

 

 

 

 

 

 

 

 

 

 

 

 

 

52

SEG10

PC1

14

 

 

 

 

 

 

 

 

 

 

 

 

 

 

51

SEG9

PC2

15

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50

SEG8

PC3

16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

49

SEG7

PC4

17

 

 

 

 

 

 

 

 

 

 

 

 

 

 

48

SEG6

PC5

18

 

 

 

 

 

 

 

 

 

 

 

 

 

 

47

SEG5

PC6

19

 

 

 

 

 

 

 

 

 

 

 

 

 

 

46

SEG4

PC7

20

 

 

 

 

 

 

 

 

 

 

 

 

 

 

45

SEG3

PH0/INT4

21

 

 

 

 

 

 

 

 

 

 

 

 

 

 

44

SEG2

PA0/AN0

22

 

 

 

 

 

 

 

 

 

 

 

 

 

 

43

SEG1

PA1/AN1

23

 

 

 

 

 

 

 

 

 

 

 

 

 

 

42

SEG0

PA2/AN2

24

 

 

 

 

 

 

 

 

 

 

 

 

 

 

41

COM3

 

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

 

3NA /3A P

4NA /4A P

5NA /5A P

6NA /6A P

7NA /7A P

TSR

LAT XE

LAT X

SS V

VL

VLC3

VLC2

VLC1

0MO C

1MO C

2MO C

Note) Do not make any connections to NC (Pin 75).

– 3 –

CXP83508/83512/83516, CXP83509/83513/83517

Pin Assignment (Top View) CXP83508/83512/83516 (LQFP package)

CMR /4E P

3TN I/3E P

2TN I/2E P

1TN I/1E P

CE/0 TNI /0E P

13G ES/ 7FP

03G ES/ 6FP

CN

XET /1IP

XT/0 IP

VDD

92G ES/ 5FP

82G ES/ 4FP

72G ES/ 3FP

62G ES/ 2FP

52G ES/ 1FP

42G ES/ 0FP

32G ES/ 7DP

22G ES/ 6DP

12G ES/ 5DP

80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61

PE5/TO 1

PE6/ADJ 2

PB0 3

PB1/CS0 4

PB2/SCK0 5

PB3/SI0 6

PB4/SO0 7

PB5/SCK1 8

PB6/SI1 9

PB7/SO1 10

PC0 11

PC1 12

PC2 13

PC3 14

PC4 15

PC5 16

PC6 17

PC7 18

PH0/INT4 19

PA0/AN0 20

21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

1NA /1A P

2NA /2A P

3NA /3A P

4NA /4A P

5NA /5A P

6NA /6A P

7NA /7A P

TSR

LAT XE

LAT X

VSS

VL

VLC3

VLC2

VLC1

0MO C

1MO C

2MO C

3MO C

0GE S

60 PD4/SEG20

59 PD3/SEG19

58 PD2/SEG18

57 PD1/SEG17

56 PD0/SEG16

55 SEG15

54 SEG14

53 SEG13

52 SEG12

51 SEG11

50 SEG10

49 SEG9

48 SEG8

47 SEG7

46 SEG6

45 SEG5

44 SEG4

43 SEG3

42 SEG2

41 SEG1

Note) Do not make any connections to NC (Pin 73).

– 4 –

CXP83508/83512/83516, CXP83509/83513/83517

Pin Assignment (Top View) CXP83509/83513/83517 (QFP package)

CMR /4E P

3TN I/3E P

2TN I/2E P

1TN I/1E P

CE/0 TNI /0E P

13G ES/ 7FP

03G ES/ 6FP

CN

XET /1IP

XT/0 IP

VDD

92G ES/ 5FP

82G ES/ 4FP

72G ES/ 3FP

62G ES/ 2FP

52G ES/ 1FP

42G ES/ 0FP

32G ES/ 7DP

22G ES/ 6DP

12G ES/ 5DP

80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61

PE5/TO 1

PE6/ADJ 2

PB0 3

PB1/CS0 4

PB2/SCK0 5

PB3/SI0 6

PB4/SO0 7

PB5/SCK1 8

PB6/SI1 9

PB7/SO1 10

PC0 11

PC1 12

PC2 13

PC3 14

PC4 15

PC5 16

PC6 17

PC7 18

PH0/INT4 19

PA0/AN0 20

21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

1NA /1A P

2NA /2A P

3NA /3A P

4NA /4A P

5NA /5A P

6NA /6A P

7NA /7A P

TSR

LAT XE

LAT X

VSS

VL

VLC3

VLC2

VLC1

0MO C

1MO C

2MO C

3MO C

0GE S

60 PD4/SEG20

59 PD3/SEG19

58 PD2/SEG18

57 PD1/SEG17

56 PD0/SEG16

55 SEG15

54 SEG14

53 SEG13

52 SEG12

51 SEG11

50 SEG10

49 SEG9

48 SEG8

47 SEG7

46 SEG6

45 SEG5

44 SEG4

43 SEG3

42 SEG2

41 SEG1

Note) Do not make any connections to NC (Pin 73).

– 5 –

 

 

 

 

 

 

 

 

 

 

CXP83508/83512/83516, CXP83509/83513/83517

 

 

 

 

 

 

 

 

 

 

 

Pin Description

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

I/O

 

 

Functions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(Port A)

 

 

 

 

 

 

 

 

 

 

8-bit I/O port. I/O can

 

 

 

 

 

 

 

 

 

 

be set in a bit unit.

 

 

PA0/AN0

 

Standby release input

 

 

 

can be set in a bit unit.

Analog inputs to A/D converter.

to

I/O/Analog input

Incorporation of pull-up

(8 pins)

PA7/AN7

 

 

resistor can be set

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

through the program in

 

 

 

 

 

 

 

 

 

 

a bit unit.

 

 

 

 

 

 

 

 

 

 

(8 pins)

 

 

 

 

 

 

 

 

 

 

 

 

 

PB0

I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PB1/CS0

 

 

 

 

 

I/O/Input

(Port B)

Chip select input for serial interface (CH0).

 

 

 

 

 

 

 

I/O/I/O

8-bit I/O port. I/O can

Serial clock I/O (CH0).

PB2/SCK0

be set in a bit unit.

 

 

 

 

 

 

 

 

 

 

PB3/SI0

I/O/Input

Serial data input (CH0).

Incorporation of pull-up

PB4/SO0

I/O/Output

resistor can be set

Serial data output (CH0).

through the program in

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O/I/O

Serial clock I/O (CH1).

PB5/SCK1

 

 

 

a bit unit.

PB6/SI1

I/O/Input

(8 pins)

Serial data input (CH1).

 

 

 

 

 

 

 

 

 

 

 

 

PB7/SO1

I/O/Output

 

Serial data output (CH1).

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(Port C)

 

 

 

 

 

 

 

 

 

 

8-bit I/O port. I/O can be set in a bit unit. Capable of driving 12mA sink

PC0 to PC7

I/O

current. Incorporation of pull-up resistor can be set through the program

 

 

 

 

 

 

 

 

in a bit unit.

 

 

 

 

 

 

 

 

 

 

(8 pins)

 

 

 

 

 

 

 

 

 

 

 

 

 

PE0/INT0/EC

 

 

Input/Input/Input

 

 

External event inputs for 8-bit timer/counter.

 

 

 

 

 

 

 

 

 

 

 

PE1/INT1

Input/Input

(Port E)

External interruption request inputs.

 

 

 

 

 

 

 

 

PE2/INT2

Input/Input

7-bit port. Lower 5 bits

(4 pins)

 

 

 

 

 

 

 

 

PE3/INT3

Input/Input

are for inputs; upper 2

 

 

 

 

 

 

 

 

 

 

bits are for outputs.

 

 

PE4/RMC

Input/Input

Remote control reception circuit input.

(7 pins)

 

 

 

 

 

 

 

 

 

 

PE5/TO

Output/Output

 

Output for 8-bit timer/counter rectangular wave.

 

 

 

 

 

 

 

 

 

 

 

PE6/ADJ

Output/Output

 

Output for TEX oscillation frequency division.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

(Port H)

 

 

 

 

 

 

 

 

 

 

1-bit I/O port.

 

 

PH0/INT4

I/O/Input

Incorporation of pull-up

External interruption request input.

resistor can be set

(1 pin)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

through the program.

 

 

 

 

 

 

 

 

 

 

(1 pin)

 

 

 

 

 

 

 

 

 

 

 

 

 

PI0/TX

Input

(Port I)

Crystal connectors for sub timer/counter clock

 

 

 

 

 

 

 

 

2-bit input port.

oscillation. For usage as event counter, input to

PI1/TEX

Input/Input

(2 pins)

TEX, and leave TX open.

 

 

 

 

 

 

 

 

 

 

 

– 6 –

 

 

 

 

 

CXP83508/83512/83516, CXP83509/83513/83517

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

I/O

 

Functions

 

 

 

 

 

 

 

PD0/SEG16

Output/Output

(Port D)

 

 

 

 

to

8-bit output port.

 

 

PD7/SEG23

 

(8 pins)

 

LCD segment signal outputs.

PF0/SEG24

Output/Output

(Port F)

 

(16 pins)

 

 

to

8-bit output port.

 

 

PF7/SEG31

 

(8 pins)

 

 

 

 

 

 

 

 

SEG0 to SEG15

Output

LCD segment signal output. (16 pins)

 

 

 

 

 

 

COM0 to COM3

Output

LCD common signal output. (4 pins)

 

 

 

 

 

 

VLC1 to VLC3

 

LCD bias power supply. (3 pins)

 

 

 

 

 

 

VL

Output

Control pin to cut off the current flowing to external LCD bias resistor

during standby.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EXTAL

Input

Crystal connectors for system clock oscillation. When the clock is supplied

XTAL

 

externally, input to EXTAL; opposite phase clock should be input to XTAL.

 

 

 

 

 

 

 

 

 

 

 

 

 

Low-level active system reset.

 

 

 

RST

 

Input

 

 

 

 

 

 

 

 

NC

 

NC. Do not make any connections to NC.

 

 

 

 

 

 

 

VDD

 

Positive power supply.

 

 

 

 

 

 

 

 

 

VSS

 

GND.

 

 

 

 

 

 

 

 

 

– 7 –

 

 

 

CXP83508/83512/83516, CXP83509/83513/83517

I/O Circuit Format for Pins

 

 

 

Pin

 

Circuit format

 

After a reset

 

Port A

 

 

 

 

Pull-up resistor

 

 

 

 

 

 

 

 

"0" after a reset

 

 

 

 

Port A data

 

 

 

PA0/AN0

Port A direction

 

 

Input protection

"0" after a reset

 

IP

to

 

circuit

 

 

 

 

 

Internal data bus

 

 

Hi-Z

PA7/AN7

 

 

 

 

 

 

RD (Port A)

 

 

 

 

Port A function select

Edge detection

 

 

 

"0" after a reset

 

 

 

circuit

 

 

 

 

 

 

 

Standby release

 

Input multiplexer

 

 

 

 

 

A/D converter

Pull-up transistor

8 pins approx. 100kΩ (VDD = 4.5 to 5.5V) approx. 150kΩ (VDD = 2.7 to 3.3V)

Port B

 

Pull-up resistor

 

 

"0" after a reset

 

Port B data

 

PB0

 

Port B direction

Hi-Z

 

"0" after a reset

IP

 

Internal data bus

 

RD (Port B)

Pull-up transistor

1 pin approx. 100kΩ (VDD = 4.5 to 5.5V) approx. 150kΩ (VDD = 2.7 to 3.3V)

 

Port B

 

 

Pull-up resistor

 

 

 

 

"0" after a reset

 

 

Port B data

 

PB1/CS0

 

 

PB3/SI0

 

 

PB6/SI1

Port B direction

Hi-Z

 

"0" after a reset

IP

 

 

 

Internal data bus

Schmitt input

 

 

 

RD (Port B)

 

 

 

Pull-up transistor

 

CS0

approx. 100kΩ (VDD = 4.5 to 5.5V)

3 pins

SI0

approx. 150kΩ (VDD = 2.7 to 3.3V)

 

SI1

 

– 8 –

Sony CXP83516, CXP83513, CXP83512, CXP83509, CXP83508 Datasheet

 

 

 

CXP83508/83512/83516, CXP83509/83513/83517

Pin

 

Circuit format

After a reset

 

Port B

 

 

 

Pull-up resistor

 

 

 

"0" after a reset

 

 

 

Output buffer capability

 

 

 

"0" after a reset

 

 

 

SCK out

 

 

PB2/SCK0

Serial clock output ebable

 

 

Port B function select

 

 

PB5/SCK1

 

Hi-Z

 

 

 

"0" after a reset

 

 

 

 

 

Port B data

 

 

 

Port B direction

 

IP

 

"0" after a reset

 

 

 

Internal

Schmitt input

 

 

data bus

 

 

 

RD (Port B)

 

Pull-up transistor

2 pins

 

 

SCK in

 

approx. 100kΩ (VDD = 4.5 to 5.5V)

 

 

approx. 150kΩ (VDD = 2.7 to 3.3V)

 

 

 

 

Port B

 

 

 

Pull-up resistor

 

 

 

 

 

 

"0" after a reset

 

 

 

Output buffer capability

 

 

 

"0" after a reset

 

 

 

SO

 

 

PB4/SO0

Serial data output ebable

 

 

 

 

 

PB7/SO1

Port B function select

 

Hi-Z

 

"0" after a reset

 

 

 

 

 

Port B data

 

 

 

Port B direction

 

IP

 

 

 

 

"0" after a reset

 

 

Internal data bus

RD (Port B)

Pull-up transistor

2 pins approx. 100kΩ (VDD = 4.5 to 5.5V) approx. 150kΩ (VDD = 2.7 to 3.3V)

 

Port C

 

 

Pull-up resistor

2

 

"0" after a reset

 

 

Port C data

 

PC0 to PC7

1

 

Port C direction

Hi-Z

 

IP

 

"0" after a reset

 

 

Internal data bus

 

 

RD (Port C)

 

 

1 High current drive

 

12mA (VDD = 4.5 to 5.5V)

 

4.5mA (VDD = 2.7 to 3.3V)

2 Pull-up transistor

8 pins approx. 100kΩ (VDD = 4.5 to 5.5V) approx. 150kΩ (VDD = 2.7 to 3.3V)

– 9 –

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