CXP83508/83512/83516
CXP83509/83513/83517
CMOS 8-bit Single Chip Microcomputer
Description |
CXP83508/83512/83516 |
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The CXP83508/83512/83516 and the CXP83509/ |
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80 pin QFP (Plastic) |
80 pin LQFP (Plastic) |
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83513/83517 are CMOS 8-bit single chip microcomputer |
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integrating on a single chip an A/D converter, serial |
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interface, timer/counter, time-base timer, sub timer/ |
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counter, LCD controller/driver and remote control |
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reception circuit besides the basic configurations of 8- |
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bit CPU, ROM, RAM, and I/O port. |
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The CXP83508/83512/83516 and the CXP83509/ |
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83513/83517 also provide a sleep/stop function that |
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enables lower power consumption. |
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Features
•Wide-range instruction system (213 instructions) to cover various types of data.
— 16-bit arithmetic/multiplication and division/boolean bit operation instructions
• Minimum instruction cycle 400ns at 10MHz operation (4.5 to 5.5V) 1µs at 4MHz operation (2.7 to 5.5V)
122µs at 32kHz operation (2.7 to 5.5V)
• Incorporated ROM capacity
8K bytes (CXP83508, 83509)
12K bytes (CXP83512, 83513)
16K bytes (CXP83516, 83517)
• Incorporated RAM capacity
608bytes (includes LCD display data area and serial interface RAM)
• Peripheral functions
— A/D converter
— Serial interface
— Timer
— LCD controller/driver
— Remote control reception circuit
• Interruption
• Standby mode
• Package
• Piggy/evaluation chip
Structure
Silicon gate CMOS IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
– 1 –
E98133B96
CXP83508/83512/83516, CXP83509/83513/83517
PA0 to PA7 |
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PB0 to PB7 |
PC0 to PC7 |
PD0 to PD7 |
PE0 to PE4 |
PE5 to PE6 |
PF0 to PF7 |
PH0 |
PI0 to PI1 |
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2 |
8 |
1 |
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A TROP |
B TROP |
C TROP |
D TROP |
E TROP |
F TROP |
H TROP |
I TROP |
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ssV DDV TSR LATX LATXE XT XET
4TNI 3TNI NI2T NI1T 0TNI
CLOCK GENERATOR/ |
SYSTEM CONTROL |
RAM |
608 BYTES |
SPC700 |
CPU CORE |
ROM |
8K/12K/16K BYTES |
INRETRPUTCONLORTLER
A/D CONVERTER |
LCD CONTROLLER/DRIVER |
REMOCON FIFO |
Block Diagram |
8 |
32 |
4 |
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AN0 to AN7 |
SEG0 to SEG31 |
COM0 to COM3 |
VL |
VLC1 |
VLC2 VLC3 |
RMC |
SUB TIMER/ |
COUNTER |
PRESCALER/ |
TIME-BASE TIMER |
3
2
BUFFER |
RAM |
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SERIAL INTERFACE UNIT (CH1) |
8-BIT TIMER/COUNTER 0 |
8-BIT TIMER 1 |
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SERIAL INTERFACE UNIT (CH0) |
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CS0 SI0 |
SO0 |
SCK0 |
SI1 SO1 SCK1 |
EC |
TO |
ADJ |
– 2 –
CXP83508/83512/83516, CXP83509/83513/83517
Pin Assignment (Top View) CXP83508/83512/83516 (QFP package)
2TN I/2E P |
1TN I/1E P |
CE/0 TNI /0E P |
13G ES/ 7FP |
03G ES/ 6FP |
CN |
XET /1IP |
XT/0 IP |
DD V
92G ES/ 5FP |
82G ES/ 4FP |
72G ES/ 3FP |
62G ES/ 2FP |
52G ES/ 1FP |
42G ES/ 0FP |
32G ES/ 7DP |
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80 |
79 |
78 |
77 |
76 |
75 |
74 |
73 |
72 |
71 |
70 |
69 |
68 |
67 |
66 |
65 |
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PE3/INT3 |
1 |
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64 |
PD6/SEG22 |
PE4/RMC |
2 |
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63 |
PD5/SEG21 |
PE5/TO |
3 |
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62 |
PD4/SEG20 |
PE6/ADJ |
4 |
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61 |
PD3/SEG19 |
PB0 |
5 |
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60 |
PD2/SEG18 |
PB1/CS0 |
6 |
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59 |
PD1/SEG17 |
PB2/SCK0 |
7 |
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58 |
PD0/SEG16 |
PB3/SI0 |
8 |
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57 |
SEG15 |
PB4/SO0 |
9 |
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56 |
SEG14 |
PB5/SCK1 |
10 |
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55 |
SEG13 |
PB6/SI1 |
11 |
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54 |
SEG12 |
PB7/SO1 |
12 |
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53 |
SEG11 |
PC0 |
13 |
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52 |
SEG10 |
PC1 |
14 |
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51 |
SEG9 |
PC2 |
15 |
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50 |
SEG8 |
PC3 |
16 |
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49 |
SEG7 |
PC4 |
17 |
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48 |
SEG6 |
PC5 |
18 |
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47 |
SEG5 |
PC6 |
19 |
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46 |
SEG4 |
PC7 |
20 |
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45 |
SEG3 |
PH0/INT4 |
21 |
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44 |
SEG2 |
PA0/AN0 |
22 |
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43 |
SEG1 |
PA1/AN1 |
23 |
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42 |
SEG0 |
PA2/AN2 |
24 |
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41 |
COM3 |
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25 |
26 |
27 |
28 |
29 |
30 |
31 |
32 |
33 |
34 |
35 |
36 |
37 |
38 |
39 |
40 |
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3NA /3A P |
4NA /4A P |
5NA /5A P |
6NA /6A P |
7NA /7A P |
TSR |
LAT XE |
LAT X |
SS V
VL
VLC3 |
VLC2 |
VLC1 |
0MO C |
1MO C |
2MO C |
Note) Do not make any connections to NC (Pin 75).
– 3 –
CXP83508/83512/83516, CXP83509/83513/83517
Pin Assignment (Top View) CXP83508/83512/83516 (LQFP package)
CMR /4E P |
3TN I/3E P |
2TN I/2E P |
1TN I/1E P |
CE/0 TNI /0E P |
13G ES/ 7FP |
03G ES/ 6FP |
CN |
XET /1IP |
XT/0 IP |
VDD |
92G ES/ 5FP |
82G ES/ 4FP |
72G ES/ 3FP |
62G ES/ 2FP |
52G ES/ 1FP |
42G ES/ 0FP |
32G ES/ 7DP |
22G ES/ 6DP |
12G ES/ 5DP |
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
PE5/TO 1
PE6/ADJ 2
PB0 3
PB1/CS0 4
PB2/SCK0 5
PB3/SI0 6
PB4/SO0 7
PB5/SCK1 8
PB6/SI1 9
PB7/SO1 10
PC0 11
PC1 12
PC2 13
PC3 14
PC4 15
PC5 16
PC6 17
PC7 18
PH0/INT4 19
PA0/AN0 20
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
1NA /1A P |
2NA /2A P |
3NA /3A P |
4NA /4A P |
5NA /5A P |
6NA /6A P |
7NA /7A P |
TSR |
LAT XE |
LAT X |
VSS |
VL |
VLC3 |
VLC2 |
VLC1 |
0MO C |
1MO C |
2MO C |
3MO C |
0GE S |
60 PD4/SEG20
59 PD3/SEG19
58 PD2/SEG18
57 PD1/SEG17
56 PD0/SEG16
55 SEG15
54 SEG14
53 SEG13
52 SEG12
51 SEG11
50 SEG10
49 SEG9
48 SEG8
47 SEG7
46 SEG6
45 SEG5
44 SEG4
43 SEG3
42 SEG2
41 SEG1
Note) Do not make any connections to NC (Pin 73).
– 4 –
CXP83508/83512/83516, CXP83509/83513/83517
Pin Assignment (Top View) CXP83509/83513/83517 (QFP package)
CMR /4E P |
3TN I/3E P |
2TN I/2E P |
1TN I/1E P |
CE/0 TNI /0E P |
13G ES/ 7FP |
03G ES/ 6FP |
CN |
XET /1IP |
XT/0 IP |
VDD |
92G ES/ 5FP |
82G ES/ 4FP |
72G ES/ 3FP |
62G ES/ 2FP |
52G ES/ 1FP |
42G ES/ 0FP |
32G ES/ 7DP |
22G ES/ 6DP |
12G ES/ 5DP |
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
PE5/TO 1
PE6/ADJ 2
PB0 3
PB1/CS0 4
PB2/SCK0 5
PB3/SI0 6
PB4/SO0 7
PB5/SCK1 8
PB6/SI1 9
PB7/SO1 10
PC0 11
PC1 12
PC2 13
PC3 14
PC4 15
PC5 16
PC6 17
PC7 18
PH0/INT4 19
PA0/AN0 20
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
1NA /1A P |
2NA /2A P |
3NA /3A P |
4NA /4A P |
5NA /5A P |
6NA /6A P |
7NA /7A P |
TSR |
LAT XE |
LAT X |
VSS |
VL |
VLC3 |
VLC2 |
VLC1 |
0MO C |
1MO C |
2MO C |
3MO C |
0GE S |
60 PD4/SEG20
59 PD3/SEG19
58 PD2/SEG18
57 PD1/SEG17
56 PD0/SEG16
55 SEG15
54 SEG14
53 SEG13
52 SEG12
51 SEG11
50 SEG10
49 SEG9
48 SEG8
47 SEG7
46 SEG6
45 SEG5
44 SEG4
43 SEG3
42 SEG2
41 SEG1
Note) Do not make any connections to NC (Pin 73).
– 5 –
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CXP83508/83512/83516, CXP83509/83513/83517 |
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Pin Description |
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Symbol |
I/O |
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Functions |
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(Port A) |
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8-bit I/O port. I/O can |
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be set in a bit unit. |
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PA0/AN0 |
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Standby release input |
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can be set in a bit unit. |
Analog inputs to A/D converter. |
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to |
I/O/Analog input |
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Incorporation of pull-up |
(8 pins) |
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PA7/AN7 |
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resistor can be set |
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through the program in |
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a bit unit. |
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(8 pins) |
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PB0 |
I/O |
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PB1/CS0 |
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I/O/Input |
(Port B) |
Chip select input for serial interface (CH0). |
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I/O/I/O |
8-bit I/O port. I/O can |
Serial clock I/O (CH0). |
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PB2/SCK0 |
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be set in a bit unit. |
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PB3/SI0 |
I/O/Input |
Serial data input (CH0). |
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Incorporation of pull-up |
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PB4/SO0 |
I/O/Output |
resistor can be set |
Serial data output (CH0). |
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through the program in |
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I/O/I/O |
Serial clock I/O (CH1). |
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PB5/SCK1 |
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a bit unit. |
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PB6/SI1 |
I/O/Input |
(8 pins) |
Serial data input (CH1). |
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PB7/SO1 |
I/O/Output |
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Serial data output (CH1). |
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(Port C) |
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8-bit I/O port. I/O can be set in a bit unit. Capable of driving 12mA sink |
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PC0 to PC7 |
I/O |
current. Incorporation of pull-up resistor can be set through the program |
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in a bit unit. |
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(8 pins) |
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PE0/INT0/EC |
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Input/Input/Input |
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External event inputs for 8-bit timer/counter. |
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PE1/INT1 |
Input/Input |
(Port E) |
External interruption request inputs. |
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PE2/INT2 |
Input/Input |
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7-bit port. Lower 5 bits |
(4 pins) |
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PE3/INT3 |
Input/Input |
are for inputs; upper 2 |
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bits are for outputs. |
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PE4/RMC |
Input/Input |
Remote control reception circuit input. |
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(7 pins) |
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PE5/TO |
Output/Output |
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Output for 8-bit timer/counter rectangular wave. |
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PE6/ADJ |
Output/Output |
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Output for TEX oscillation frequency division. |
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(Port H) |
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1-bit I/O port. |
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PH0/INT4 |
I/O/Input |
Incorporation of pull-up |
External interruption request input. |
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resistor can be set |
(1 pin) |
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through the program. |
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(1 pin) |
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PI0/TX |
Input |
(Port I) |
Crystal connectors for sub timer/counter clock |
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2-bit input port. |
oscillation. For usage as event counter, input to |
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PI1/TEX |
Input/Input |
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(2 pins) |
TEX, and leave TX open. |
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– 6 –
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CXP83508/83512/83516, CXP83509/83513/83517 |
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Symbol |
I/O |
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Functions |
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PD0/SEG16 |
Output/Output |
(Port D) |
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to |
8-bit output port. |
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PD7/SEG23 |
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(8 pins) |
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LCD segment signal outputs. |
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PF0/SEG24 |
Output/Output |
(Port F) |
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(16 pins) |
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to |
8-bit output port. |
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PF7/SEG31 |
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(8 pins) |
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SEG0 to SEG15 |
Output |
LCD segment signal output. (16 pins) |
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COM0 to COM3 |
Output |
LCD common signal output. (4 pins) |
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VLC1 to VLC3 |
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LCD bias power supply. (3 pins) |
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VL |
Output |
Control pin to cut off the current flowing to external LCD bias resistor |
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during standby. |
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EXTAL |
Input |
Crystal connectors for system clock oscillation. When the clock is supplied |
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XTAL |
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externally, input to EXTAL; opposite phase clock should be input to XTAL. |
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Low-level active system reset. |
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RST |
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Input |
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NC |
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NC. Do not make any connections to NC. |
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VDD |
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Positive power supply. |
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VSS |
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GND. |
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– 7 –
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CXP83508/83512/83516, CXP83509/83513/83517 |
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I/O Circuit Format for Pins |
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Pin |
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Circuit format |
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After a reset |
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Port A |
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Pull-up resistor |
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"0" after a reset |
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Port A data |
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PA0/AN0 |
Port A direction |
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Input protection |
"0" after a reset |
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IP |
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to |
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circuit |
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Internal data bus |
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Hi-Z |
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PA7/AN7 |
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RD (Port A) |
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Port A function select |
Edge detection |
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"0" after a reset |
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circuit |
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Standby release |
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Input multiplexer |
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A/D converter
Pull-up transistor
8 pins approx. 100kΩ (VDD = 4.5 to 5.5V) approx. 150kΩ (VDD = 2.7 to 3.3V)
Port B |
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Pull-up resistor |
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"0" after a reset |
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Port B data |
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PB0 |
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Port B direction |
Hi-Z |
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"0" after a reset |
IP |
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Internal data bus |
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RD (Port B)
Pull-up transistor
1 pin approx. 100kΩ (VDD = 4.5 to 5.5V) approx. 150kΩ (VDD = 2.7 to 3.3V)
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Port B |
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Pull-up resistor |
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"0" after a reset |
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Port B data |
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PB1/CS0 |
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PB3/SI0 |
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PB6/SI1 |
Port B direction |
Hi-Z |
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"0" after a reset |
IP |
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Internal data bus |
Schmitt input |
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RD (Port B) |
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Pull-up transistor |
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CS0 |
approx. 100kΩ (VDD = 4.5 to 5.5V) |
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3 pins |
SI0 |
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approx. 150kΩ (VDD = 2.7 to 3.3V) |
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SI1 |
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– 8 –
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CXP83508/83512/83516, CXP83509/83513/83517 |
Pin |
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Circuit format |
After a reset |
|
Port B |
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Pull-up resistor |
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"0" after a reset |
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Output buffer capability |
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"0" after a reset |
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SCK out |
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PB2/SCK0 |
Serial clock output ebable |
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Port B function select |
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PB5/SCK1 |
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Hi-Z |
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"0" after a reset |
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Port B data |
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Port B direction |
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IP |
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"0" after a reset |
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Internal |
Schmitt input |
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data bus |
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RD (Port B) |
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Pull-up transistor |
2 pins |
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SCK in |
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approx. 100kΩ (VDD = 4.5 to 5.5V) |
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approx. 150kΩ (VDD = 2.7 to 3.3V) |
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Port B |
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Pull-up resistor |
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"0" after a reset |
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Output buffer capability |
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"0" after a reset |
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SO |
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PB4/SO0 |
Serial data output ebable |
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PB7/SO1 |
Port B function select |
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Hi-Z |
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"0" after a reset |
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Port B data |
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Port B direction |
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IP |
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"0" after a reset |
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Internal data bus
RD (Port B)
Pull-up transistor
2 pins approx. 100kΩ (VDD = 4.5 to 5.5V) approx. 150kΩ (VDD = 2.7 to 3.3V)
|
Port C |
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Pull-up resistor |
2 |
|
"0" after a reset |
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Port C data |
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PC0 to PC7 |
1 |
|
Port C direction |
Hi-Z |
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IP |
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"0" after a reset |
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Internal data bus |
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RD (Port C) |
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1 High current drive |
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12mA (VDD = 4.5 to 5.5V) |
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4.5mA (VDD = 2.7 to 3.3V) |
2 Pull-up transistor
8 pins approx. 100kΩ (VDD = 4.5 to 5.5V) approx. 150kΩ (VDD = 2.7 to 3.3V)
– 9 –