MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21964-4/-4A/-4C/-4W
TRANSFER-MOLD TYPE
INSULATED TYPE
PS21964-4
INTEGRATED POWER FUNCTIONS
600V/15A low-loss 5th generation IGBT inverter bridge for
three phase DC-to-AC power conversion
INTEGRATED DRIVE, PROTECTION AND SYSTEM CONTROL FUNCTIONS
•For upper-leg IGBTS :Drive circuit, High voltage high-speed level shifting, Control supply under-voltage (UV) protection.
•For lower-leg IGBTS : Drive circuit, Control supply under-voltage protection (UV), Short circuit protection (SC).
•Fault signaling : Corresponding to an SC fault (Lower-leg IGBT) or a UV fault (Lower-side supply).
•Input interface : 3V, 5V line (High Active).
•UL Approved : Yellow Card No. E80276
APPLICATION
AC100V~200V three-phase inverter drive for small power motor control.
Fig. 1 PACKAGE OUTLINES (PS21964-4) |
Dimensions in mm |
A |
B |
38±0.5 |
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0.28
1.778 ±0.2
17
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.6 |
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12 |
-R1 |
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2 |
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20×1.778(=35.56)
35±0.3
QR |
Type name |
Code |
Lot No. |
3 MIN |
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16-0.5
1 |
(1) |
24±0.5
18 |
25 |
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0.28 |
8-0.6 |
4-C1.2 |
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2.54 ±0.2 |
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14×2.54(=35.56) |
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0.5 |
0.5 |
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0.5 |
0.5 |
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5.5±0.5 |
9.5±0.5 |
HEAT SINK SIDE |
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3.5
4 . 0
0.5 |
14.4±0.5 |
(3.5) |
29.2± |
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14.4±0.5 |
0.8 |
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0 . 4
2.5 MIN
(2.656)
(1.2)
(2.756)
DETAIL A
1.5 ±0.05
(3.3)
HEAT SINK SIDE
) ° (0~5
(1.2)
TERMINAL CODE
1.NC
2.VUFB
3.VVFB
4.VWFB
5.UP
6.VP
7.WP
8.VP1
9.VNC *
10.UN
11.VN
12.WN
13.VN1
14.FO
15.CIN
16.VNC *
17.NC
18.NC
19.NC
20.N
21.W
22.V
23.U
24.P
25.NC
1.5 |
MIN |
|
DETAIL B
*) Two VNC terminals (9 & 16 pin) are connected inside DIP-IPM, please connect either one to the 15V power supply GND outside and leave another one open.
Aug. 2007
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21964-4/-4A/-4C/-4W
TRANSFER-MOLD TYPE
INSULATED TYPE
Fig. 2 LONG TERMINAL TYPE PACKAGE OUTLINES (PS21964-4A)
0.28
1.778±0.2
17
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.6 |
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12 |
-R1 |
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2 |
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18
0.28
2.54±0.2
38±0.5
20×1.778(=35.56)
35±0.3
QR |
Type name |
Code |
Lot No. |
3 MIN |
|
A |
B |
|
3.5 |
16-0.5 |
1.5±0.05 |
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4 |
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. |
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0 |
1 |
(1) |
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0.5 |
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±0.5 |
14.4±0.5 |
(3.5) |
(3.3) |
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24± |
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29.4 |
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14.4±0.5 |
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0.8 |
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HEAT SINK SIDE |
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25 |
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4-C1.2 |
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. |
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8-0.6 |
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0 |
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4 |
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Dimensions in mm
TERMINAL CODE
1.NC
2.VUFB
3.VVFB
4.VWFB
5.UP
6.VP
7.WP
8.VP1
9.VNC *
10.UN
11.VN
12.WN
13.VN1
14.FO
15.CIN
16.VNC *
17.NC
18.NC
19.NC
20.N
21.W
22.V
23.U
24.P
25.NC
14×2.54(=35.56) |
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0.5 |
0.5 |
2.5 MIN |
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0.5 |
0.5 |
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(2.656) |
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0.5 |
14±0.5 |
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(1.2) |
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5.5± |
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(2.756) |
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HEAT SINK SIDE
DETAIL A
(1.2)
) ° (0~5
1.5 |
MIN |
|
DETAIL B
*) Two VNC terminals (9 & 16 pin) are connected inside DIP-IPM, please connect either one to the 15V power supply GND outside and leave another one open.
Fig. 3 ZIGZAG TERMINAL TYPE PACKAGE OUTLINES (PS21964-4C)
0.28
1.778±0.2
17
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|
.6 |
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12 |
-R1 |
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2 |
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38±0.5
20×1.778(=35.56)
35±0.3
QR |
Type name |
Code |
Lot No. |
3 MIN |
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A |
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B |
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3.5 |
16-0.5 |
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4 |
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. |
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0 |
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4 |
1 |
(1) |
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. |
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0 |
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24±0.5 |
33.7±0.5 |
29.2±0.5 |
18.9±0.5 |
14.4±0.5 |
(3.5) |
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14.4±0.5 |
0.8 |
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18 |
25 |
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0 |
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4-C1.2 |
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4 |
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0.28 |
8-0.6 |
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. |
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2.54±0.2 |
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14×2.54(=35.56) |
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0.5 |
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0.5 |
0.5 |
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(2.656) |
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5.5±0.5 |
0.5 |
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9.5± |
(1.2) |
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(2.756)
HEAT SINK SIDE
DETAIL A
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Dimensions in mm |
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TERMINAL CODE |
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1.5±0.05 |
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1. |
NC |
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2. |
VUFB |
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3. |
VVFB |
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4. |
VWFB |
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5. |
UP |
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6. |
VP |
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7. |
WP |
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8. |
VP1 |
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9. |
VNC * |
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10. |
UN |
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11. |
VN |
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12. |
WN |
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13. |
VN1 |
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14. |
FO |
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15. |
CIN |
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16. |
VNC * |
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17. |
NC |
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18. |
NC |
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19. |
NC |
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HEAT SINK SIDE |
20. |
N |
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21. |
W |
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22. |
V |
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) |
23. |
U |
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° |
24. |
P |
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(0~5 |
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25. |
NC |
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) |
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° |
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(0~5 |
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1.5 |
MIN |
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(1.2) |
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DETAIL B |
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*) Two VNC terminals (9 & 16 pin) are connected inside DIP-IPM, please connect either one to the 15V power supply GND outside and leave another one open.
Aug. 2007
2
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21964-4/-4A/-4C/-4W
TRANSFER-MOLD TYPE
INSULATED TYPE
Fig. 4 BOTH SIDES ZIGZAG TERMINAL TYPE PACKAGE OUTLINES (PS21964-4W)
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A |
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B |
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38±0.5 |
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3.5 |
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20×1.778(=35.56) |
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1.5±0.05 |
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0.28 |
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35±0.3 |
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1.778±0.25 |
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16-0.5 |
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4 |
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. |
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0 |
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17 |
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1 |
(1) |
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4 |
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. |
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17.4±0.5 |
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0 |
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0.5 |
±0.6 |
±0.5 |
14.4±0.5 |
(3.5) |
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QR |
Type name |
24± |
35.2 |
29.2 |
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|
.6 |
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0.8 |
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12 |
-R1 |
Code |
Lot No. |
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17.4±0.5 |
14.4±0.5 |
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2 |
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HEAT SINK SIDE |
|||||
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3 MIN |
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0 |
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. |
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(1.8) |
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4-C1.2 |
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4 |
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18 |
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25 |
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° |
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) |
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0.28 |
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7-0.6 |
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. |
(0~5 |
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2.54 ±0.25 |
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0 |
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4 |
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14×2.54(=35.56) |
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) |
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° |
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2.5 MIN |
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(0~5 |
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0.5 |
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0.5 |
0.5 |
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(2.656) |
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5.5±0.5 |
±0.5 |
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(1.2) |
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11 |
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(1.2) |
||
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(2.756) |
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HEAT SINK SIDE
DETAIL A
Dimensions in mm
TERMINAL CODE
1.NC
2.VUFB
3.VVFB
4.VWFB
5.UP
6.VP
7.WP
8.VP1
9.VNC *
10.UN
11.VN
12.WN
13.VN1
14.FO
15.CIN
16.VNC *
17.NC
18.NC
19.NC
20.N
21.W
22.V
23.U
24.P
25.NC
1.5 |
MIN |
|
DETAIL B
*) Two VNC terminals (9 & 16 pin) are connected inside DIP-IPM, please connect either one to the 15V power supply GND outside and leave another one open.
Fig. 5 INTERNAL FUNCTIONS BLOCK DIAGRAM (TYPICAL APPLICATION EXAMPLE)
C1 : Electrolytic type with good temperature and frequency |
High-side input (PWM) |
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–CBU |
–CBV CBU+ |
–CBW CBV+ |
CBW+ |
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(3V, 5V line)(Note 1, 2) |
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characteristics |
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C2 |
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(Note : The capacitance value depends on the PWM control |
Input signal |
Input signal |
Input signal |
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C1 |
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scheme used in the applied system). |
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(Note 6) |
||||||||||||||
conditioning |
conditioning |
conditioning |
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C2 : 0.22~2µF R-category ceramic capacitor for noise filtering. |
Level shifter |
Level shifter |
Level shifter |
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(Note 5) |
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Protection |
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circuit (UV) |
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Inrush current |
Drive circuit |
Drive circuit Drive circuit |
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limiter circuit |
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P |
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H-side IGBTS |
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DIP-IPM |
AC line input |
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U |
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(Note 4) |
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V |
M |
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W |
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(Note 7) |
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AC line output |
Z |
C |
N1 |
N |
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L-side IGBTS
|
VNC |
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Z : ZNR (Surge absorber) |
CIN |
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Drive circuit |
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C : AC filter (Ceramic capacitor 2.2~6.5nF) |
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(Note : Additionally, an appropriate line-to line |
Input signal conditioning |
Fo logic |
Protection |
Control supply |
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surge absorber circuit may become necessary |
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circuit |
Under-Voltage |
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depending on the application environment). |
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protection |
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(Note 6) |
Low-side input (PWM) FO |
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(3V, 5V line)(Note 1, 2) |
Fault output (5V line) |
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(Note 3) |
VNC |
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VD |
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(15V line) |
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Note1: Input logic is high-active. There is a 3.3kΩ (min) pull-down resistor built-in each input circuit. When using an external CR filter, please make it satisfy the input threshold voltage.
2:By virtue of integrating an application specific type HVIC inside the module, direct coupling to MCU terminals without any opto-coupler or transformer isolation is possible. (see also Fig. 11)
3:This output is open drain type. The signal line should be pulled up to the positive side of the 5V power supply with approximately 10kΩ resistor. (see also Fig. 11)
4:The wiring between the power DC link capacitor and the P, N1 terminals should be as short as possible to protect the DIP-IPM against catastrophic high surge voltages. For extra precaution, a small film type snubber capacitor (0.1~0.22µF, high voltage type) is recommended to be mounted close to these P & N1 DC power input pins.
5:High voltage (600V or more) and fast recovery type (less than 100ns) diodes should be used in the bootstrap circuit.
6:It is recommended to insert a Zener diode (24V/1W) between each pair of control supply terminals to prevent surge destruction.
7:Bootstrap negative electrodes should be connected to U, V, W terminals directly and separated from the main output wires.
Aug. 2007
3
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