NEC UPC2771TB-E3, UPC2771TB, UPC2771T-E3, UPC2771T, UPC2763TB-E3 Datasheet

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DATA SHEET

BIPOLAR ANALOG INTEGRATED CIRCUITS

μPC2762TB,μPC2763TB,μPC2771TB

3 V, SUPER MINIMOLD SILICON MMIC MEDIUM OUTPUT POWER AMPLIFIER FOR MOBILE COMMUNICATIONS

DESCRIPTION

The μPC2762TB, μPC2763TB and μPC2771TB are silicon monolithic integrated circuits designed as amplifier for mobile communications. Each of the ICs is packaged in super minimold package which is smaller than conventional minimold. The μPC2762TB, μPC2763TB and μPC2771TB have compatible pin connections and performance to

μPC2762T, μPC2763T and μPC2771T of conventional minimold version. So, in the case of reducing your system size, μPC2762TB, μPC2763TB and μPC2771TB are suitable to replace from μPC2762T, μPC2763T and μPC2771T.

These IC is manufactured using NEC’s 20 GHz fT NESAT™III silicon bipolar process. This process uses silicon nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability.

FEATURES

High-density surface mounting :

6-pin super minimold package (2.0 × 1.25 × 0.9 mm)

Supply voltage

: VCC = 2.7 to 3.3 V

Medium output power

: μPC2762TB: PO(1 dB) = +8.0 dBm TYP. @ 0.9 GHz

 

 

 

μPC2763TB: PO(1 dB) = +9.5 dBm TYP. @ 0.9 GHz

 

 

 

μPC2771TB: PO(1 dB) = +11.5 dBm TYP. @ 0.9 GHz

Power gain

: μPC2762TB: GP = 13 dB TYP. @ 0.9 GHz

 

 

 

μPC2763TB: GP = 20 dB TYP. @ 0.9 GHz

 

 

 

μPC2771TB: GP = 21 dB TYP. @ 0.9 GHz

APPLICATIONS

• Buffer amplifiers for mobile telephones : μPC2762TB, μPC2763TB

• PA driver for PDC800M

: μPC2771TB

 

 

ORDERING INFORMATION

 

 

 

 

 

 

Part Number

Package

Marking

Supplying Form

 

 

 

 

μPC2762TB-E3

 

C1Z

Embossed tape 8 mm wide.

 

 

 

1, 2, 3 pins face to perforation side of the tape.

μPC2763TB-E3

6-pin super minimold

C2A

Qty 3 kp/reel.

 

 

 

μPC2771TB-E3

 

C2H

 

 

 

 

 

 

Remark To order evaluation samples, please contact your local NEC sales office. (Part number for sample order: μPC2762TB, μPB2763TB, μPC2771TB)

Caution Electro-static sensitive devices

The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.

Document No. P12710EJ2V0DS00 (2nd edition)

The mark shows major revised points.

©

1997, 1999

Date Published June 1999 N CP(K)

Printed in Japan

μPC2762TB, μPC2763TB, μPC2771TB

PIN CONNECTIONS

 

(Top View)

 

 

 

(Bottom View)

 

1Z

 

 

 

 

3

4

 

4

 

 

 

 

 

 

 

 

 

 

 

2

5

 

5

 

 

C

 

 

 

 

 

 

 

 

 

1

6

 

6

 

 

 

 

 

 

 

 

 

 

 

 

 

Marking is an example of μPC2762TB

 

 

Pin No.

Pin Name

 

 

 

 

3

 

1

INPUT

 

 

 

 

2

GND

2

 

 

 

 

3

GND

1

 

 

 

 

 

4

OUTPUT

 

 

 

 

 

 

5

GND

 

 

 

 

 

 

6

VCC

 

 

 

 

PRODUCT LINE-UP (TA = +25 °C, V CC = Vout = 3.0 V, ZL = ZS = 50 Ω)

Part No.

fu

PO (1 dB)

PO (sat)

GP

ICC

Package

Marking

(GHz)

(dBm)

(dBm)

(dB)

(mA)

 

 

 

 

 

 

 

 

 

 

 

μPC2762T

2.9

+8.0

+9.0

13

26.5

6-pin minimold

C1Z

 

 

 

 

 

 

 

μPC2762TB

 

 

 

 

 

6-pin super minimold

 

 

 

 

 

 

 

 

 

 

 

 

 

 

μPC2763T

2.7

+9.5

+11.0

20

27.0

6-pin minimold

C2A

 

 

 

 

 

 

 

μPC2763TB

 

 

 

 

 

6-pin super minimold

 

 

 

 

 

 

 

 

 

 

 

 

 

 

μPC2771T

2.2

+11.5

+12.5

21

36.0

6-pin minimold

C2H

 

 

 

 

 

 

 

μPC2771TB

 

 

 

 

 

6-pin super minimold

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Remark Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail.

Notice The package size distinguishes between minimold and super minimold.

2

Data Sheet P12710EJ2V0DS00

 

μPC2762TB, μPC2763TB, μPC2771TB

SYSTEM APPLICATION EXAMPLE

 

 

Digital cellular telephone

 

 

RX

DEMO

I

 

Q

 

 

 

N

PLL

SW

 

PLL

 

 

 

 

I

 

 

0 °

TX

 

Phase

 

shifter

 

 

PA

μ PC2762TB

90 °

 

Q

 

or

 

 

μPC2763TB

μPC2771TB

Note The insertion point is different due to the specifications of conjunct devices.

For conjunction with your devices, refer to the data sheets to confirm their conbination.

Data Sheet P12710EJ2V0DS00

3

μPC2762TB, μPC2763TB, μPC2771TB

PIN EXPLANATION

Pin

 

Applied

Pin

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Pin Name

Voltage

Voltage

Function and Applications

 

Internal Equivalent Circuit

No.

 

 

(V)

(V)Note

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

INPUT

1.31

Signal input pin. A internal

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

matching circuit, configured with

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

resistors, enables 50 Ω

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

connection over a wide band.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1.01

A multi-feedback circuit is

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

designed to cancel the

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

deviations of hFE and resistance.

 

 

 

 

 

 

 

 

6

 

 

 

0.97

This pin must be coupled to

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

signal source with capacitor for

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DC cut.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

OUTPUT

Voltage

Signal output pin. The inductor

 

 

 

 

 

 

 

 

4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

as same

 

must be attached between VCC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

as VCC

 

and output pins to supply

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

through

 

current to the internal output

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

external

 

transistors.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

inductor

 

 

 

 

 

*

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6

VCC

2.7 to 3.3

Power supply pin, which biases

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

the internal input transistor.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

This pin should be externally

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

equipped with bypass capacitor

3

 

 

 

 

 

2

5

 

 

 

 

 

to minimize its impedance.

GND

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

GND

0

Ground pin. This pin should be

 

 

 

 

 

 

 

 

 

 

 

 

 

3

 

 

 

connected to system ground

* μPC2762TB does not have

5

 

 

 

with minimum inductance.

 

 

 

 

this capacitance.

 

 

 

 

 

 

 

 

 

 

Ground pattern on the board

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

should be formed as wide as

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

possible.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

All the ground pins must be

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

connected together with wide

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ground pattern to decrease

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

impedance difference.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Note Pin voltage is measured at VCC = 3.0 V. Above: μPC2762TB, Center: μPC2763TB, Below: μPC2771TB.

4

Data Sheet P12710EJ2V0DS00

μPC2762TB, μPC2763TB, μPC2771TB

ABSOLUTE MAXIMUM RATINGS

 

 

 

 

Ratings

 

 

Parameter

Symbol

 

Conditions

 

 

 

 

Unit

 

μPC2762TB

 

μPC2771TB

 

 

 

 

 

 

 

 

 

 

μPC2763TB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Supply Voltage

VCC

TA = +25

°C, pin 4 and 6

 

3.6

 

V

 

 

 

 

 

 

 

 

 

Total Circuit Current

ICC

TA = +25

°C

70

 

 

77.7

mA

 

 

 

 

 

 

 

 

Power Dissipation

PD

Mounted on double copper clad

 

200

 

mW

 

 

50 × 50 × 1.6 mm epoxy glass PWB

 

 

 

 

 

 

 

TA = +85

°C

 

 

 

 

 

 

 

 

 

 

 

 

Operating Ambient

TA

 

 

40 to +85

 

°C

Temperature

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Storage Temperature

Tstg

 

 

55 to +150

 

°C

 

 

 

 

 

 

 

 

 

Input Power

Pin

TA = +25

°C

+10

 

 

+13

dBm

 

 

 

 

 

 

 

 

 

RECOMMENDED OPERATING CONDITIONS

Parameter

Symbol

MIN.

TYP.

MAX.

Unit

Remark

 

 

 

 

 

 

 

Supply Voltage

VCC

2.7

3.0

3.3

V

Same voltage should be applied to pin

 

 

 

 

 

 

4 and 6.

 

 

 

 

 

 

 

Operating Ambient

TA

40

+25

+85

°C

Temperature

 

 

 

 

 

 

 

 

 

 

 

 

 

Operating Frequency

fopt

0.8

1.9

GHz

Only for μPC2771TB

 

 

 

 

 

 

 

Data Sheet P12710EJ2V0DS00

5

μPC2762TB, μPC2763TB, μPC2771TB

ELECTRICAL CHARACTERISTICS (TA = +25 °C, V CC = Vout = 3.0 V, ZL = ZS = 50 Ω)

μPC2762TB, μPC2763TB

Parameter

Symbol

Test Conditions

 

μPC2762TB

 

 

μPC2763TB

 

Unit

 

 

 

 

 

 

 

 

 

 

MIN.

 

TYP.

 

MAX.

MIN.

 

TYP.

 

MAX.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Circuit Current

ICC

No signal

 

26.5

 

35.0

 

27.0

 

35.0

mA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Power Gain

GP

f = 0.9 GHz

11

 

13

 

16

18

 

20

 

23

dB

 

 

f = 1.9 GHz

11.5

 

15.5

 

17.5

18

 

21

 

24

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Noise Figure

NF

f = 0.9 GHz

 

6.5

 

8.0

 

5.5

 

7.0

dB

 

 

f = 1.9 GHz

 

7.0

 

9.0

 

5.5

 

7.5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Upper Limit Operating

fu

3 dB down below

2.7

 

2.9

 

2.3

 

2.7

 

GHz

Frequency

 

from gain at

 

 

 

 

 

 

 

 

 

 

 

 

 

f = 0.1 GHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Isolation

ISL

f = 0.9 GHz

22

 

27

 

25

 

30

 

dB

 

 

f = 1.9 GHz

20

 

25

 

24

 

29

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Input Return Loss

RLin

f = 0.9 GHz

6.0

 

9.0

 

8.0

 

11.0

 

dB

 

 

f = 1.9 GHz

5.5

 

8.5

 

8.0

 

11.0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Output Return Loss

RLout

f = 0.9 GHz

8.0

 

11.0

 

5.0

 

7.0

 

dB

 

 

f = 1.9 GHz

9.0

 

12.0

 

6.0

 

9.0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1 dB Gain Compres-

PO (1 dB)

f = 0.9 GHz

+5.5

 

+8.0

 

+7.0

 

+9.5

 

dBm

sion Output Level

 

f = 1.9 GHz

+4.5

 

+7.0

 

+4.0

 

+6.5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

μPC2771TB

Parameter

Symbol

Test Conditions

 

μPC2771TB

 

Unit

 

 

 

 

 

MIN.

 

TYP.

 

MAX.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Circuit Current

ICC

No signal

 

36.0

 

45.0

mA

 

 

 

 

 

 

 

 

 

Power Gain

GP

f = 0.9 GHz

19

 

21

 

24

dB

 

 

f = 1.5 GHz

18

 

21

 

24

 

 

 

 

 

 

 

 

 

 

Noise Figure

NF

f = 0.9 GHz

 

6.0

 

7.5

dB

 

 

f = 1.5 GHz

 

6.0

 

7.5

 

 

 

 

 

 

 

 

 

 

Upper Limit Operating

fu

3 dB down below from gain at f = 0.1 GHz

1.8

 

2.2

 

GHz

Frequency

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Isolation

ISL

f = 0.9 GHz

25

 

30

 

dB

 

 

f = 1.5 GHz

25

 

30

 

 

 

 

 

 

 

 

 

 

 

Input Return Loss

RLin

f = 0.9 GHz

10

 

14

 

dB

 

 

f = 1.5 GHz

10

 

14

 

 

 

 

 

 

 

 

 

 

 

Output Return Loss

RLout

f = 0.9 GHz

6.5

 

9.0

 

dB

 

 

f = 1.5 GHz

5.5

 

8.5

 

 

 

 

 

 

 

 

 

 

 

1 dB Gain Compres-

PO (1 dB)

f = 0.9 GHz

+9.0

 

+11.5

 

dBm

Sion Output Level

 

f = 1.5 GHz

+7.0

 

+9.5

 

 

 

 

 

 

 

 

 

 

 

Saturated Output

PO (sat)

f = 0.9 GHz

 

+12.5

 

dBm

Power Level

 

f = 1.5 GHz

 

+11

 

 

 

 

 

 

 

 

 

 

 

6

Data Sheet P12710EJ2V0DS00

μPC2762TB, μPC2763TB, μPC2771TB

STANDARD CHARACTERISTICS FOR REFERENCE (TA = +25 °C, V CC = Vout = 3.0 V, ZL = ZS = 50 Ω)

μPC2762TB, μPC2763TB

 

 

 

 

 

 

 

 

Reference

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

Symbol

Test Conditions

 

μPC2762TB

 

 

μPC2763TB

 

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MIN.

TYP.

MAX.

MIN.

TYP.

MAX.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Saturated

PO (sat)

f = 0.9 GHz

 

 

+9.0

 

 

+11.0

 

dBm

Output Power

 

f = 1.9 GHz

 

 

+8.5

 

 

+8.0

 

 

Level

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Adjacent channel

Padj

f = 0.9 GHz

f = ±50 kHz

 

64

 

 

61

 

dBc

power

 

π/4 QPSK waveNote

f = ±100 kHz

 

64

 

 

62

 

 

 

 

PO = +4 dBm

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Third order

IM3

2 sine wave input.

f1 = 0.900 GHz

 

16

 

 

27

 

dBc

intermodulation

 

Output of each tone

f2 = 0.902 GHz

 

 

 

 

 

 

 

 

 

 

 

distortion

 

PO (each) = +4 dBm

 

 

 

 

 

 

 

 

 

 

 

 

 

f1 = 1.900 GHz

 

10

 

 

14

 

dBc

 

 

 

f2 = 1.902 GHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

μPC2771TB

 

 

 

 

 

 

Reference

 

 

 

 

 

 

 

 

 

 

 

 

 

Parameter

Symbol

 

Test Conditions

 

μPC2771TB

 

Unit

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MIN.

 

TYP.

MAX.

 

 

 

 

 

 

 

 

 

 

 

 

Adjacent channel

Padj1

f = 0.9 GHz

 

f = ±50 kHz

 

61

 

dBc

power 1

 

π/4 QPSK waveNote

 

f = ±100 kHz

 

72

 

 

 

 

PO = +7 dBm

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Adjacent channel

Padj2

f = 1.5 GHz

 

f = ±50 kHz

 

59

 

dBc

power 2

 

π/4 QPSK waveNote

 

f = ±100 kHz

 

71

 

 

 

 

PO = +7 dBm

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Third order

IM3

2 sine wave input.

 

f1 = 0.900 GHz

 

18

 

dBc

intermodulation

 

Output of each tone

 

f2 = 0.902 GHz

 

 

 

 

 

 

distortion

 

PO (each) = +7 dBm

 

 

 

 

 

 

 

 

 

 

f1 = 1.500 GHz

 

12

 

dBc

 

 

 

 

f2 = 1.502 GHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Note π/4 DQPSK modulated wave input, data rate 42 kbps, Filter roll off α = 0.5, PN 9

Data Sheet P12710EJ2V0DS00

7

μPC2762TB, μPC2763TB, μPC2771TB

TEST CIRCUIT

VCC

 

 

1 000 pF

 

 

 

 

C3

 

 

 

 

6

L

 

 

 

 

 

50 Ω

C1

4

C2

50 Ω

IN

1

 

OUT

 

 

 

 

1 000 pF

 

1 000 pF

 

 

 

2, 3, 5

 

 

COMPONENTS OF TEST CIRCUIT FOR MEASURING ELECTRICAL CHARACTERISTICS

 

Type

Value

 

 

 

C1, C2

Bias Tee

1 000 pF

 

 

 

C3

Capacitor

1 000 pF

 

 

 

L

Bias Tee

1 000 nH

 

 

 

EXAMPLE OF ACTUAL APPLICATION COMPONENTS

 

Type

Value

Operating Frequency

 

 

 

 

C1 to C3

Chip capacitor

1 000 pF

100 MHz or higher

 

 

 

 

L

Chip inductor

100 nH

100 MHz or higher

 

 

 

 

 

 

10 nH

2.0 GHz or higher

 

 

 

 

INDUCTOR FOR THE OUTPUT PIN

The internal output transistor of this IC consumes 20 mA, to output medium power. To supply current for output transistor, connect an inductor between the Vcc pin (pin 6) and output pin (pin 4). Select large value inductance, as listed above.

The inductor has both DC and AC effects. In terms of DC, the inductor biases the output transistor with minimum voltage drop to output enable high level. In terms of AC, the inductor make output-port-impedance higher to get enough gain. In this case, large inductance and Q is suitable.

For above reason, select an inductance of 100 Ω or over impedance in the operating frequency. The gain is a peak in the operating frequency band, and suppressed at lower frequencies.

The recommendable inductance can be chosen from example of actual application components list as shown above.

CAPACITORS FOR THE VCC, INPUT, AND OUTPUT PINS

Capacitors of 1 000 pF are recommendable as the bypass capacitor for the Vcc pin and the coupling capacitors for the input and output pins.

The bypass capacitor connected to the Vcc pin is used to minimize ground impedance of Vcc pin. So, stable bias can be supplied against Vcc fluctuation.

The coupling capacitors, connected to the input and output pins, are used to cut the DC and minimize RF serial impedance. Their capacitance are therefore selected as lower impedance against a 50 Ω load. The capacitors thus perform as high pass filters, suppressing low frequencies to DC.

To obtain a flat gain from 100 MHz upwards, 1 000 pF capacitors are used in the test circuit. In the case of under 10 MHz operation, increase the value of coupling capacitor such as 10 000 pF. Because the coupling capacitors are determined by equation, C = 1/(2πRfc).

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Data Sheet P12710EJ2V0DS00

NEC UPC2771TB-E3, UPC2771TB, UPC2771T-E3, UPC2771T, UPC2763TB-E3 Datasheet

μPC2762TB, μPC2763TB, μPC2771TB

ILLUSTRATION OF THE TEST CIRCUIT ASSEMBLED ON EVALUATION BOARD

 

 

 

 

 

 

 

 

 

AMP-2

 

Top View

 

 

 

 

2

3

 

 

 

 

 

IN

OUT

1

 

 

 

 

 

 

 

 

C1Z

 

 

 

C

C

 

 

 

 

 

 

 

 

 

 

 

4

 

 

 

 

 

 

 

 

5

 

 

L

 

 

 

 

6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Mounting direction

 

 

 

 

 

 

 

 

 

(Marking is an example for

PC2762TB)

 

 

 

 

 

 

 

 

 

 

 

VCC

 

 

 

 

 

 

 

 

 

C

COMPONENT LIST

 

 

 

 

 

 

 

Notes

 

 

Value

 

 

C

1 000 pF

 

 

L

Example: 10 nH

 

 

1.30 × 30 × 0.4 mm double sided copper clad polyimide board.

2.Back side: GND pattern

3.Solder plated on pattern

4.: Through holes

For more information on the use of this IC, refer to the following application note: USAGE AND APPLICATION OF SILICON MEDIUM-POWER HIGH-FREQUENCY AMPLIFIER MMIC (P12152E).

Data Sheet P12710EJ2V0DS00

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