DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUITS
μPC2762TB,μPC2763TB,μPC2771TB
3 V, SUPER MINIMOLD SILICON MMIC MEDIUM OUTPUT POWER AMPLIFIER FOR MOBILE COMMUNICATIONS
The μPC2762TB, μPC2763TB and μPC2771TB are silicon monolithic integrated circuits designed as amplifier for mobile communications. Each of the ICs is packaged in super minimold package which is smaller than conventional minimold. The μPC2762TB, μPC2763TB and μPC2771TB have compatible pin connections and performance to
μPC2762T, μPC2763T and μPC2771T of conventional minimold version. So, in the case of reducing your system size, μPC2762TB, μPC2763TB and μPC2771TB are suitable to replace from μPC2762T, μPC2763T and μPC2771T.
These IC is manufactured using NEC’s 20 GHz fT NESAT™III silicon bipolar process. This process uses silicon nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability.
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High-density surface mounting : |
6-pin super minimold package (2.0 × 1.25 × 0.9 mm) |
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Supply voltage |
: VCC = 2.7 to 3.3 V |
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Medium output power |
: μPC2762TB: PO(1 dB) = +8.0 dBm TYP. @ 0.9 GHz |
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μPC2763TB: PO(1 dB) = +9.5 dBm TYP. @ 0.9 GHz |
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μPC2771TB: PO(1 dB) = +11.5 dBm TYP. @ 0.9 GHz |
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Power gain |
: μPC2762TB: GP = 13 dB TYP. @ 0.9 GHz |
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μPC2763TB: GP = 20 dB TYP. @ 0.9 GHz |
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μPC2771TB: GP = 21 dB TYP. @ 0.9 GHz |
• Buffer amplifiers for mobile telephones : μPC2762TB, μPC2763TB
• PA driver for PDC800M |
: μPC2771TB |
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ORDERING INFORMATION |
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Part Number |
Package |
Marking |
Supplying Form |
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μPC2762TB-E3 |
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C1Z |
Embossed tape 8 mm wide. |
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1, 2, 3 pins face to perforation side of the tape. |
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μPC2763TB-E3 |
6-pin super minimold |
C2A |
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Qty 3 kp/reel. |
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μPC2771TB-E3 |
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C2H |
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Remark To order evaluation samples, please contact your local NEC sales office. (Part number for sample order: μPC2762TB, μPB2763TB, μPC2771TB)
Caution Electro-static sensitive devices
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.
Document No. P12710EJ2V0DS00 (2nd edition) |
The mark shows major revised points. |
© |
1997, 1999 |
Date Published June 1999 N CP(K)
Printed in Japan
μPC2762TB, μPC2763TB, μPC2771TB
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Marking is an example of μPC2762TB
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Pin No. |
Pin Name |
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3 |
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INPUT |
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GND |
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GND |
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OUTPUT |
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5 |
GND |
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6 |
VCC |
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PRODUCT LINE-UP (TA = +25 °C, V CC = Vout = 3.0 V, ZL = ZS = 50 Ω)
Part No. |
fu |
PO (1 dB) |
PO (sat) |
GP |
ICC |
Package |
Marking |
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μPC2762T |
2.9 |
+8.0 |
+9.0 |
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26.5 |
6-pin minimold |
C1Z |
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μPC2762TB |
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6-pin super minimold |
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μPC2763T |
2.7 |
+9.5 |
+11.0 |
20 |
27.0 |
6-pin minimold |
C2A |
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μPC2763TB |
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6-pin super minimold |
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μPC2771T |
2.2 |
+11.5 |
+12.5 |
21 |
36.0 |
6-pin minimold |
C2H |
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μPC2771TB |
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6-pin super minimold |
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Remark Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail.
Notice The package size distinguishes between minimold and super minimold.
2 |
Data Sheet P12710EJ2V0DS00 |
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μPC2762TB, μPC2763TB, μPC2771TB |
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SYSTEM APPLICATION EXAMPLE |
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Digital cellular telephone |
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RX |
DEMO |
I |
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Q |
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N |
PLL |
SW |
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PLL |
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0 ° |
TX |
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Phase |
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shifter |
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PA |
μ PC2762TB |
90 ° |
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Q |
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or |
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μPC2763TB
μPC2771TB
Note The insertion point is different due to the specifications of conjunct devices.
For conjunction with your devices, refer to the data sheets to confirm their conbination.
Data Sheet P12710EJ2V0DS00 |
3 |
μPC2762TB, μPC2763TB, μPC2771TB
Pin |
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Pin |
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Pin Name |
Voltage |
Voltage |
Function and Applications |
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Internal Equivalent Circuit |
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(V) |
(V)Note |
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1 |
INPUT |
– |
1.31 |
Signal input pin. A internal |
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matching circuit, configured with |
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resistors, enables 50 Ω |
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connection over a wide band. |
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1.01 |
A multi-feedback circuit is |
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designed to cancel the |
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deviations of hFE and resistance. |
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6 |
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0.97 |
This pin must be coupled to |
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signal source with capacitor for |
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DC cut. |
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4 |
OUTPUT |
Voltage |
– |
Signal output pin. The inductor |
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4 |
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as same |
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must be attached between VCC |
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as VCC |
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and output pins to supply |
1 |
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through |
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current to the internal output |
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external |
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transistors. |
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inductor |
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6 |
VCC |
2.7 to 3.3 |
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Power supply pin, which biases |
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the internal input transistor. |
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This pin should be externally |
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equipped with bypass capacitor |
3 |
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2 |
5 |
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to minimize its impedance. |
GND |
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GND |
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2 |
GND |
0 |
– |
Ground pin. This pin should be |
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3 |
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connected to system ground |
* μPC2762TB does not have |
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5 |
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with minimum inductance. |
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this capacitance. |
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Ground pattern on the board |
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should be formed as wide as |
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possible. |
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All the ground pins must be |
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connected together with wide |
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ground pattern to decrease |
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impedance difference. |
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Note Pin voltage is measured at VCC = 3.0 V. Above: μPC2762TB, Center: μPC2763TB, Below: μPC2771TB.
4 |
Data Sheet P12710EJ2V0DS00 |
μPC2762TB, μPC2763TB, μPC2771TB
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Ratings |
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Parameter |
Symbol |
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Conditions |
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Unit |
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μPC2762TB |
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μPC2771TB |
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μPC2763TB |
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Supply Voltage |
VCC |
TA = +25 |
°C, pin 4 and 6 |
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3.6 |
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V |
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Total Circuit Current |
ICC |
TA = +25 |
°C |
70 |
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77.7 |
mA |
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Power Dissipation |
PD |
Mounted on double copper clad |
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200 |
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mW |
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50 × 50 × 1.6 mm epoxy glass PWB |
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TA = +85 |
°C |
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Operating Ambient |
TA |
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−40 to +85 |
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°C |
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Temperature |
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Storage Temperature |
Tstg |
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−55 to +150 |
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°C |
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Input Power |
Pin |
TA = +25 |
°C |
+10 |
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+13 |
dBm |
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Parameter |
Symbol |
MIN. |
TYP. |
MAX. |
Unit |
Remark |
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Supply Voltage |
VCC |
2.7 |
3.0 |
3.3 |
V |
Same voltage should be applied to pin |
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4 and 6. |
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Operating Ambient |
TA |
−40 |
+25 |
+85 |
°C |
− |
Temperature |
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Operating Frequency |
fopt |
0.8 |
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1.9 |
GHz |
Only for μPC2771TB |
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Data Sheet P12710EJ2V0DS00 |
5 |
μPC2762TB, μPC2763TB, μPC2771TB
ELECTRICAL CHARACTERISTICS (TA = +25 °C, V CC = Vout = 3.0 V, ZL = ZS = 50 Ω)
μPC2762TB, μPC2763TB
Parameter |
Symbol |
Test Conditions |
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μPC2762TB |
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μPC2763TB |
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Unit |
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MIN. |
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TYP. |
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MAX. |
MIN. |
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TYP. |
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MAX. |
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Circuit Current |
ICC |
No signal |
− |
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26.5 |
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35.0 |
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27.0 |
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35.0 |
mA |
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Power Gain |
GP |
f = 0.9 GHz |
11 |
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16 |
18 |
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20 |
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23 |
dB |
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f = 1.9 GHz |
11.5 |
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15.5 |
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17.5 |
18 |
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Noise Figure |
NF |
f = 0.9 GHz |
− |
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6.5 |
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8.0 |
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5.5 |
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7.0 |
dB |
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f = 1.9 GHz |
− |
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7.0 |
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9.0 |
− |
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5.5 |
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7.5 |
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Upper Limit Operating |
fu |
3 dB down below |
2.7 |
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2.9 |
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2.3 |
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2.7 |
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GHz |
Frequency |
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from gain at |
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f = 0.1 GHz |
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Isolation |
ISL |
f = 0.9 GHz |
22 |
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27 |
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25 |
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30 |
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dB |
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f = 1.9 GHz |
20 |
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25 |
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− |
24 |
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29 |
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Input Return Loss |
RLin |
f = 0.9 GHz |
6.0 |
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9.0 |
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− |
8.0 |
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11.0 |
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dB |
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f = 1.9 GHz |
5.5 |
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8.5 |
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− |
8.0 |
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11.0 |
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Output Return Loss |
RLout |
f = 0.9 GHz |
8.0 |
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11.0 |
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5.0 |
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7.0 |
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dB |
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f = 1.9 GHz |
9.0 |
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12.0 |
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− |
6.0 |
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9.0 |
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1 dB Gain Compres- |
PO (1 dB) |
f = 0.9 GHz |
+5.5 |
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+8.0 |
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− |
+7.0 |
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+9.5 |
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dBm |
sion Output Level |
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f = 1.9 GHz |
+4.5 |
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+7.0 |
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− |
+4.0 |
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+6.5 |
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− |
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μPC2771TB
Parameter |
Symbol |
Test Conditions |
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μPC2771TB |
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Unit |
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MIN. |
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TYP. |
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MAX. |
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Circuit Current |
ICC |
No signal |
− |
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36.0 |
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45.0 |
mA |
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Power Gain |
GP |
f = 0.9 GHz |
19 |
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21 |
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24 |
dB |
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f = 1.5 GHz |
18 |
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21 |
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24 |
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Noise Figure |
NF |
f = 0.9 GHz |
− |
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6.0 |
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7.5 |
dB |
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f = 1.5 GHz |
− |
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6.0 |
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7.5 |
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Upper Limit Operating |
fu |
3 dB down below from gain at f = 0.1 GHz |
1.8 |
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2.2 |
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− |
GHz |
Frequency |
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Isolation |
ISL |
f = 0.9 GHz |
25 |
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30 |
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− |
dB |
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f = 1.5 GHz |
25 |
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30 |
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− |
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Input Return Loss |
RLin |
f = 0.9 GHz |
10 |
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14 |
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− |
dB |
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f = 1.5 GHz |
10 |
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14 |
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− |
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Output Return Loss |
RLout |
f = 0.9 GHz |
6.5 |
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9.0 |
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− |
dB |
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f = 1.5 GHz |
5.5 |
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8.5 |
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− |
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1 dB Gain Compres- |
PO (1 dB) |
f = 0.9 GHz |
+9.0 |
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+11.5 |
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− |
dBm |
Sion Output Level |
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f = 1.5 GHz |
+7.0 |
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+9.5 |
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− |
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Saturated Output |
PO (sat) |
f = 0.9 GHz |
− |
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+12.5 |
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− |
dBm |
Power Level |
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f = 1.5 GHz |
− |
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+11 |
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− |
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6 |
Data Sheet P12710EJ2V0DS00 |
μPC2762TB, μPC2763TB, μPC2771TB
STANDARD CHARACTERISTICS FOR REFERENCE (TA = +25 °C, V CC = Vout = 3.0 V, ZL = ZS = 50 Ω)
μPC2762TB, μPC2763TB
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Reference |
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Parameter |
Symbol |
Test Conditions |
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μPC2762TB |
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μPC2763TB |
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Unit |
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MIN. |
TYP. |
MAX. |
MIN. |
TYP. |
MAX. |
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Saturated |
PO (sat) |
f = 0.9 GHz |
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− |
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+9.0 |
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− |
− |
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+11.0 |
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− |
dBm |
Output Power |
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f = 1.9 GHz |
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− |
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+8.5 |
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− |
− |
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+8.0 |
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− |
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Level |
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Adjacent channel |
Padj |
f = 0.9 GHz |
f = ±50 kHz |
− |
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−64 |
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− |
− |
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−61 |
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− |
dBc |
power |
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π/4 QPSK waveNote |
f = ±100 kHz |
− |
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−64 |
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− |
− |
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−62 |
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− |
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PO = +4 dBm |
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Third order |
IM3 |
2 sine wave input. |
f1 = 0.900 GHz |
− |
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−16 |
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− |
− |
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−27 |
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− |
dBc |
intermodulation |
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Output of each tone |
f2 = 0.902 GHz |
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distortion |
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PO (each) = +4 dBm |
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f1 = 1.900 GHz |
− |
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−10 |
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− |
− |
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−14 |
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− |
dBc |
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f2 = 1.902 GHz |
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μPC2771TB
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Reference |
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Parameter |
Symbol |
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Test Conditions |
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μPC2771TB |
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Unit |
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MIN. |
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TYP. |
MAX. |
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Adjacent channel |
Padj1 |
f = 0.9 GHz |
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f = ±50 kHz |
− |
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−61 |
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− |
dBc |
power 1 |
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π/4 QPSK waveNote |
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f = ±100 kHz |
− |
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−72 |
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− |
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PO = +7 dBm |
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Adjacent channel |
Padj2 |
f = 1.5 GHz |
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f = ±50 kHz |
− |
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−59 |
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− |
dBc |
power 2 |
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π/4 QPSK waveNote |
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f = ±100 kHz |
− |
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−71 |
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− |
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PO = +7 dBm |
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Third order |
IM3 |
2 sine wave input. |
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f1 = 0.900 GHz |
− |
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−18 |
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− |
dBc |
intermodulation |
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Output of each tone |
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f2 = 0.902 GHz |
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distortion |
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PO (each) = +7 dBm |
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f1 = 1.500 GHz |
− |
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−12 |
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− |
dBc |
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f2 = 1.502 GHz |
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Note π/4 DQPSK modulated wave input, data rate 42 kbps, Filter roll off α = 0.5, PN 9
Data Sheet P12710EJ2V0DS00 |
7 |
μPC2762TB, μPC2763TB, μPC2771TB
VCC
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1 000 pF |
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C3 |
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6 |
L |
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50 Ω |
C1 |
4 |
C2 |
50 Ω |
IN |
1 |
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OUT |
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1 000 pF |
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1 000 pF |
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2, 3, 5 |
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Type |
Value |
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C1, C2 |
Bias Tee |
1 000 pF |
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C3 |
Capacitor |
1 000 pF |
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L |
Bias Tee |
1 000 nH |
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Type |
Value |
Operating Frequency |
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C1 to C3 |
Chip capacitor |
1 000 pF |
100 MHz or higher |
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L |
Chip inductor |
100 nH |
100 MHz or higher |
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10 nH |
2.0 GHz or higher |
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The internal output transistor of this IC consumes 20 mA, to output medium power. To supply current for output transistor, connect an inductor between the Vcc pin (pin 6) and output pin (pin 4). Select large value inductance, as listed above.
The inductor has both DC and AC effects. In terms of DC, the inductor biases the output transistor with minimum voltage drop to output enable high level. In terms of AC, the inductor make output-port-impedance higher to get enough gain. In this case, large inductance and Q is suitable.
For above reason, select an inductance of 100 Ω or over impedance in the operating frequency. The gain is a peak in the operating frequency band, and suppressed at lower frequencies.
The recommendable inductance can be chosen from example of actual application components list as shown above.
Capacitors of 1 000 pF are recommendable as the bypass capacitor for the Vcc pin and the coupling capacitors for the input and output pins.
The bypass capacitor connected to the Vcc pin is used to minimize ground impedance of Vcc pin. So, stable bias can be supplied against Vcc fluctuation.
The coupling capacitors, connected to the input and output pins, are used to cut the DC and minimize RF serial impedance. Their capacitance are therefore selected as lower impedance against a 50 Ω load. The capacitors thus perform as high pass filters, suppressing low frequencies to DC.
To obtain a flat gain from 100 MHz upwards, 1 000 pF capacitors are used in the test circuit. In the case of under 10 MHz operation, increase the value of coupling capacitor such as 10 000 pF. Because the coupling capacitors are determined by equation, C = 1/(2πRfc).
8 |
Data Sheet P12710EJ2V0DS00 |
μPC2762TB, μPC2763TB, μPC2771TB
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AMP-2 |
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Top View |
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2 |
3 |
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IN |
OUT |
1 |
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C1Z |
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→ |
C |
C |
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4 |
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5 |
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L |
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6 |
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Mounting direction |
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(Marking is an example for |
PC2762TB) |
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VCC |
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C |
COMPONENT LIST |
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Notes |
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Value |
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C |
1 000 pF |
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L |
Example: 10 nH |
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1.30 × 30 × 0.4 mm double sided copper clad polyimide board.
2.Back side: GND pattern
3.Solder plated on pattern
4.: Through holes
For more information on the use of this IC, refer to the following application note: USAGE AND APPLICATION OF SILICON MEDIUM-POWER HIGH-FREQUENCY AMPLIFIER MMIC (P12152E).
Data Sheet P12710EJ2V0DS00 |
9 |