NEC Electronics Inc UPA573T Datasheet

DATA SHEET

MOS FIELD EFFECT TRANSISTOR

μPA573T

P-CHANNEL MOS FET (5-PIN 2 CIRCUITS)

FOR SWITCHING

The μPA573T is a super-mini-mold device provided with two MOS FET circuits. It achieves high-density mounting and saves mounting costs.

FEATURES

•Two source common MOS FET circuits in package the same size as SC-70

•Directly driven by ICs having a 3 V power supply

•Automatic mounting supported

PACKAGE		DIMENSIONS		(in millimeters)
		0.2 –0+0.1		0.15	–0.05+0.1
±0.12.1	±0.11.25				0 to 0.1
	0.65		0.65		0.7
				0.9	±0.1
		1.3
		2.0 ±0.2

EQUIVALENT CIRCUIT

5

4

PIN CONNECTION

1.

Gate 1 (G1)

2. Source (common)

3. Gate 2 (G2)

4.

Drain 2 (D2)

5.

Drain 1 (D1)

Marking: CB

1

2

3

ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C)

PARAMETER

SYMBOL

TEST CONDITIONS

RATINGS

UNIT

Drain to Source Voltage

VDSS

VGS = 0

–30

V

Gate to Source Voltage

VGSS

VDS = 0

V

+7

Drain Current (DC)

ID(DC)

+100

mA

Drain Current (pulse)

ID(pulse)

PW ≤ 10 ms, Duty Cycle ≤ 50 %

+200

mA

Total Power Dissipation

PT

200 (Total)

mW

Channel Temperature

Tch

150

˚C

Operating Temperature

Topt

–55 to +80

˚C

Storage Temperature

Tstg

–55 to +150

˚C

Document No. G11245EJ1V0DS00 (1st edition)
Date Published June 1996 P
Printed in Japan	©	1996

										μPA573T
	ELECTRICAL CHARACTERISTICS (TA = 25 ˚C)
	PARAMETER	SYMBOL			TEST CONDITIONS	MIN.	TYP.	MAX.		UNIT
	Drain Cut-off Current	IDSS	VDS = –30 V, VGS = 0						–1.0	μA
	Gate Leakage Current	IGSS	VGS =						+3.0	μA
				+5 V, VDS = 0
	Gate Cut-off Voltage	VGS(off)	VDS = –3 V, ID = –10 μA			–1.6	–1.9		–2.3	V
	Forward Transfer Admittance	|yfs|	VDS = –3 V, ID = –10 mA			20	30			S
	Drain to Source On-State Resistance	RDS(on)1	VGS = –2.5 V, ID = –1 mA				55	100		Ω
	Drain to Source On-State Resistance	RDS(on)2	VGS = –4.0 V, ID = –10 mA				20	25		Ω
	Input Capacitance	Ciss	VDS = –5.0 V, VGS = 0, f = 1 MHz				16			pF
	Output Capacitance	Coss					13			pF
	Reverse Transfer Capacitance	Crss					2			pF
	Turn-On Delay Time	td(on)	VDD = – 5 V, ID = –10 mA, VGS(on) = –5 V,				10			ns
			RG = 10 Ω, RL = 500 Ω
	Rise Time	tr					40			ns
	Turn-Off Delay Time	td(off)					130			ns
	Fall Time	tf					80			ns

SWITCHING TIME MEASUREMENT CIRCUIT AND CONDITIONS

PG.

0

VGS

τ

τ = 1 μs

Duty Cycle ≤ 1 %

		VGS
RL	Gate		10 %
DUT	voltage
					VGS(on)
	waveform
						90 %
VDD
RG		ID
			td(on)	tr	td(off)	tf
	Drain	0
	current		10 %			10 %
	waveform				ID
						90 %
				90 %

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