UTRON UT62V25616MC-70LL, UT62V25616MC-70LLE, UT62V25616MC-70LE, UT62V25616MC-70L, UT62V25616MC-100LLE Datasheet

UTRON	UT62V25616
Rev. 1.1	256K X 16 BIT LOW POWER CMOS SRAM

FEATURES

Fast access time : 70/100 ns CMOS Low operating power

Operating current: 30/20mA (Icc max) Standby current: 20 uA(TYP.) L-version

2 uA(TYP.) LL-version Single 2.3V~2.7V power supply Operating temperature:

Commercial : 0 ~70

Extended : -20 ~80

All inputs and outputs TTL compatible Fully static operation

Three state outputs

Data retention voltage: 1.5V (min) Data byte control : LB (I/O1~I/O8)

UB (I/O9~I/O16)

Package : 44-pin 400mil TSOP 48-pin 6mm × 8mm TFBGA

FUNCTIONAL BLOCK DIAGRAM

A0

A1

A2

.

A3

MEMORY ARRAY

VCC

A4

ROW

.

A8

DECODER

2048 Rows x 128 Columns x 16 bits

VSS

A13

.

A14

A15

A16

A17

.

.

. .

I/O1

I/O

. .

.

CONTROL

.

COLUMN I/O

I/O16

CE

COLUMN DECODER

WE

LOGIC

OE

CONTROL

LB

A12

A11

A10

A9 A7

A6 A5

UB

GENERAL DESCRIPTION

The UT62V25616 is a 4,194,304-bit low power CMOS static random access memory organized as 262,144 words by 16 bits.

The UT62V25616 operates from a single 2.3V ~ 2.7V power supply and all inputs and outputs are fully TTL compatible.

The UT62V25616 is designed for low power system applications. It is particularly suited for use in high-density high-speed system applications.

PIN DESCRIPTION

SYMBOL										DESCRIPTION
A0 - A17										Address Inputs
I/O1 - I/O16										Data Inputs/Outputs
										Chip Enable Input
				CE
										Write Enable Input
	WE
										Output Enable Input
		OE
										Lower-Byte Control
			LB
										High-Byte Control
			UB
	VCC									Power Supply
	VSS									Ground
		NC								No Connection

UTRON TECHNOLOGY INC.

P80063

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: [phone] FAX: [phone]

1

UTRON	UT62V25616
Rev. 1.1	256K X 16 BIT LOW POWER CMOS SRAM

PIN CONFIGURATION
A4	1		44	A5
A3	2		43	A6
A2	3		42	A7
A1	4		41	OE
A0	5	UT62V25616	40	UB
CE	6		39	LB
I/O1	7		38	I/O16
I/O2	8		37	I/O15
I/O3	9		36	I/O14
I/O4	10		35	I/O13
Vcc	11		34	Vss
Vss	12		33	Vcc
I/O5	13		32	I/O12
I/O6	14		31	I/O11
I/O7	15		30	I/O10
I/O8	16		29	I/O9
WE	17		28	NC
A17	18		27	A8
A16	19		26	A9
A15	20		25	A10
A14	21		24	A11
A13	22		23	A12

TSOP II

A	LB	OE	A0	A1	A2	NC
B	I/O9	UB	A3	A4	CE	I/O1
C	I/O10	I/O11	A5	A6	I/O2	I/O3
D	Vss	I/O12	A17	A7	I/O4	Vcc
E	Vcc	I/O13	NC	A16	I/O5	Vss
F	I/O15	I/O14	A14	A15	I/O6	I/O7
G	I/O16	NC	A12	A13	WE	I/O8
H	NC	A8	A9	A10	A11	NC

1

2

3

4

5

6

TFBGA

TRUTH TABLE

MODE

I/O OPERATION

SUPPLY CURRENT

CE

OE

WE

LB

UB

I/O1-I/O8

I/O9-I/O16

Standby

H

X

X

X

X

High – Z

High – Z

ISB, ISB1

X

X

X

H

H

High – Z

High – Z

ISB, ISB1

Output

L

H

H

X

L

High – Z

High – Z

ICC,ICC1,ICC2

Disable

L

H

H

L

X

High – Z

High – Z

Read

L

L

H

L

H

DOUT

High – Z

ICC,ICC1,ICC2

L

L

H

H

L

High – Z

DOUT

L

L

H

L

L

DOUT

DOUT

Write

L

X

L

L

H

DIN

High – Z

ICC,ICC1,ICC2

L

X

L

H

L

High – Z

DIN

L

X

L

L

L

DIN

DIN

Note: H = VIH, L=VIL, X = Don't care.

UTRON TECHNOLOGY INC.

P80063

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: [phone] FAX: [phone]

2

UTRON			UT62V25616
Rev. 1.1		256K X 16 BIT LOW POWER CMOS SRAM
ABSOLUTE MAXIMUM RATINGS*
PARAMETER		SYMBOL	RATING	UNIT
Terminal Voltage with Respect to VSS		VTERM	-0.3 to 3.6	V
Operating Temperature	Commercial	TA	0 to 70
	Extended	TA	-20 to 80
Storage Temperature		TSTG	-65 to +150
Power Dissipation		PD	1	W
DC Output Current		IOUT	50	mA
Soldering Temperature (under 10 secs)		Tsolder	260

*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.

DC ELECTRICAL CHARACTERISTICS (VCC = 2.3V~2.7V, TA = 0 to 70 / -20 to 80 (E))

PARAMETER

SYMBOL

TEST CONDITION

MIN.

TYP.

MAX.

UNIT

Power Voltage

VCC

2.3

2.5

2.7

V

Input High Voltage

VIH

2.0

-

VCC+0.3

V

Input Low Voltage

VIL

-0.2

-

0.6

V

Input Leakage Current

ILI

VSS VIN VCC

- 1

-

1

µA

Output Leakage Current

ILO

VSS VI/O VCC; Output Disabled

- 1

-

1

µA

Output High Voltage

VOH

IOH= -0.5mA

2.0

-

-

V

Output Low Voltage

VOL

IOL= 0.5mA

-

-

0.4

V

Operating Power

ICC

Cycle time=min, 100%duty,

70

-

20

30

mA

Supply Current

I/O=0mA,

=VIL ;

100

-

15

20

mA

CE

Average Operation

Icc1

Cycle time=1µs,100%duty,I/O=0mA,

-

3

4

mA

Current

0.2V,other pins at 0.2V or Vcc-0.2V,

CE

Icc2

Cycle time=500ns,100%duty,I/O=0mA,

-

6

8

mA

0.2V,other pins at 0.2V or Vcc-0.2V,

CE

Standby Current (TTL)

ISB

=VIH, other pins =VIL or VIH,

-

0.3

0.5

mA

CE

Standby Current (CMOS)

ISB1

CE

=VCC-0.2V,

-L

-

20

80

µA

other pins at 0.2V or Vcc-0.2V,

-LL

-

2

15

µA

UTRON TECHNOLOGY INC.

P80063

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: [phone] FAX: [phone]

3

	UTRON				UT62V25616
	Rev. 1.1			256K X 16 BIT LOW POWER CMOS SRAM
	CAPACITANCE	(TA=25	, f=1.0MHz)
	PARAMETER		SYMBOL	MIN.	MAX	UNIT
	Input Capacitance		CIN	-	6	pF
	Input/Output Capacitance		CI/O	-	8	pF

Note : These parameters are guaranteed by device characterization, but not production tested.

AC TEST CONDITIONS

				Input Pulse Levels									0V to 2.2V
				Input Rise and Fall Times									5ns
				Input and Output Timing Reference Levels									1.2V
				Output Load									CL = 30pF, IOH/IOL = -0.5mA / 0.5mA
AC ELECTRICAL CHARACTERISTICS											(VCC =2.3V~2.7V, TA =0 to 70 / -20 to 80 (E))
(1) READ CYCLE
								PARAMETER	SYMBOL		UT62V25616-70				UT62V25616-100			UNIT
											MIN.		MAX.		MIN.	MAX.
		Read Cycle Time							tRC		70		-		100	-		ns
		Address Access Time							tAA		-		70		-	100		ns
		Chip Enable Access Time							tACE		-		70		-	100		ns
		Output Enable Access Time							tOE		-		35		-	50		ns
		Chip Enable to Output in Low Z							tCLZ*		10		-		10	-		ns
		Output Enable to Output in Low Z							tOLZ*		5		-		5	-		ns
		Chip Disable to Output in High Z							tCHZ*		-		25		-	30		ns
		Output Disable to Output in High Z							tOHZ*		-		25		-	30		ns
		Output Hold from Address Change							tOH		5		-		5	-		ns
				,				Access Time	tBA		-		70		-	100		ns
		LB			UB
				,				to High-Z Output	tHZB		-		30		-	40		ns
	LB					UB
			,					to Low-Z Output	tLZB		0		-		0	-		ns
		LB				UB
(2) WRITE CYCLE
		PARAMETER							SYMBOL		UT62V25616-70				UT62V25616-100			UNIT
											MIN.		MAX.		MIN.	MAX.
		Write Cycle Time							tWC		70		-		100	-		ns
		Address Valid to End of Write							tAW		60		-		80	-		ns
		Chip Enable to End of Write							tCW		60		-		80	-		ns
		Address Set-up Time							tAS		0		-		0	-		ns
		Write Pulse Width							tWP		55		-		70	-		ns
		Write Recovery Time							tWR		0		-		0	-		ns
		Data to Write Time Overlap							tDW		30		-		40	-		ns
		Data Hold from End of Write Time							tDH		0		-		0	-		ns
		Output Active from End of Write							tOW*		5		-		5	-		ns
		Write to Output in High Z							tWHZ*		-		30		-	40		ns
			,				Valid to End of Write		tBW		60		-		80	-		ns
		LB				UB

*These parameters are guaranteed by device characterization, but not production tested.

UTRON TECHNOLOGY INC.

P80063

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: [phone] FAX: [phone]

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